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c655fad0 NI |
1 | /* |
2 | * Configuation settings for the Renesas Technology RSK 7203 | |
3 | * | |
4 | * Copyright (C) 2008 Nobuhiro Iwamatsu | |
5 | * Copyright (C) 2008 Renesas Solutions Corp. | |
6 | * | |
7 | * See file CREDITS for list of people who contributed to this | |
8 | * project. | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or | |
11 | * modify it under the terms of the GNU General Public License as | |
12 | * published by the Free Software Foundation; either version 2 of | |
13 | * the License, or (at your option) any later version. | |
14 | * | |
15 | * This program is distributed in the hope that it will be useful, | |
16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
18 | * GNU General Public License for more details. | |
19 | * | |
20 | * You should have received a copy of the GNU General Public License | |
21 | * along with this program; if not, write to the Free Software | |
22 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
23 | * MA 02111-1307 USA | |
24 | */ | |
25 | ||
26 | #ifndef __RSK7203_H | |
27 | #define __RSK7203_H | |
28 | ||
29 | #undef DEBUG | |
30 | #define CONFIG_SH 1 | |
31 | #define CONFIG_SH2 1 | |
32 | #define CONFIG_SH2A 1 | |
33 | #define CONFIG_CPU_SH7203 1 | |
34 | #define CONFIG_RSK7203 1 | |
35 | ||
36 | #define CONFIG_CMD_FLASH | |
37 | #define CONFIG_CMD_NET | |
38 | #define CONFIG_CMD_NFS | |
39 | #define CONFIG_CMD_PING | |
40 | #define CONFIG_CMD_ENV | |
41 | #define CONFIG_CMD_SDRAM | |
42 | #define CONFIG_CMD_MEMORY | |
43 | #define CONFIG_CMD_CACHE | |
44 | ||
45 | #define CONFIG_BAUDRATE 115200 | |
46 | #define CONFIG_BOOTARGS "console=ttySC0,115200" | |
47 | #define CONFIG_LOADADDR 0x0C100000 /* RSK7203_SDRAM_BASE + 1MB */ | |
48 | ||
49 | #define CONFIG_VERSION_VARIABLE | |
50 | #undef CONFIG_SHOW_BOOT_PROGRESS | |
51 | ||
52 | /* MEMORY */ | |
53 | #define RSK7203_SDRAM_BASE 0x0C000000 | |
54 | #define RSK7203_FLASH_BASE_1 0x20000000 /* Non cache */ | |
55 | #define RSK7203_FLASH_BANK_SIZE (4 * 1024 * 1024) | |
56 | ||
57 | #define CFG_LONGHELP /* undef to save memory */ | |
58 | #define CFG_PROMPT "=> " /* Monitor Command Prompt */ | |
59 | #define CFG_CBSIZE 256 /* Buffer size for input from the Console */ | |
60 | #define CFG_PBSIZE 256 /* Buffer size for Console output */ | |
61 | #define CFG_MAXARGS 16 /* max args accepted for monitor commands */ | |
62 | /* Buffer size for Boot Arguments passed to kernel */ | |
63 | #define CFG_BARGSIZE 512 | |
64 | /* List of legal baudrate settings for this board */ | |
65 | #define CFG_BAUDRATE_TABLE { 115200 } | |
66 | ||
67 | /* SCIF */ | |
6f3d8bb5 | 68 | #define CONFIG_SCIF_CONSOLE 1 |
c655fad0 NI |
69 | #define CONFIG_CONS_SCIF0 1 |
70 | ||
71 | #define CFG_MEMTEST_START RSK7203_SDRAM_BASE | |
72 | #define CFG_MEMTEST_END (CFG_MEMTEST_START + (3 * 1024 * 1024)) | |
73 | ||
74 | #define CFG_SDRAM_BASE RSK7203_SDRAM_BASE | |
75 | #define CFG_SDRAM_SIZE (32 * 1024 * 1024) | |
76 | ||
77 | #define CFG_LOAD_ADDR (CFG_SDRAM_BASE + 1024 * 1024) | |
78 | #define CFG_MONITOR_BASE RSK7203_FLASH_BASE_1 | |
79 | #define CFG_MONITOR_LEN (128 * 1024) | |
80 | #define CFG_MALLOC_LEN (256 * 1024) | |
81 | #define CFG_GBL_DATA_SIZE 256 | |
82 | #define CFG_BOOTMAPSZ (8 * 1024 * 1024) | |
83 | ||
84 | /* FLASH */ | |
6f3d8bb5 | 85 | #define CONFIG_FLASH_CFI_DRIVER |
c655fad0 NI |
86 | #define CFG_FLASH_CFI |
87 | #define CFG_FLASH_CFI_WIDTH FLASH_CFI_16BIT | |
c655fad0 NI |
88 | #undef CFG_FLASH_QUIET_TEST |
89 | #define CFG_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */ | |
90 | #define CFG_FLASH_BASE RSK7203_FLASH_BASE_1 | |
91 | #define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE } | |
92 | #define CFG_MAX_FLASH_SECT 64 | |
93 | #define CFG_MAX_FLASH_BANKS 1 | |
94 | ||
5a1aceb0 | 95 | #define CONFIG_ENV_IS_IN_FLASH |
0e8d1586 JCPV |
96 | #define CONFIG_ENV_SECT_SIZE (64 * 1024) |
97 | #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE | |
98 | #define CONFIG_ENV_ADDR (CFG_MONITOR_BASE + CFG_MONITOR_LEN) | |
c655fad0 NI |
99 | #define CFG_FLASH_ERASE_TOUT 12000 |
100 | #define CFG_FLASH_WRITE_TOUT 500 | |
101 | ||
102 | /* Board Clock */ | |
103 | #define CONFIG_SYS_CLK_FREQ 33333333 | |
104 | #define CMT_CLK_DIVIDER 32 /* 8 (default), 32, 128 or 512 */ | |
105 | #define CFG_HZ (CONFIG_SYS_CLK_FREQ / CMT_CLK_DIVIDER) | |
106 | ||
107 | #endif /* __RSK7203_H */ |