[u-boot.git] / include / configs / SMN42.h

/*
 * (C) Copyright 2007
 * Wolfgang Denk, DENX Software Engineering, [email protected].
 *
 * Configuation settings for the SMN42 board from Siemens.
 *
 * See file CREDITS for list of people who contributed to this
 * project.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 */

#ifndef __CONFIG_H
#define __CONFIG_H

/*
 * If we are developing, we might want to start u-boot from ram
 * so we MUST NOT initialize critical regs like mem-timing ...
 */
#undef CONFIG_INIT_CRITICAL		/* undef for developing */

#undef CONFIG_SKIP_LOWLEVEL_INIT
#undef CONFIG_SKIP_RELOCATE_UBOOT

/*
 * High Level Configuration Options
 * (easy to change)
 */
#define CONFIG_ARM7		1	/* This is a ARM7 CPU	*/
#define CONFIG_ARM_THUMB	1	/* this is an ARM720TDMI */
#define CONFIG_LPC2292
#undef	CONFIG_ARM7_REVD		/* disable ARM720 REV.D Workarounds */

#undef CONFIG_USE_IRQ			/* don't need them anymore */

/*
 * Size of malloc() pool
 */
#define CFG_MALLOC_LEN		(CONFIG_ENV_SIZE + 128*1024)
#define CFG_GBL_DATA_SIZE	128	/* size in bytes reserved for initial data */

/*
 * Hardware drivers
 */

/*
 * select serial console configuration
 */
#define CONFIG_SERIAL1		1	/* we use Serial line 1 */

/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE

#define CONFIG_BAUDRATE		115200

/*
 * BOOTP options
 */
#define CONFIG_BOOTP_SUBNETMASK
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME
#define CONFIG_BOOTP_BOOTPATH
#define CONFIG_BOOTP_BOOTFILESIZE


/* enable I2C and select the hardware/software driver */
#undef	CONFIG_HARD_I2C			/* I2C with hardware support	*/
#define CONFIG_SOFT_I2C		1	/* I2C bit-banged		*/
/* this would be 0xAE if E0, E1 and E2 were pulled high */
#define CFG_I2C_SLAVE		0xA0
#define CFG_I2C_EEPROM_ADDR	(0xA0 >> 1)
#define CFG_I2C_EEPROM_ADDR_LEN 2 /* 16 bit address */
#define CFG_EEPROM_PAGE_WRITE_BITS 6 /* 64 bytes per write */
#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 20
/* not used but required by devices.c */
#define CFG_I2C_SPEED 10000

#ifdef CONFIG_SOFT_I2C
/*
 * Software (bit-bang) I2C driver configuration
 */
#define SCL		0x00000004		/* P0.2 */
#define SDA		0x00000008		/* P0.3 */

#define	I2C_READ	((GET32(IO0PIN) & SDA) ? 1 : 0)
#define	I2C_SDA(x)	{ if (x) PUT32(IO0SET, SDA); else PUT32(IO0CLR, SDA); }
#define	I2C_SCL(x)	{ if (x) PUT32(IO0SET, SCL); else PUT32(IO0CLR, SCL); }
#define	I2C_DELAY	{ udelay(100); }
#define	I2C_ACTIVE	{ unsigned int i2ctmp; \
					  i2ctmp = GET32(IO0DIR); \
					  i2ctmp |= SDA; \
					  PUT32(IO0DIR, i2ctmp); }
#define	I2C_TRISTATE	{ unsigned int i2ctmp; \
					      i2ctmp = GET32(IO0DIR); \
					      i2ctmp &= ~SDA; \
						  PUT32(IO0DIR, i2ctmp); }
#endif /* CONFIG_SOFT_I2C */


/*
 * Command line configuration.
 */
#include <config_cmd_default.h>
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_FAT
#define CONFIG_CMD_MMC
#define CONFIG_CMD_NET
#define CONFIG_CMD_EEPROM
#define CONFIG_CMD_PING


#define CONFIG_DOS_PARTITION

#define CONFIG_BOOTDELAY	5

/*
 * Miscellaneous configurable options
 */
#define	CFG_LONGHELP				/* undef to save memory		*/
#define	CFG_PROMPT		"SMN42 # " /* Monitor Command Prompt	*/
#define	CFG_CBSIZE		256		/* Console I/O Buffer Size	*/
#define	CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
#define	CFG_MAXARGS		16		/* max number of command args	*/
#define CFG_BARGSIZE		CFG_CBSIZE	/* Boot Argument Buffer Size	*/

#define CFG_MEMTEST_START	0x81800000	/* memtest works on	*/
#define CFG_MEMTEST_END		0x83000000	/* 24 MB in SRAM	*/

#undef	CFG_CLKS_IN_HZ		/* everything, incl board info, in Hz */

#define	CFG_LOAD_ADDR		0x81000000	/* default load address	*/
						/* for uClinux img is here*/

#define CFG_SYS_CLK_FREQ	58982400	/* Hz */
#define	CFG_HZ			2048		/* decrementer freq in Hz */

						/* valid baudrates */
#define CFG_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200 }

/*-----------------------------------------------------------------------
 * Stack sizes
 *
 * The stack sizes are set up in start.S using the settings below
 */
#define CONFIG_STACKSIZE	(128*1024)	/* regular stack */
#ifdef CONFIG_USE_IRQ
#define CONFIG_STACKSIZE_IRQ	(4*1024)	/* IRQ stack */
#define CONFIG_STACKSIZE_FIQ	(4*1024)	/* FIQ stack */
#endif

/*-----------------------------------------------------------------------
 * Physical Memory Map
 */
#define CONFIG_NR_DRAM_BANKS	1	   /* we have 1 bank of SRAM */
#define PHYS_SDRAM_1		0x81000000 /* SRAM Bank #1 */
#define PHYS_SDRAM_1_SIZE	0x02000000 /* 32 MB SRAM */

/* This is the external flash */
#define PHYS_FLASH_1		0x80000000 /* Flash Bank #1 */
#define PHYS_FLASH_SIZE		0x01000000 /* 16 MB */

/*-----------------------------------------------------------------------
 * FLASH and environment organization
 */

/*
 * The first entry in CFG_FLASH_BANKS_LIST is a dummy, but it must be present.
 */
#define CFG_FLASH_BANKS_LIST	{ 0, PHYS_FLASH_1 }
#define CFG_FLASH_ADDR0			0x555
#define CFG_FLASH_ADDR1			0x2AA
#define CFG_FLASH_ERASE_TOUT	16384	/* Timeout for Flash Erase (in ms) */
#define CFG_FLASH_WRITE_TOUT	5	/* Timeout for Flash Write (in ms) */

#define CFG_MAX_FLASH_SECT	128  /* max number of sectors on one chip    */

#define CFG_MAX_FLASH_BANKS	2	/* max number of memory banks		*/

#define	CONFIG_ENV_IS_IN_FLASH	1
/* The Environment Sector is in the CPU-internal flash */
#define CFG_FLASH_BASE		0
#define CONFIG_ENV_OFFSET		0x3C000
#define CONFIG_ENV_ADDR		(CFG_FLASH_BASE + CONFIG_ENV_OFFSET)
#define CONFIG_ENV_SIZE		0x2000 /* Total Size of Environment Sector	*/

#define CONFIG_CMDLINE_TAG
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
#define CONFIG_MMC			1
/* we use this ethernet chip */
#define CONFIG_ENC28J60

#endif	/* __CONFIG_H */
Commit	Line	Data
160131bf PP	1	/*
	2	* (C) Copyright 2007
	3	* Wolfgang Denk, DENX Software Engineering, [email protected].
	4	*
	5	* Configuation settings for the SMN42 board from Siemens.
	6	*
	7	* See file CREDITS for list of people who contributed to this
	8	* project.
	9	*
	10	* This program is free software; you can redistribute it and/or
	11	* modify it under the terms of the GNU General Public License as
	12	* published by the Free Software Foundation; either version 2 of
	13	* the License, or (at your option) any later version.
	14	*
	15	* This program is distributed in the hope that it will be useful,
	16	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	17	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	18	* GNU General Public License for more details.
	19	*
	20	* You should have received a copy of the GNU General Public License
	21	* along with this program; if not, write to the Free Software
	22	* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
	23	* MA 02111-1307 USA
	24	*/
	25
	26	#ifndef __CONFIG_H
	27	#define __CONFIG_H
	28
	29	/*
	30	* If we are developing, we might want to start u-boot from ram
	31	* so we MUST NOT initialize critical regs like mem-timing ...
	32	*/
	33	#undef CONFIG_INIT_CRITICAL /* undef for developing */
	34
	35	#undef CONFIG_SKIP_LOWLEVEL_INIT
	36	#undef CONFIG_SKIP_RELOCATE_UBOOT
	37
	38	/*
	39	* High Level Configuration Options
	40	* (easy to change)
	41	*/
	42	#define CONFIG_ARM7 1 /* This is a ARM7 CPU */
	43	#define CONFIG_ARM_THUMB 1 /* this is an ARM720TDMI */
	44	#define CONFIG_LPC2292
725671cc	45	#undef CONFIG_ARM7_REVD /* disable ARM720 REV.D Workarounds */
160131bf PP	46
	47	#undef CONFIG_USE_IRQ /* don't need them anymore */
	48
	49	/*
	50	* Size of malloc() pool
	51	*/
0e8d1586	52	#define CFG_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
160131bf PP	53	#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
	54
	55	/*
	56	* Hardware drivers
	57	*/
	58
	59	/*
	60	* select serial console configuration
	61	*/
	62	#define CONFIG_SERIAL1 1 /* we use Serial line 1 */
	63
	64	/* allow to overwrite serial and ethaddr */
	65	#define CONFIG_ENV_OVERWRITE
	66
	67	#define CONFIG_BAUDRATE 115200
	68
18225e8d JL	69	/*
	70	* BOOTP options
	71	*/
	72	#define CONFIG_BOOTP_SUBNETMASK
	73	#define CONFIG_BOOTP_GATEWAY
	74	#define CONFIG_BOOTP_HOSTNAME
	75	#define CONFIG_BOOTP_BOOTPATH
	76	#define CONFIG_BOOTP_BOOTFILESIZE
	77
160131bf PP	78
160131bf PP	79	/* enable I2C and select the hardware/software driver */
725671cc	80	#undef CONFIG_HARD_I2C /* I2C with hardware support */
160131bf PP	81	#define CONFIG_SOFT_I2C 1 /* I2C bit-banged */
	82	/* this would be 0xAE if E0, E1 and E2 were pulled high */
	83	#define CFG_I2C_SLAVE 0xA0
	84	#define CFG_I2C_EEPROM_ADDR (0xA0 >> 1)
	85	#define CFG_I2C_EEPROM_ADDR_LEN 2 /* 16 bit address */
	86	#define CFG_EEPROM_PAGE_WRITE_BITS 6 /* 64 bytes per write */
	87	#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 20
	88	/* not used but required by devices.c */
	89	#define CFG_I2C_SPEED 10000
	90
	91	#ifdef CONFIG_SOFT_I2C
	92	/*
	93	* Software (bit-bang) I2C driver configuration
	94	*/
	95	#define SCL 0x00000004 /* P0.2 */
	96	#define SDA 0x00000008 /* P0.3 */
	97
	98	#define I2C_READ ((GET32(IO0PIN) & SDA) ? 1 : 0)
	99	#define I2C_SDA(x) { if (x) PUT32(IO0SET, SDA); else PUT32(IO0CLR, SDA); }
	100	#define I2C_SCL(x) { if (x) PUT32(IO0SET, SCL); else PUT32(IO0CLR, SCL); }
	101	#define I2C_DELAY { udelay(100); }
	102	#define I2C_ACTIVE { unsigned int i2ctmp; \
725671cc	103	i2ctmp = GET32(IO0DIR); \
160131bf PP	104	i2ctmp \|= SDA; \
	105	PUT32(IO0DIR, i2ctmp); }
	106	#define I2C_TRISTATE { unsigned int i2ctmp; \
725671cc	107	i2ctmp = GET32(IO0DIR); \
160131bf PP	108	i2ctmp &= ~SDA; \
	109	PUT32(IO0DIR, i2ctmp); }
	110	#endif /* CONFIG_SOFT_I2C */
	111
fe7f782d	112
160131bf	113	/*
fe7f782d	114	* Command line configuration.
160131bf	115	*/
fe7f782d JL	116	#include <config_cmd_default.h>
	117	#define CONFIG_CMD_DHCP
	118	#define CONFIG_CMD_FAT
	119	#define CONFIG_CMD_MMC
	120	#define CONFIG_CMD_NET
	121	#define CONFIG_CMD_EEPROM
	122	#define CONFIG_CMD_PING
160131bf	123
160131bf	124
fe7f782d	125	#define CONFIG_DOS_PARTITION
160131bf PP	126
	127	#define CONFIG_BOOTDELAY 5
	128
	129	/*
	130	* Miscellaneous configurable options
	131	*/
	132	#define CFG_LONGHELP /* undef to save memory */
	133	#define CFG_PROMPT "SMN42 # " /* Monitor Command Prompt */
	134	#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
	135	#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
	136	#define CFG_MAXARGS 16 /* max number of command args */
	137	#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
	138
	139	#define CFG_MEMTEST_START 0x81800000 /* memtest works on */
	140	#define CFG_MEMTEST_END 0x83000000 /* 24 MB in SRAM */
	141
725671cc	142	#undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */
160131bf	143
725671cc WD	144	#define CFG_LOAD_ADDR 0x81000000 /* default load address */
725671cc WD	145	/* for uClinux img is here*/
160131bf	146
725671cc	147	#define CFG_SYS_CLK_FREQ 58982400 /* Hz */
160131bf PP	148	#define CFG_HZ 2048 /* decrementer freq in Hz */
	149
	150	/* valid baudrates */
	151	#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
	152
	153	/*-----------------------------------------------------------------------
	154	* Stack sizes
	155	*
	156	* The stack sizes are set up in start.S using the settings below
	157	*/
	158	#define CONFIG_STACKSIZE (1281024) / regular stack */
	159	#ifdef CONFIG_USE_IRQ
	160	#define CONFIG_STACKSIZE_IRQ (41024) / IRQ stack */
	161	#define CONFIG_STACKSIZE_FIQ (41024) / FIQ stack */
	162	#endif
	163
	164	/*-----------------------------------------------------------------------
	165	* Physical Memory Map
	166	*/
	167	#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of SRAM */
	168	#define PHYS_SDRAM_1 0x81000000 /* SRAM Bank #1 */
	169	#define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB SRAM */
	170
	171	/* This is the external flash */
	172	#define PHYS_FLASH_1 0x80000000 /* Flash Bank #1 */
	173	#define PHYS_FLASH_SIZE 0x01000000 /* 16 MB */
	174
	175	/*-----------------------------------------------------------------------
	176	* FLASH and environment organization
	177	*/
	178
	179	/*
	180	* The first entry in CFG_FLASH_BANKS_LIST is a dummy, but it must be present.
	181	*/
	182	#define CFG_FLASH_BANKS_LIST { 0, PHYS_FLASH_1 }
	183	#define CFG_FLASH_ADDR0 0x555
	184	#define CFG_FLASH_ADDR1 0x2AA
	185	#define CFG_FLASH_ERASE_TOUT 16384 /* Timeout for Flash Erase (in ms) */
	186	#define CFG_FLASH_WRITE_TOUT 5 /* Timeout for Flash Write (in ms) */
	187
	188	#define CFG_MAX_FLASH_SECT 128 /* max number of sectors on one chip */
	189
	190	#define CFG_MAX_FLASH_BANKS 2 /* max number of memory banks */
	191
5a1aceb0	192	#define CONFIG_ENV_IS_IN_FLASH 1
160131bf PP	193	/* The Environment Sector is in the CPU-internal flash */
160131bf PP	194	#define CFG_FLASH_BASE 0
0e8d1586 JCPV	195	#define CONFIG_ENV_OFFSET 0x3C000
	196	#define CONFIG_ENV_ADDR (CFG_FLASH_BASE + CONFIG_ENV_OFFSET)
	197	#define CONFIG_ENV_SIZE 0x2000 /* Total Size of Environment Sector */
160131bf PP	198
	199	#define CONFIG_CMDLINE_TAG
	200	#define CONFIG_SETUP_MEMORY_TAGS
	201	#define CONFIG_INITRD_TAG
	202	#define CONFIG_MMC 1
	203	/* we use this ethernet chip */
	204	#define CONFIG_ENC28J60
	205
	206	#endif /* __CONFIG_H */