[u-boot.git] / include / configs / DASA_SIM.h

/*
 * (C) Copyright 2001
 * Stefan Roese, esd gmbh germany, [email protected]
 *
 * See file CREDITS for list of people who contributed to this
 * project.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 */

/*
 * board/config.h - configuration options, board specific
 */

#ifndef __CONFIG_H
#define __CONFIG_H

/*
 * High Level Configuration Options
 * (easy to change)
 */

#define CONFIG_IOP480		1	/* This is a IOP480 CPU		*/
#define CONFIG_DASA_SIM		1	/* ...on a DASA_SIM board	*/

#define CONFIG_BOARD_EARLY_INIT_F 1	/* call board_early_init_f()	*/

#define CONFIG_CLOCKS_IN_MHZ	1	/* clocks passsed to Linux in MHz */

#define CONFIG_CPUCLOCK		66
#define CONFIG_BUSCLOCK		(CONFIG_CPUCLOCK)

#define CONFIG_BAUDRATE		9600
#define CONFIG_BOOTDELAY	3	/* autoboot after 5 seconds	*/
#define CONFIG_BOOTCOMMAND	"bootm ffe00000" /* autoboot command	*/

#undef	CONFIG_BOOTARGS

#define CONFIG_LOADS_ECHO	1	/* echo on for serial download	*/
#define CFG_LOADS_BAUD_CHANGE	1	/* allow baudrate change	*/

#undef CONFIG_WATCHDOG			/* watchdog disabled		*/

#define CONFIG_IPADDR		10.0.18.222
#define CONFIG_SERVERIP		10.0.18.190


/*
 * BOOTP options
 */
#define CONFIG_BOOTP_BOOTFILESIZE
#define CONFIG_BOOTP_BOOTPATH
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME


/*
 * Command line configuration.
 */
#include <config_cmd_default.h>

#define CONFIG_CMD_BSP


#if 0 /* Does not appear to be used?!  If it is used, needs to be fixed */
#define CONFIG_SOFT_I2C			/* Software I2C support enabled */
#endif
#define CFG_I2C_EEPROM_ADDR_LEN 1	/* Bytes of address		*/

/*
 * Miscellaneous configurable options
 */
#define CFG_LONGHELP			/* undef to save memory		*/
#define CFG_PROMPT	"=> "		/* Monitor Command Prompt	*/
#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE	1024		/* Console I/O Buffer Size	*/
#else
#define CFG_CBSIZE	256		/* Console I/O Buffer Size	*/
#endif
#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
#define CFG_MAXARGS	16		/* max number of command args	*/
#define CFG_BARGSIZE	CFG_CBSIZE	/* Boot Argument Buffer Size	*/

#define CFG_CONSOLE_INFO_QUIET	1	/* don't print console @ startup*/

#define CFG_MEMTEST_START	0x0400000	/* memtest works on	*/
#define CFG_MEMTEST_END		0x0C00000	/* 4 ... 12 MB in DRAM	*/

/* The following table includes the supported baudrates */
#define CFG_BAUDRATE_TABLE	\
	{ 300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200 }

#define CFG_LOAD_ADDR	0x100000	/* default load address */

#define CFG_HZ		1000		/* decrementer freq: 1 ms ticks */

#define CONFIG_ZERO_BOOTDELAY_CHECK	/* check for keypress on bootdelay==0 */

/*-----------------------------------------------------------------------
 * Definitions for initial stack pointer and data area (in DPRAM)
 */
#define CFG_INIT_RAM_ADDR	0x00df0000 /* inside of SDRAM			*/
#define CFG_INIT_RAM_END	0x0f00	/* End of used area in RAM	       */
#define CFG_GBL_DATA_SIZE	64  /* size in bytes reserved for initial data */
#define CFG_GBL_DATA_OFFSET	(CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
#define CFG_INIT_SP_OFFSET	CFG_GBL_DATA_OFFSET

/*-----------------------------------------------------------------------
 * Start addresses for the final memory configuration
 * (Set up by the startup code)
 * Please note that CFG_SDRAM_BASE _must_ start at 0
 */
#define CFG_SDRAM_BASE		0x00000000
#define CFG_FLASH_BASE		0xFFFD0000
#define CFG_MONITOR_BASE	CFG_FLASH_BASE
#define CFG_MONITOR_LEN		(192 << 10)	/* Reserve 128 kB for Monitor	*/
#define CFG_MALLOC_LEN		(128 << 10)	/* Reserve 128 kB for malloc()	*/

/*
 * For booting Linux, the board info and command line data
 * have to be in the first 8 MB of memory, since this is
 * the maximum mapped by the Linux kernel during initialization.
 */
#define CFG_BOOTMAPSZ		(8 << 20)	/* Initial Memory map for Linux */
/*-----------------------------------------------------------------------
 * FLASH organization
 */
#define CFG_MAX_FLASH_BANKS	1	/* max number of memory banks		*/
#define CFG_MAX_FLASH_SECT	256	/* max number of sectors on one chip	*/

#define CFG_FLASH_ERASE_TOUT	120000	/* Timeout for Flash Erase (in ms)	*/
#define CFG_FLASH_WRITE_TOUT	500	/* Timeout for Flash Write (in ms)	*/

#define CFG_FLASH_WORD_SIZE	unsigned char	/* flash word size (width)	*/
#define CFG_FLASH_ADDR0		0x0AA9	/* 1st address for flash config cycles	*/
#define CFG_FLASH_ADDR1		0x0556	/* 2nd address for flash config cycles	*/
/*
 * The following defines are added for buggy IOP480 byte interface.
 * All other boards should use the standard values (CPCI405 etc.)
 */
#define CFG_FLASH_READ0		0x0002	/* 0 is standard			*/
#define CFG_FLASH_READ1		0x0000	/* 1 is standard			*/
#define CFG_FLASH_READ2		0x0004	/* 2 is standard			*/

#define CFG_FLASH_EMPTY_INFO		/* print 'E' for empty sector on flinfo */

#define CONFIG_ENV_IS_IN_FLASH	1
#define CONFIG_ENV_OFFSET		0x00010000	/* Offset of Environment Sector */
#define CONFIG_ENV_SIZE		0x1000	/* Total Size of Environment Sector	*/

#if 0
#define CONFIG_ENV_SECT_SIZE	0x8000	/* see README - env sector total size	*/
#else
#define CONFIG_ENV_SECT_SIZE	0x10000 /* see README - env sector total size	*/
#endif

/*-----------------------------------------------------------------------
 * PCI stuff
 */
#define CONFIG_PCI			/* include pci support			*/
#undef CONFIG_PCI_PNP

#define CONFIG_NET_MULTI		/* Multi ethernet cards support		*/

#define CONFIG_TULIP

#define CFG_ETH_DEV_FN	     0x0000
#define CFG_ETH_IOBASE	     0x0fff0000
#define CFG_PCI9054_DEV_FN   0x0800
#define CFG_PCI9054_IOBASE   0x0eff0000

/*
 * Init Memory Controller:
 *
 * BR0/1 and OR0/1 (FLASH)
 */

#define FLASH_BASE0_PRELIM	0xFFE00000	/* FLASH bank #0	*/


/*
 * Internal Definitions
 *
 * Boot Flags
 */
#define BOOTFLAG_COLD	0x01		/* Normal Power-On: Boot from FLASH	*/
#define BOOTFLAG_WARM	0x02		/* Software reboot			*/

#endif	/* __CONFIG_H */
Commit	Line	Data
0f8c9768 WD	1	/*
	2	* (C) Copyright 2001
	3	* Stefan Roese, esd gmbh germany, [email protected]
	4	*
	5	* See file CREDITS for list of people who contributed to this
	6	* project.
	7	*
	8	* This program is free software; you can redistribute it and/or
	9	* modify it under the terms of the GNU General Public License as
	10	* published by the Free Software Foundation; either version 2 of
	11	* the License, or (at your option) any later version.
	12	*
	13	* This program is distributed in the hope that it will be useful,
	14	* but WITHOUT ANY WARRANTY; without even the implied warranty of
c837dcb1	15	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
0f8c9768 WD	16	* GNU General Public License for more details.
	17	*
	18	* You should have received a copy of the GNU General Public License
	19	* along with this program; if not, write to the Free Software
	20	* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
	21	* MA 02111-1307 USA
	22	*/
	23
	24	/*
	25	* board/config.h - configuration options, board specific
	26	*/
	27
	28	#ifndef __CONFIG_H
	29	#define __CONFIG_H
	30
	31	/*
	32	* High Level Configuration Options
	33	* (easy to change)
	34	*/
	35
	36	#define CONFIG_IOP480 1 /* This is a IOP480 CPU */
c837dcb1	37	#define CONFIG_DASA_SIM 1 /* ...on a DASA_SIM board */
0f8c9768	38
c837dcb1	39	#define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f() */
0f8c9768	40
c837dcb1	41	#define CONFIG_CLOCKS_IN_MHZ 1 /* clocks passsed to Linux in MHz */
0f8c9768	42
c837dcb1 WD	43	#define CONFIG_CPUCLOCK 66
c837dcb1 WD	44	#define CONFIG_BUSCLOCK (CONFIG_CPUCLOCK)
0f8c9768	45
c837dcb1	46	#define CONFIG_BAUDRATE 9600
0f8c9768 WD	47	#define CONFIG_BOOTDELAY 3 /* autoboot after 5 seconds */
	48	#define CONFIG_BOOTCOMMAND "bootm ffe00000" /* autoboot command */
	49
c837dcb1	50	#undef CONFIG_BOOTARGS
0f8c9768 WD	51
	52	#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
	53	#define CFG_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
	54
	55	#undef CONFIG_WATCHDOG /* watchdog disabled */
	56
	57	#define CONFIG_IPADDR 10.0.18.222
	58	#define CONFIG_SERVERIP 10.0.18.190
	59
3c3227f3	60
11799434 JL	61	/*
	62	* BOOTP options
	63	*/
	64	#define CONFIG_BOOTP_BOOTFILESIZE
	65	#define CONFIG_BOOTP_BOOTPATH
	66	#define CONFIG_BOOTP_GATEWAY
	67	#define CONFIG_BOOTP_HOSTNAME
	68
	69
3c3227f3 JL	70	/*
	71	* Command line configuration.
	72	*/
	73	#include <config_cmd_default.h>
	74
	75	#define CONFIG_CMD_BSP
	76
0f8c9768 WD	77
	78	#if 0 /* Does not appear to be used?! If it is used, needs to be fixed */
	79	#define CONFIG_SOFT_I2C /* Software I2C support enabled */
	80	#endif
c837dcb1	81	#define CFG_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */
0f8c9768	82
0f8c9768 WD	83	/*
	84	* Miscellaneous configurable options
	85	*/
	86	#define CFG_LONGHELP /* undef to save memory */
	87	#define CFG_PROMPT "=> " /* Monitor Command Prompt */
3c3227f3	88	#if defined(CONFIG_CMD_KGDB)
c837dcb1	89	#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
0f8c9768	90	#else
c837dcb1	91	#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
0f8c9768 WD	92	#endif
	93	#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
	94	#define CFG_MAXARGS 16 /* max number of command args */
	95	#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
	96
c837dcb1	97	#define CFG_CONSOLE_INFO_QUIET 1 /* don't print console @ startup*/
0f8c9768 WD	98
	99	#define CFG_MEMTEST_START 0x0400000 /* memtest works on */
	100	#define CFG_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */
	101
	102	/* The following table includes the supported baudrates */
c837dcb1	103	#define CFG_BAUDRATE_TABLE \
8bde7f77	104	{ 300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200 }
0f8c9768	105
c837dcb1	106	#define CFG_LOAD_ADDR 0x100000 /* default load address */
0f8c9768	107
c837dcb1	108	#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */
0f8c9768 WD	109
	110	#define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */
	111
	112	/*-----------------------------------------------------------------------
	113	* Definitions for initial stack pointer and data area (in DPRAM)
	114	*/
c837dcb1	115	#define CFG_INIT_RAM_ADDR 0x00df0000 /* inside of SDRAM */
0f8c9768 WD	116	#define CFG_INIT_RAM_END 0x0f00 /* End of used area in RAM */
	117	#define CFG_GBL_DATA_SIZE 64 /* size in bytes reserved for initial data */
	118	#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
	119	#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
	120
	121	/*-----------------------------------------------------------------------
	122	* Start addresses for the final memory configuration
	123	* (Set up by the startup code)
	124	* Please note that CFG_SDRAM_BASE _must_ start at 0
	125	*/
	126	#define CFG_SDRAM_BASE 0x00000000
	127	#define CFG_FLASH_BASE 0xFFFD0000
	128	#define CFG_MONITOR_BASE CFG_FLASH_BASE
	129	#define CFG_MONITOR_LEN (192 << 10) /* Reserve 128 kB for Monitor */
	130	#define CFG_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
	131
	132	/*
	133	* For booting Linux, the board info and command line data
	134	* have to be in the first 8 MB of memory, since this is
	135	* the maximum mapped by the Linux kernel during initialization.
	136	*/
c837dcb1	137	#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
0f8c9768 WD	138	/*-----------------------------------------------------------------------
	139	* FLASH organization
	140	*/
	141	#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
c837dcb1	142	#define CFG_MAX_FLASH_SECT 256 /* max number of sectors on one chip */
0f8c9768 WD	143
	144	#define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
	145	#define CFG_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
	146
c837dcb1 WD	147	#define CFG_FLASH_WORD_SIZE unsigned char /* flash word size (width) */
	148	#define CFG_FLASH_ADDR0 0x0AA9 /* 1st address for flash config cycles */
	149	#define CFG_FLASH_ADDR1 0x0556 /* 2nd address for flash config cycles */
0f8c9768 WD	150	/*
	151	* The following defines are added for buggy IOP480 byte interface.
	152	* All other boards should use the standard values (CPCI405 etc.)
	153	*/
c837dcb1 WD	154	#define CFG_FLASH_READ0 0x0002 /* 0 is standard */
	155	#define CFG_FLASH_READ1 0x0000 /* 1 is standard */
	156	#define CFG_FLASH_READ2 0x0004 /* 2 is standard */
0f8c9768	157
c837dcb1	158	#define CFG_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */
0f8c9768	159
5a1aceb0	160	#define CONFIG_ENV_IS_IN_FLASH 1
0e8d1586 JCPV	161	#define CONFIG_ENV_OFFSET 0x00010000 /* Offset of Environment Sector */
0e8d1586 JCPV	162	#define CONFIG_ENV_SIZE 0x1000 /* Total Size of Environment Sector */
0f8c9768 WD	163
0f8c9768 WD	164	#if 0
0e8d1586	165	#define CONFIG_ENV_SECT_SIZE 0x8000 /* see README - env sector total size */
0f8c9768	166	#else
0e8d1586	167	#define CONFIG_ENV_SECT_SIZE 0x10000 /* see README - env sector total size */
0f8c9768 WD	168	#endif
	169
	170	/*-----------------------------------------------------------------------
	171	* PCI stuff
	172	*/
	173	#define CONFIG_PCI /* include pci support */
	174	#undef CONFIG_PCI_PNP
	175
c837dcb1	176	#define CONFIG_NET_MULTI /* Multi ethernet cards support */
0f8c9768 WD	177
	178	#define CONFIG_TULIP
	179
c837dcb1 WD	180	#define CFG_ETH_DEV_FN 0x0000
c837dcb1 WD	181	#define CFG_ETH_IOBASE 0x0fff0000
0f8c9768 WD	182	#define CFG_PCI9054_DEV_FN 0x0800
	183	#define CFG_PCI9054_IOBASE 0x0eff0000
	184
0f8c9768 WD	185	/*
	186	* Init Memory Controller:
	187	*
	188	* BR0/1 and OR0/1 (FLASH)
	189	*/
	190
	191	#define FLASH_BASE0_PRELIM 0xFFE00000 /* FLASH bank #0 */
	192
	193
	194	/*
	195	* Internal Definitions
	196	*
	197	* Boot Flags
	198	*/
	199	#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
	200	#define BOOTFLAG_WARM 0x02 /* Software reboot */
	201
	202	#endif /* __CONFIG_H */