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d36856a3 SG |
1 | // SPDX-License-Identifier: GPL-2.0 |
2 | /* | |
3 | * Cr50 / H1 TPM support | |
4 | * | |
5 | * Copyright 2018 Google LLC | |
6 | */ | |
7 | ||
8 | #define LOG_CATEGORY UCLASS_TPM | |
9 | ||
10 | #include <common.h> | |
11 | #include <dm.h> | |
12 | #include <i2c.h> | |
13 | #include <irq.h> | |
f7ae49fc | 14 | #include <log.h> |
d36856a3 SG |
15 | #include <spl.h> |
16 | #include <tpm-v2.h> | |
eaac9717 SG |
17 | #include <acpi/acpigen.h> |
18 | #include <acpi/acpi_device.h> | |
d36856a3 SG |
19 | #include <asm/gpio.h> |
20 | #include <asm/io.h> | |
c05ed00a | 21 | #include <linux/delay.h> |
eaac9717 | 22 | #include <dm/acpi.h> |
d36856a3 SG |
23 | |
24 | enum { | |
25 | TIMEOUT_INIT_MS = 30000, /* Very long timeout for TPM init */ | |
26 | TIMEOUT_LONG_US = 2 * 1000 * 1000, | |
27 | TIMEOUT_SHORT_US = 2 * 1000, | |
28 | TIMEOUT_NO_IRQ_US = 20 * 1000, | |
29 | TIMEOUT_IRQ_US = 100 * 1000, | |
30 | }; | |
31 | ||
32 | enum { | |
33 | CR50_DID_VID = 0x00281ae0L | |
34 | }; | |
35 | ||
36 | enum { | |
37 | CR50_MAX_BUF_SIZE = 63, | |
38 | }; | |
39 | ||
fe6831da SG |
40 | /** |
41 | * struct cr50_priv - Private driver data | |
42 | * | |
43 | * @ready_gpio: GPIO to use to check if the TPM is ready | |
44 | * @irq: IRQ to use check if the TPM is ready (has priority over @ready_gpio) | |
45 | * @locality: Currenttly claimed locality (-1 if none) | |
46 | * @vendor: vendor: Vendor ID for TPM | |
47 | * @use_irq: true to use @irq, false to use @ready if available | |
48 | */ | |
d36856a3 SG |
49 | struct cr50_priv { |
50 | struct gpio_desc ready_gpio; | |
51 | struct irq irq; | |
52 | int locality; | |
53 | uint vendor; | |
54 | bool use_irq; | |
55 | }; | |
56 | ||
57 | /* Wait for interrupt to indicate TPM is ready */ | |
58 | static int cr50_i2c_wait_tpm_ready(struct udevice *dev) | |
59 | { | |
60 | struct cr50_priv *priv = dev_get_priv(dev); | |
61 | ulong timeout, base; | |
62 | int i; | |
63 | ||
64 | if (!priv->use_irq && !dm_gpio_is_valid(&priv->ready_gpio)) { | |
65 | /* Fixed delay if interrupt not supported */ | |
66 | udelay(TIMEOUT_NO_IRQ_US); | |
67 | return 0; | |
68 | } | |
69 | ||
70 | base = timer_get_us(); | |
71 | timeout = base + TIMEOUT_IRQ_US; | |
72 | ||
73 | i = 0; | |
74 | while (priv->use_irq ? !irq_read_and_clear(&priv->irq) : | |
75 | !dm_gpio_get_value(&priv->ready_gpio)) { | |
76 | i++; | |
77 | if ((int)(timer_get_us() - timeout) >= 0) { | |
78 | log_warning("Timeout\n"); | |
79 | /* Use this instead of the -ETIMEDOUT used by i2c */ | |
80 | return -ETIME; | |
81 | } | |
82 | } | |
83 | log_debug("i=%d\n", i); | |
84 | ||
85 | return 0; | |
86 | } | |
87 | ||
88 | /* Clear pending interrupts */ | |
89 | static void cr50_i2c_clear_tpm_irq(struct udevice *dev) | |
90 | { | |
91 | struct cr50_priv *priv = dev_get_priv(dev); | |
92 | ||
93 | if (priv->use_irq) | |
94 | irq_read_and_clear(&priv->irq); | |
95 | } | |
96 | ||
97 | /* | |
98 | * cr50_i2c_read() - read from TPM register | |
99 | * | |
100 | * @dev: TPM chip information | |
101 | * @addr: register address to read from | |
102 | * @buffer: provided by caller | |
103 | * @len: number of bytes to read | |
104 | * | |
105 | * 1) send register address byte 'addr' to the TPM | |
106 | * 2) wait for TPM to indicate it is ready | |
107 | * 3) read 'len' bytes of TPM response into the provided 'buffer' | |
108 | * | |
109 | * Return 0 on success. -ve on error | |
110 | */ | |
111 | static int cr50_i2c_read(struct udevice *dev, u8 addr, u8 *buffer, | |
112 | size_t len) | |
113 | { | |
114 | int ret; | |
115 | ||
116 | /* Clear interrupt before starting transaction */ | |
117 | cr50_i2c_clear_tpm_irq(dev); | |
118 | ||
119 | /* Send the register address byte to the TPM */ | |
120 | ret = dm_i2c_write(dev, 0, &addr, 1); | |
121 | if (ret) { | |
122 | log_err("Address write failed (err=%d)\n", ret); | |
123 | return ret; | |
124 | } | |
125 | ||
126 | /* Wait for TPM to be ready with response data */ | |
127 | ret = cr50_i2c_wait_tpm_ready(dev); | |
128 | if (ret) | |
129 | return ret; | |
130 | ||
131 | /* Read response data frrom the TPM */ | |
132 | ret = dm_i2c_read(dev, 0, buffer, len); | |
133 | if (ret) { | |
134 | log_err("Read response failed (err=%d)\n", ret); | |
135 | return ret; | |
136 | } | |
137 | ||
138 | return 0; | |
139 | } | |
140 | ||
141 | /* | |
142 | * cr50_i2c_write() - write to TPM register | |
143 | * | |
144 | * @dev: TPM chip information | |
145 | * @addr: register address to write to | |
146 | * @buffer: data to write | |
147 | * @len: number of bytes to write | |
148 | * | |
149 | * 1) prepend the provided address to the provided data | |
150 | * 2) send the address+data to the TPM | |
151 | * 3) wait for TPM to indicate it is done writing | |
152 | * | |
153 | * Returns -1 on error, 0 on success. | |
154 | */ | |
155 | static int cr50_i2c_write(struct udevice *dev, u8 addr, const u8 *buffer, | |
156 | size_t len) | |
157 | { | |
158 | u8 buf[len + 1]; | |
159 | int ret; | |
160 | ||
161 | if (len > CR50_MAX_BUF_SIZE) { | |
162 | log_err("Length %zd is too large\n", len); | |
163 | return -E2BIG; | |
164 | } | |
165 | ||
166 | /* Prepend the 'register address' to the buffer */ | |
167 | buf[0] = addr; | |
168 | memcpy(buf + 1, buffer, len); | |
169 | ||
170 | /* Clear interrupt before starting transaction */ | |
171 | cr50_i2c_clear_tpm_irq(dev); | |
172 | ||
173 | /* Send write request buffer with address */ | |
174 | ret = dm_i2c_write(dev, 0, buf, len + 1); | |
175 | if (ret) { | |
176 | log_err("Error writing to TPM (err=%d)\n", ret); | |
177 | return ret; | |
178 | } | |
179 | ||
180 | /* Wait for TPM to be ready */ | |
181 | return cr50_i2c_wait_tpm_ready(dev); | |
182 | } | |
183 | ||
6208975e | 184 | static inline u8 tpm_access(int locality) |
d36856a3 | 185 | { |
6208975e SG |
186 | if (locality == -1) |
187 | locality = 0; | |
d36856a3 SG |
188 | return 0x0 | (locality << 4); |
189 | } | |
190 | ||
6208975e | 191 | static inline u8 tpm_sts(int locality) |
d36856a3 | 192 | { |
6208975e SG |
193 | if (locality == -1) |
194 | locality = 0; | |
d36856a3 SG |
195 | return 0x1 | (locality << 4); |
196 | } | |
197 | ||
6208975e | 198 | static inline u8 tpm_data_fifo(int locality) |
d36856a3 | 199 | { |
6208975e SG |
200 | if (locality == -1) |
201 | locality = 0; | |
d36856a3 SG |
202 | return 0x5 | (locality << 4); |
203 | } | |
204 | ||
6208975e | 205 | static inline u8 tpm_did_vid(int locality) |
d36856a3 | 206 | { |
6208975e SG |
207 | if (locality == -1) |
208 | locality = 0; | |
d36856a3 SG |
209 | return 0x6 | (locality << 4); |
210 | } | |
211 | ||
212 | static int release_locality(struct udevice *dev, int force) | |
213 | { | |
214 | struct cr50_priv *priv = dev_get_priv(dev); | |
215 | u8 mask = TPM_ACCESS_VALID | TPM_ACCESS_REQUEST_PENDING; | |
216 | u8 addr = tpm_access(priv->locality); | |
217 | int ret; | |
218 | u8 buf; | |
219 | ||
220 | ret = cr50_i2c_read(dev, addr, &buf, 1); | |
221 | if (ret) | |
222 | return ret; | |
223 | ||
224 | if (force || (buf & mask) == mask) { | |
225 | buf = TPM_ACCESS_ACTIVE_LOCALITY; | |
226 | cr50_i2c_write(dev, addr, &buf, 1); | |
227 | } | |
228 | ||
79b7ade5 | 229 | priv->locality = -1; |
d36856a3 SG |
230 | |
231 | return 0; | |
232 | } | |
233 | ||
234 | /* cr50 requires all 4 bytes of status register to be read */ | |
235 | static int cr50_i2c_status(struct udevice *dev) | |
236 | { | |
237 | struct cr50_priv *priv = dev_get_priv(dev); | |
238 | u8 buf[4]; | |
239 | int ret; | |
240 | ||
241 | ret = cr50_i2c_read(dev, tpm_sts(priv->locality), buf, sizeof(buf)); | |
242 | if (ret) { | |
243 | log_warning("%s: Failed to read status\n", __func__); | |
244 | return ret; | |
245 | } | |
246 | ||
247 | return buf[0]; | |
248 | } | |
249 | ||
250 | /* cr50 requires all 4 bytes of status register to be written */ | |
251 | static int cr50_i2c_ready(struct udevice *dev) | |
252 | { | |
253 | struct cr50_priv *priv = dev_get_priv(dev); | |
254 | u8 buf[4] = { TPM_STS_COMMAND_READY }; | |
255 | int ret; | |
256 | ||
257 | ret = cr50_i2c_write(dev, tpm_sts(priv->locality), buf, sizeof(buf)); | |
258 | if (ret) | |
259 | return ret; | |
260 | ||
261 | udelay(TIMEOUT_SHORT_US); | |
262 | ||
263 | return 0; | |
264 | } | |
265 | ||
266 | static int cr50_i2c_wait_burststs(struct udevice *dev, u8 mask, | |
267 | size_t *burst, int *status) | |
268 | { | |
269 | struct cr50_priv *priv = dev_get_priv(dev); | |
270 | ulong timeout; | |
271 | u32 buf; | |
272 | ||
273 | /* | |
274 | * cr50 uses bytes 3:2 of status register for burst count and all 4 | |
275 | * bytes must be read | |
276 | */ | |
277 | timeout = timer_get_us() + TIMEOUT_LONG_US; | |
278 | while (timer_get_us() < timeout) { | |
279 | if (cr50_i2c_read(dev, tpm_sts(priv->locality), | |
280 | (u8 *)&buf, sizeof(buf)) < 0) { | |
281 | udelay(TIMEOUT_SHORT_US); | |
282 | continue; | |
283 | } | |
284 | ||
285 | *status = buf & 0xff; | |
286 | *burst = le16_to_cpu((buf >> 8) & 0xffff); | |
287 | ||
288 | if ((*status & mask) == mask && | |
289 | *burst > 0 && *burst <= CR50_MAX_BUF_SIZE) | |
290 | return 0; | |
291 | ||
292 | udelay(TIMEOUT_SHORT_US); | |
293 | } | |
294 | ||
295 | log_warning("Timeout reading burst and status\n"); | |
296 | ||
297 | return -ETIMEDOUT; | |
298 | } | |
299 | ||
300 | static int cr50_i2c_recv(struct udevice *dev, u8 *buf, size_t buf_len) | |
301 | { | |
302 | struct cr50_priv *priv = dev_get_priv(dev); | |
303 | size_t burstcnt, expected, current, len; | |
304 | u8 addr = tpm_data_fifo(priv->locality); | |
305 | u8 mask = TPM_STS_VALID | TPM_STS_DATA_AVAIL; | |
306 | u32 expected_buf; | |
307 | int status; | |
308 | int ret; | |
309 | ||
13ad993f | 310 | log_debug("%s: buf_len=%x\n", __func__, buf_len); |
d36856a3 SG |
311 | if (buf_len < TPM_HEADER_SIZE) |
312 | return -E2BIG; | |
313 | ||
314 | ret = cr50_i2c_wait_burststs(dev, mask, &burstcnt, &status); | |
315 | if (ret < 0) { | |
316 | log_warning("First chunk not available\n"); | |
317 | goto out_err; | |
318 | } | |
319 | ||
320 | /* Read first chunk of burstcnt bytes */ | |
321 | if (cr50_i2c_read(dev, addr, buf, burstcnt) < 0) { | |
322 | log_warning("Read failed\n"); | |
323 | goto out_err; | |
324 | } | |
325 | ||
326 | /* Determine expected data in the return buffer */ | |
327 | memcpy(&expected_buf, buf + TPM_CMD_COUNT_OFFSET, sizeof(expected_buf)); | |
328 | expected = be32_to_cpu(expected_buf); | |
329 | if (expected > buf_len) { | |
330 | log_warning("Too much data: %zu > %zu\n", expected, buf_len); | |
331 | goto out_err; | |
332 | } | |
333 | ||
334 | /* Now read the rest of the data */ | |
335 | current = burstcnt; | |
336 | while (current < expected) { | |
337 | /* Read updated burst count and check status */ | |
338 | if (cr50_i2c_wait_burststs(dev, mask, &burstcnt, &status) < 0) { | |
339 | log_warning("- burst failure1\n"); | |
340 | goto out_err; | |
341 | } | |
342 | ||
343 | len = min(burstcnt, expected - current); | |
344 | if (cr50_i2c_read(dev, addr, buf + current, len) != 0) { | |
345 | log_warning("Read failed\n"); | |
346 | goto out_err; | |
347 | } | |
348 | ||
349 | current += len; | |
350 | } | |
351 | ||
352 | if (cr50_i2c_wait_burststs(dev, TPM_STS_VALID, &burstcnt, | |
353 | &status) < 0) { | |
354 | log_warning("- burst failure2\n"); | |
355 | goto out_err; | |
356 | } | |
357 | if (status & TPM_STS_DATA_AVAIL) { | |
358 | log_warning("Data still available\n"); | |
359 | goto out_err; | |
360 | } | |
361 | ||
362 | return current; | |
363 | ||
364 | out_err: | |
365 | /* Abort current transaction if still pending */ | |
366 | ret = cr50_i2c_status(dev); | |
367 | if (ret < 0) | |
368 | return ret; | |
369 | if (ret & TPM_STS_COMMAND_READY) { | |
370 | ret = cr50_i2c_ready(dev); | |
371 | if (ret) | |
372 | return ret; | |
373 | } | |
374 | ||
375 | return -EIO; | |
376 | } | |
377 | ||
378 | static int cr50_i2c_send(struct udevice *dev, const u8 *buf, size_t len) | |
379 | { | |
380 | struct cr50_priv *priv = dev_get_priv(dev); | |
d36856a3 SG |
381 | int status; |
382 | size_t burstcnt, limit, sent = 0; | |
383 | u8 tpm_go[4] = { TPM_STS_GO }; | |
384 | ulong timeout; | |
385 | int ret; | |
386 | ||
13ad993f | 387 | log_debug("len=%x\n", len); |
d36856a3 SG |
388 | timeout = timer_get_us() + TIMEOUT_LONG_US; |
389 | do { | |
390 | ret = cr50_i2c_status(dev); | |
391 | if (ret < 0) | |
392 | goto out_err; | |
393 | if (ret & TPM_STS_COMMAND_READY) | |
394 | break; | |
395 | ||
396 | if (timer_get_us() > timeout) | |
397 | goto out_err; | |
398 | ||
399 | ret = cr50_i2c_ready(dev); | |
400 | if (ret) | |
401 | goto out_err; | |
402 | } while (1); | |
403 | ||
404 | while (len > 0) { | |
405 | u8 mask = TPM_STS_VALID; | |
406 | ||
407 | /* Wait for data if this is not the first chunk */ | |
408 | if (sent > 0) | |
409 | mask |= TPM_STS_DATA_EXPECT; | |
410 | ||
411 | if (cr50_i2c_wait_burststs(dev, mask, &burstcnt, &status) < 0) | |
412 | goto out_err; | |
413 | ||
414 | /* | |
415 | * Use burstcnt - 1 to account for the address byte | |
416 | * that is inserted by cr50_i2c_write() | |
417 | */ | |
418 | limit = min(burstcnt - 1, len); | |
419 | if (cr50_i2c_write(dev, tpm_data_fifo(priv->locality), | |
420 | &buf[sent], limit) != 0) { | |
421 | log_warning("Write failed\n"); | |
422 | goto out_err; | |
423 | } | |
424 | ||
425 | sent += limit; | |
426 | len -= limit; | |
427 | } | |
428 | ||
429 | /* Ensure TPM is not expecting more data */ | |
430 | if (cr50_i2c_wait_burststs(dev, TPM_STS_VALID, &burstcnt, &status) < 0) | |
431 | goto out_err; | |
432 | if (status & TPM_STS_DATA_EXPECT) { | |
433 | log_warning("Data still expected\n"); | |
434 | goto out_err; | |
435 | } | |
436 | ||
437 | /* Start the TPM command */ | |
438 | ret = cr50_i2c_write(dev, tpm_sts(priv->locality), tpm_go, | |
439 | sizeof(tpm_go)); | |
440 | if (ret) { | |
441 | log_warning("Start command failed\n"); | |
442 | goto out_err; | |
443 | } | |
444 | ||
445 | return sent; | |
446 | ||
447 | out_err: | |
448 | /* Abort current transaction if still pending */ | |
449 | ret = cr50_i2c_status(dev); | |
450 | ||
451 | if (ret < 0 || (ret & TPM_STS_COMMAND_READY)) { | |
452 | ret = cr50_i2c_ready(dev); | |
453 | if (ret) | |
454 | return ret; | |
455 | } | |
456 | ||
457 | return -EIO; | |
458 | } | |
459 | ||
460 | /** | |
461 | * process_reset() - Wait for the Cr50 to reset | |
462 | * | |
463 | * Cr50 processes reset requests asynchronously and conceivably could be busy | |
464 | * executing a long command and not reacting to the reset pulse for a while. | |
465 | * | |
466 | * This function will make sure that the AP does not proceed with boot until | |
467 | * TPM finished reset processing. | |
468 | * | |
469 | * @dev: Cr50 device | |
185f812c | 470 | * Return: 0 if OK, -EPERM if locality could not be taken |
d36856a3 SG |
471 | */ |
472 | static int process_reset(struct udevice *dev) | |
473 | { | |
474 | const int loc = 0; | |
475 | u8 access; | |
476 | ulong start; | |
477 | ||
478 | /* | |
479 | * Locality is released by TPM reset. | |
480 | * | |
481 | * If locality is taken at this point, this could be due to the fact | |
482 | * that the TPM is performing a long operation and has not processed | |
483 | * reset request yet. We'll wait up to CR50_TIMEOUT_INIT_MS and see if | |
484 | * it releases locality when reset is processed. | |
485 | */ | |
486 | start = get_timer(0); | |
487 | do { | |
488 | const u8 mask = TPM_ACCESS_VALID | TPM_ACCESS_ACTIVE_LOCALITY; | |
489 | int ret; | |
490 | ||
491 | ret = cr50_i2c_read(dev, tpm_access(loc), | |
492 | &access, sizeof(access)); | |
493 | if (ret || ((access & mask) == mask)) { | |
494 | /* | |
495 | * Don't bombard the chip with traffic; let it keep | |
496 | * processing the command. | |
497 | */ | |
498 | mdelay(2); | |
499 | continue; | |
500 | } | |
501 | ||
39565cc2 | 502 | log_debug("TPM ready after %ld ms\n", get_timer(start)); |
d36856a3 SG |
503 | |
504 | return 0; | |
505 | } while (get_timer(start) < TIMEOUT_INIT_MS); | |
506 | ||
39565cc2 SG |
507 | log_err("TPM failed to reset after %ld ms, status: %#x\n", |
508 | get_timer(start), access); | |
d36856a3 SG |
509 | |
510 | return -EPERM; | |
511 | } | |
512 | ||
513 | /* | |
514 | * Locality could be already claimed (if this is a later U-Boot phase and the | |
515 | * read-only U-Boot did not release it), or not yet claimed, if this is TPL or | |
516 | * the older read-only U-Boot did release it. | |
517 | */ | |
518 | static int claim_locality(struct udevice *dev, int loc) | |
519 | { | |
520 | const u8 mask = TPM_ACCESS_VALID | TPM_ACCESS_ACTIVE_LOCALITY; | |
79b7ade5 | 521 | struct cr50_priv *priv = dev_get_priv(dev); |
d36856a3 SG |
522 | u8 access; |
523 | int ret; | |
524 | ||
525 | ret = cr50_i2c_read(dev, tpm_access(loc), &access, sizeof(access)); | |
526 | if (ret) | |
527 | return log_msg_ret("read1", ret); | |
528 | ||
529 | if ((access & mask) == mask) { | |
530 | log_warning("Locality already claimed\n"); | |
531 | return 0; | |
532 | } | |
533 | ||
534 | access = TPM_ACCESS_REQUEST_USE; | |
535 | ret = cr50_i2c_write(dev, tpm_access(loc), &access, sizeof(access)); | |
536 | if (ret) | |
537 | return log_msg_ret("write", ret); | |
538 | ||
539 | ret = cr50_i2c_read(dev, tpm_access(loc), &access, sizeof(access)); | |
540 | if (ret) | |
541 | return log_msg_ret("read2", ret); | |
542 | ||
543 | if ((access & mask) != mask) { | |
544 | log_err("Failed to claim locality\n"); | |
545 | return -EPERM; | |
546 | } | |
39565cc2 | 547 | log_debug("Claimed locality %d\n", loc); |
79b7ade5 | 548 | priv->locality = loc; |
d36856a3 SG |
549 | |
550 | return 0; | |
551 | } | |
552 | ||
553 | static int cr50_i2c_get_desc(struct udevice *dev, char *buf, int size) | |
554 | { | |
caa4daa2 | 555 | struct dm_i2c_chip *chip = dev_get_parent_plat(dev); |
d36856a3 | 556 | struct cr50_priv *priv = dev_get_priv(dev); |
5372fc77 SG |
557 | int len; |
558 | ||
559 | len = snprintf(buf, size, "cr50 TPM 2.0 (i2c %02x id %x), ", | |
560 | chip->chip_addr, priv->vendor >> 16); | |
561 | if (priv->use_irq) { | |
562 | len += snprintf(buf + len, size - len, "irq=%s/%ld", | |
563 | priv->irq.dev->name, priv->irq.id); | |
564 | } else if (dm_gpio_is_valid(&priv->ready_gpio)) { | |
565 | len += snprintf(buf + len, size - len, "gpio=%s/%u", | |
566 | priv->ready_gpio.dev->name, | |
567 | priv->ready_gpio.offset); | |
568 | } else { | |
569 | len += snprintf(buf + len, size - len, "delay=%d", | |
570 | TIMEOUT_NO_IRQ_US); | |
571 | } | |
d36856a3 | 572 | |
5372fc77 | 573 | return len; |
d36856a3 SG |
574 | } |
575 | ||
576 | static int cr50_i2c_open(struct udevice *dev) | |
577 | { | |
578 | char buf[80]; | |
579 | int ret; | |
580 | ||
581 | ret = process_reset(dev); | |
582 | if (ret) | |
583 | return log_msg_ret("reset", ret); | |
584 | ||
585 | ret = claim_locality(dev, 0); | |
586 | if (ret) | |
587 | return log_msg_ret("claim", ret); | |
588 | ||
589 | cr50_i2c_get_desc(dev, buf, sizeof(buf)); | |
590 | log_debug("%s\n", buf); | |
591 | ||
592 | return 0; | |
593 | } | |
594 | ||
595 | static int cr50_i2c_cleanup(struct udevice *dev) | |
596 | { | |
79b7ade5 SG |
597 | struct cr50_priv *priv = dev_get_priv(dev); |
598 | ||
39565cc2 | 599 | log_debug("cleanup %d\n", priv->locality); |
79b7ade5 SG |
600 | if (priv->locality != -1) |
601 | release_locality(dev, 1); | |
d36856a3 SG |
602 | |
603 | return 0; | |
604 | } | |
605 | ||
eaac9717 SG |
606 | static int cr50_acpi_fill_ssdt(const struct udevice *dev, struct acpi_ctx *ctx) |
607 | { | |
608 | char scope[ACPI_PATH_MAX]; | |
609 | char name[ACPI_NAME_MAX]; | |
610 | const char *hid; | |
611 | int ret; | |
612 | ||
613 | ret = acpi_device_scope(dev, scope, sizeof(scope)); | |
614 | if (ret) | |
615 | return log_msg_ret("scope", ret); | |
616 | ret = acpi_get_name(dev, name); | |
617 | if (ret) | |
618 | return log_msg_ret("name", ret); | |
619 | ||
620 | hid = dev_read_string(dev, "acpi,hid"); | |
621 | if (!hid) | |
622 | return log_msg_ret("hid", ret); | |
623 | ||
624 | /* Device */ | |
625 | acpigen_write_scope(ctx, scope); | |
626 | acpigen_write_device(ctx, name); | |
627 | acpigen_write_name_string(ctx, "_HID", hid); | |
628 | acpigen_write_name_integer(ctx, "_UID", | |
629 | dev_read_u32_default(dev, "acpi,uid", 0)); | |
630 | acpigen_write_name_string(ctx, "_DDN", | |
631 | dev_read_string(dev, "acpi,ddn")); | |
632 | acpigen_write_sta(ctx, acpi_device_status(dev)); | |
633 | ||
634 | /* Resources */ | |
635 | acpigen_write_name(ctx, "_CRS"); | |
636 | acpigen_write_resourcetemplate_header(ctx); | |
637 | ret = acpi_device_write_i2c_dev(ctx, dev); | |
638 | if (ret < 0) | |
639 | return log_msg_ret("i2c", ret); | |
640 | ret = acpi_device_write_interrupt_or_gpio(ctx, (struct udevice *)dev, | |
641 | "ready-gpios"); | |
642 | if (ret < 0) | |
643 | return log_msg_ret("irq_gpio", ret); | |
644 | ||
645 | acpigen_write_resourcetemplate_footer(ctx); | |
646 | ||
647 | acpigen_pop_len(ctx); /* Device */ | |
648 | acpigen_pop_len(ctx); /* Scope */ | |
649 | ||
650 | return 0; | |
651 | } | |
652 | ||
d36856a3 SG |
653 | enum { |
654 | TPM_TIMEOUT_MS = 5, | |
655 | SHORT_TIMEOUT_MS = 750, | |
656 | LONG_TIMEOUT_MS = 2000, | |
657 | }; | |
658 | ||
d1998a9f | 659 | static int cr50_i2c_of_to_plat(struct udevice *dev) |
d36856a3 SG |
660 | { |
661 | struct tpm_chip_priv *upriv = dev_get_uclass_priv(dev); | |
662 | struct cr50_priv *priv = dev_get_priv(dev); | |
663 | struct irq irq; | |
664 | int ret; | |
665 | ||
666 | upriv->version = TPM_V2; | |
667 | upriv->duration_ms[TPM_SHORT] = SHORT_TIMEOUT_MS; | |
668 | upriv->duration_ms[TPM_MEDIUM] = LONG_TIMEOUT_MS; | |
669 | upriv->duration_ms[TPM_LONG] = LONG_TIMEOUT_MS; | |
670 | upriv->retry_time_ms = TPM_TIMEOUT_MS; | |
671 | ||
672 | upriv->pcr_count = 32; | |
673 | upriv->pcr_select_min = 2; | |
674 | ||
675 | /* Optional GPIO to track when cr50 is ready */ | |
676 | ret = irq_get_by_index(dev, 0, &irq); | |
677 | if (!ret) { | |
678 | priv->irq = irq; | |
679 | priv->use_irq = true; | |
680 | } else { | |
32e8ee00 | 681 | ret = gpio_request_by_name(dev, "ready-gpios", 0, |
d36856a3 SG |
682 | &priv->ready_gpio, GPIOD_IS_IN); |
683 | if (ret) { | |
684 | log_warning("Cr50 does not have an ready GPIO/interrupt (err=%d)\n", | |
685 | ret); | |
686 | } | |
687 | } | |
688 | ||
689 | return 0; | |
690 | } | |
691 | ||
692 | static int cr50_i2c_probe(struct udevice *dev) | |
693 | { | |
694 | struct cr50_priv *priv = dev_get_priv(dev); | |
695 | u32 vendor = 0; | |
696 | ulong start; | |
697 | ||
698 | /* | |
699 | * 150ms should be enough to synchronise with the TPM even under the | |
700 | * worst nested-reset-request conditions. In the vast majority of cases | |
701 | * there will be no wait at all. | |
702 | */ | |
703 | start = get_timer(0); | |
704 | while (get_timer(start) < 150) { | |
705 | int ret; | |
706 | ||
707 | /* Exit once DID and VID verified */ | |
708 | ret = cr50_i2c_read(dev, tpm_did_vid(0), (u8 *)&vendor, 4); | |
709 | if (!ret && vendor == CR50_DID_VID) | |
710 | break; | |
711 | ||
712 | /* TPM might be resetting; let's retry in a bit */ | |
713 | mdelay(10); | |
714 | } | |
715 | if (vendor != CR50_DID_VID) { | |
5372fc77 | 716 | log_warning("DID_VID %08x not recognised\n", vendor); |
d36856a3 SG |
717 | return log_msg_ret("vendor-id", -EXDEV); |
718 | } | |
719 | priv->vendor = vendor; | |
79b7ade5 | 720 | priv->locality = -1; |
5372fc77 | 721 | log_debug("Cr50 ready\n"); |
d36856a3 SG |
722 | |
723 | return 0; | |
724 | } | |
725 | ||
eaac9717 SG |
726 | struct acpi_ops cr50_acpi_ops = { |
727 | .fill_ssdt = cr50_acpi_fill_ssdt, | |
728 | }; | |
729 | ||
d36856a3 SG |
730 | static const struct tpm_ops cr50_i2c_ops = { |
731 | .open = cr50_i2c_open, | |
732 | .get_desc = cr50_i2c_get_desc, | |
733 | .send = cr50_i2c_send, | |
734 | .recv = cr50_i2c_recv, | |
735 | .cleanup = cr50_i2c_cleanup, | |
736 | }; | |
737 | ||
738 | static const struct udevice_id cr50_i2c_ids[] = { | |
739 | { .compatible = "google,cr50" }, | |
740 | { } | |
741 | }; | |
742 | ||
3039fc7e SG |
743 | U_BOOT_DRIVER(google_cr50) = { |
744 | .name = "google_cr50", | |
d36856a3 SG |
745 | .id = UCLASS_TPM, |
746 | .of_match = cr50_i2c_ids, | |
747 | .ops = &cr50_i2c_ops, | |
d1998a9f | 748 | .of_to_plat = cr50_i2c_of_to_plat, |
d36856a3 | 749 | .probe = cr50_i2c_probe, |
79b7ade5 | 750 | .remove = cr50_i2c_cleanup, |
41575d8e | 751 | .priv_auto = sizeof(struct cr50_priv), |
eaac9717 | 752 | ACPI_OPS_PTR(&cr50_acpi_ops) |
79b7ade5 | 753 | .flags = DM_FLAG_OS_PREPARE, |
d36856a3 | 754 | }; |