[u-boot.git] / board / BuR / common / common.c

// SPDX-License-Identifier: GPL-2.0+
/*
 * common.c
 *
 * common board functions for B&R boards
 *
 * Copyright (C) 2013 Hannes Schmelzer <[email protected]>
 * Bernecker & Rainer Industrieelektronik GmbH - http://www.br-automation.com
 *
 */
#include <log.h>
#include <version.h>
#include <env.h>
#include <fdtdec.h>
#include <i2c.h>
#include <asm/global_data.h>
#include <linux/delay.h>
#include "bur_common.h"

DECLARE_GLOBAL_DATA_PTR;

/* --------------------------------------------------------------------------*/

int ft_board_setup(void *blob, struct bd_info *bd)
{
	int nodeoffset;

	nodeoffset = fdt_path_offset(blob, "/factory-settings");
	if (nodeoffset < 0) {
		printf("%s: cannot find /factory-settings, trying /fset\n",
		       __func__);
		nodeoffset = fdt_path_offset(blob, "/fset");
		if (nodeoffset < 0) {
			printf("%s: cannot find /fset.\n", __func__);
			return 0;
		}
	}

	if (fdt_setprop(blob, nodeoffset, "bl-version",
			PLAIN_VERSION, strlen(PLAIN_VERSION)) != 0) {
		printf("%s: no 'bl-version' prop in fdt!\n", __func__);
		return 0;
	}
	return 0;
}

int brdefaultip_setup(int bus, int chip)
{
	int rc;
	struct udevice *i2cdev;
	u8 u8buf = 0;
	char defip[256] = { 0 };

	rc = i2c_get_chip_for_busnum(bus, chip, 2, &i2cdev);
	if (rc != 0) {
		printf("WARN: cannot probe baseboard EEPROM!\n");
		return -1;
	}

	rc = dm_i2c_read(i2cdev, 0, &u8buf, 1);
	if (rc != 0) {
		printf("WARN: cannot read baseboard EEPROM!\n");
		return -1;
	}

	if (u8buf != 0xFF)
		snprintf(defip, sizeof(defip),
			 "if test -r ${ipaddr}; then; else setenv ipaddr 192.168.60.%d; setenv serverip 192.168.60.254; setenv gatewayip 192.168.60.254; setenv netmask 255.255.255.0; fi;",
			 u8buf);
	else
		strncpy(defip,
			"if test -r ${ipaddr}; then; else setenv ipaddr 192.168.60.1; setenv serverip 192.168.60.254; setenv gatewayip 192.168.60.254; setenv netmask 255.255.255.0; fi;",
			sizeof(defip));

	env_set("brdefaultip", defip);
	env_set_hex("board_id", u8buf);

	return 0;
}

int overwrite_console(void)
{
	return 1;
}

#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_AM33XX)
#include <asm/arch/hardware.h>
#include <asm/arch/omap.h>
#include <asm/arch/clock.h>
#include <asm/arch/sys_proto.h>
#include <power/tps65217.h>

static struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE;

void pmicsetup(u32 mpupll, unsigned int bus)
{
	int mpu_vdd;
	int usb_cur_lim;

	if (power_tps65217_init(bus)) {
		printf("WARN: cannot setup PMIC 0x24 @ bus #%d, not found!.\n",
		       bus);
		return;
	}

	/* Get the frequency which is defined by device fuses */
	dpll_mpu_opp100.m = am335x_get_efuse_mpu_max_freq(cdev);
	printf("detected max. frequency: %d - ", dpll_mpu_opp100.m);

	if (0 != mpupll) {
		dpll_mpu_opp100.m = mpupll;
		printf("retuning MPU-PLL to: %d MHz.\n", dpll_mpu_opp100.m);
	} else {
		puts("ok.\n");
	}
	/*
	 * Increase USB current limit to 1300mA or 1800mA and set
	 * the MPU voltage controller as needed.
	 */
	if (dpll_mpu_opp100.m == MPUPLL_M_1000) {
		usb_cur_lim = TPS65217_USB_INPUT_CUR_LIMIT_1800MA;
		mpu_vdd = TPS65217_DCDC_VOLT_SEL_1325MV;
	} else {
		usb_cur_lim = TPS65217_USB_INPUT_CUR_LIMIT_1300MA;
		mpu_vdd = TPS65217_DCDC_VOLT_SEL_1275MV;
	}

	if (tps65217_reg_write(TPS65217_PROT_LEVEL_NONE, TPS65217_POWER_PATH,
			       usb_cur_lim, TPS65217_USB_INPUT_CUR_LIMIT_MASK))
		puts("tps65217_reg_write failure\n");

	/* Set DCDC3 (CORE) voltage to 1.125V */
	if (tps65217_voltage_update(TPS65217_DEFDCDC3,
				    TPS65217_DCDC_VOLT_SEL_1125MV)) {
		puts("tps65217_voltage_update failure\n");
		return;
	}

	/* Set CORE Frequencies to OPP100 */
	do_setup_dpll(&dpll_core_regs, &dpll_core_opp100);

	/* Set DCDC2 (MPU) voltage */
	if (tps65217_voltage_update(TPS65217_DEFDCDC2, mpu_vdd)) {
		puts("tps65217_voltage_update failure\n");
		return;
	}

	/* Set LDO3 to 1.8V */
	if (tps65217_reg_write(TPS65217_PROT_LEVEL_2,
			       TPS65217_DEFLS1,
			       TPS65217_LDO_VOLTAGE_OUT_1_8,
			       TPS65217_LDO_MASK))
		puts("tps65217_reg_write failure\n");
	/* Set LDO4 to 3.3V */
	if (tps65217_reg_write(TPS65217_PROT_LEVEL_2,
			       TPS65217_DEFLS2,
			       TPS65217_LDO_VOLTAGE_OUT_3_3,
			       TPS65217_LDO_MASK))
		puts("tps65217_reg_write failure\n");

	/* Set MPU Frequency to what we detected now that voltages are set */
	do_setup_dpll(&dpll_mpu_regs, &dpll_mpu_opp100);
	/* Set PWR_EN bit in Status Register */
	tps65217_reg_write(TPS65217_PROT_LEVEL_NONE,
			   TPS65217_STATUS, TPS65217_PWR_OFF, TPS65217_PWR_OFF);
}

void set_uart_mux_conf(void)
{
	enable_uart0_pin_mux();
}

void set_mux_conf_regs(void)
{
	enable_board_pin_mux();
}

#endif /* CONFIG_SPL_BUILD && CONFIG_AM33XX */
Commit	Line	Data
83d290c5	1	// SPDX-License-Identifier: GPL-2.0+
893c04e1 HP	2	/*
	3	* common.c
	4	*
	5	* common board functions for B&R boards
	6	*
4c302b9a	7	* Copyright (C) 2013 Hannes Schmelzer <[email protected]>
893c04e1 HP	8	* Bernecker & Rainer Industrieelektronik GmbH - http://www.br-automation.com
893c04e1 HP	9	*
893c04e1	10	*/
f7ae49fc	11	#include <log.h>
fbd5aeda	12	#include <version.h>
c7694dd4	13	#include <env.h>
ad6be25c	14	#include <fdtdec.h>
893c04e1	15	#include <i2c.h>
401d1c4f	16	#include <asm/global_data.h>
c05ed00a	17	#include <linux/delay.h>
893c04e1 HP	18	#include "bur_common.h"
893c04e1 HP	19
fbd5aeda HP	20	DECLARE_GLOBAL_DATA_PTR;
fbd5aeda HP	21
893c04e1	22	/* --------------------------------------------------------------------------*/
fbd5aeda	23
b75d8dc5	24	int ft_board_setup(void blob, struct bd_info bd)
e2259704 HS	25	{
	26	int nodeoffset;
	27
	28	nodeoffset = fdt_path_offset(blob, "/factory-settings");
	29	if (nodeoffset < 0) {
d63f7130 HS	30	printf("%s: cannot find /factory-settings, trying /fset\n",
	31	__func__);
	32	nodeoffset = fdt_path_offset(blob, "/fset");
	33	if (nodeoffset < 0) {
	34	printf("%s: cannot find /fset.\n", __func__);
	35	return 0;
	36	}
e2259704	37	}
d63f7130	38
e2259704 HS	39	if (fdt_setprop(blob, nodeoffset, "bl-version",
e2259704 HS	40	PLAIN_VERSION, strlen(PLAIN_VERSION)) != 0) {
d63f7130 HS	41	printf("%s: no 'bl-version' prop in fdt!\n", __func__);
d63f7130 HS	42	return 0;
e2259704	43	}
e2259704 HS	44	return 0;
	45	}
	46
2fac7a82 HS	47	int brdefaultip_setup(int bus, int chip)
	48	{
	49	int rc;
	50	struct udevice *i2cdev;
	51	u8 u8buf = 0;
	52	char defip[256] = { 0 };
	53
	54	rc = i2c_get_chip_for_busnum(bus, chip, 2, &i2cdev);
	55	if (rc != 0) {
	56	printf("WARN: cannot probe baseboard EEPROM!\n");
	57	return -1;
	58	}
	59
	60	rc = dm_i2c_read(i2cdev, 0, &u8buf, 1);
	61	if (rc != 0) {
	62	printf("WARN: cannot read baseboard EEPROM!\n");
	63	return -1;
	64	}
	65
	66	if (u8buf != 0xFF)
	67	snprintf(defip, sizeof(defip),
	68	"if test -r ${ipaddr}; then; else setenv ipaddr 192.168.60.%d; setenv serverip 192.168.60.254; setenv gatewayip 192.168.60.254; setenv netmask 255.255.255.0; fi;",
	69	u8buf);
	70	else
	71	strncpy(defip,
	72	"if test -r ${ipaddr}; then; else setenv ipaddr 192.168.60.1; setenv serverip 192.168.60.254; setenv gatewayip 192.168.60.254; setenv netmask 255.255.255.0; fi;",
	73	sizeof(defip));
	74
	75	env_set("brdefaultip", defip);
	76	env_set_hex("board_id", u8buf);
	77
	78	return 0;
	79	}
	80
47656d98 HS	81	int overwrite_console(void)
	82	{
	83	return 1;
	84	}
	85
ad6be25c HS	86	#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_AM33XX)
	87	#include <asm/arch/hardware.h>
	88	#include <asm/arch/omap.h>
	89	#include <asm/arch/clock.h>
	90	#include <asm/arch/sys_proto.h>
	91	#include <power/tps65217.h>
fbc7c7de HS	92
	93	static struct ctrl_dev cdev = (struct ctrl_dev )CTRL_DEVICE_BASE;
	94
a9484aa7	95	void pmicsetup(u32 mpupll, unsigned int bus)
893c04e1 HP	96	{
	97	int mpu_vdd;
	98	int usb_cur_lim;
	99
a9484aa7 HS	100	if (power_tps65217_init(bus)) {
	101	printf("WARN: cannot setup PMIC 0x24 @ bus #%d, not found!.\n",
	102	bus);
893c04e1 HP	103	return;
	104	}
	105
	106	/* Get the frequency which is defined by device fuses */
	107	dpll_mpu_opp100.m = am335x_get_efuse_mpu_max_freq(cdev);
	108	printf("detected max. frequency: %d - ", dpll_mpu_opp100.m);
	109
	110	if (0 != mpupll) {
96cf89f8	111	dpll_mpu_opp100.m = mpupll;
893c04e1 HP	112	printf("retuning MPU-PLL to: %d MHz.\n", dpll_mpu_opp100.m);
	113	} else {
	114	puts("ok.\n");
	115	}
	116	/*
	117	* Increase USB current limit to 1300mA or 1800mA and set
	118	* the MPU voltage controller as needed.
	119	*/
	120	if (dpll_mpu_opp100.m == MPUPLL_M_1000) {
	121	usb_cur_lim = TPS65217_USB_INPUT_CUR_LIMIT_1800MA;
	122	mpu_vdd = TPS65217_DCDC_VOLT_SEL_1325MV;
	123	} else {
	124	usb_cur_lim = TPS65217_USB_INPUT_CUR_LIMIT_1300MA;
	125	mpu_vdd = TPS65217_DCDC_VOLT_SEL_1275MV;
	126	}
	127
	128	if (tps65217_reg_write(TPS65217_PROT_LEVEL_NONE, TPS65217_POWER_PATH,
	129	usb_cur_lim, TPS65217_USB_INPUT_CUR_LIMIT_MASK))
	130	puts("tps65217_reg_write failure\n");
	131
	132	/* Set DCDC3 (CORE) voltage to 1.125V */
	133	if (tps65217_voltage_update(TPS65217_DEFDCDC3,
	134	TPS65217_DCDC_VOLT_SEL_1125MV)) {
	135	puts("tps65217_voltage_update failure\n");
	136	return;
	137	}
	138
	139	/* Set CORE Frequencies to OPP100 */
	140	do_setup_dpll(&dpll_core_regs, &dpll_core_opp100);
	141
	142	/* Set DCDC2 (MPU) voltage */
	143	if (tps65217_voltage_update(TPS65217_DEFDCDC2, mpu_vdd)) {
	144	puts("tps65217_voltage_update failure\n");
	145	return;
	146	}
	147
	148	/* Set LDO3 to 1.8V */
	149	if (tps65217_reg_write(TPS65217_PROT_LEVEL_2,
	150	TPS65217_DEFLS1,
	151	TPS65217_LDO_VOLTAGE_OUT_1_8,
	152	TPS65217_LDO_MASK))
	153	puts("tps65217_reg_write failure\n");
	154	/* Set LDO4 to 3.3V */
	155	if (tps65217_reg_write(TPS65217_PROT_LEVEL_2,
	156	TPS65217_DEFLS2,
	157	TPS65217_LDO_VOLTAGE_OUT_3_3,
	158	TPS65217_LDO_MASK))
	159	puts("tps65217_reg_write failure\n");
	160
	161	/* Set MPU Frequency to what we detected now that voltages are set */
	162	do_setup_dpll(&dpll_mpu_regs, &dpll_mpu_opp100);
fbd5aeda HP	163	/* Set PWR_EN bit in Status Register */
	164	tps65217_reg_write(TPS65217_PROT_LEVEL_NONE,
	165	TPS65217_STATUS, TPS65217_PWR_OFF, TPS65217_PWR_OFF);
893c04e1 HP	166	}
	167
	168	void set_uart_mux_conf(void)
	169	{
	170	enable_uart0_pin_mux();
	171	}
	172
	173	void set_mux_conf_regs(void)
	174	{
	175	enable_board_pin_mux();
	176	}
	177
ad6be25c	178	#endif /* CONFIG_SPL_BUILD && CONFIG_AM33XX */