]> Git Repo - qemu.git/commit
projects / qemu.git / commit
? search:
summary | shortlog | log | commit | commitdiff | tree
(parent: 8e7e8a5) | patch
target-mips: add CMGCRBase register
authorYongbok Kim <[email protected]>
Tue, 15 Mar 2016 09:59:27 +0000 (09:59 +0000)
committerLeon Alrae <[email protected]>
Wed, 30 Mar 2016 08:13:59 +0000 (09:13 +0100)
commitc870e3f52cac0c8a4a1377398327c4ff20d49d41
tree2756e94fce28c6ca90448734ea62d66e20b9b80ftree | snapshot
parent8e7e8a5b7b95c143f396f6aadd310e9ff2f7efd3commit | diff
target-mips: add CMGCRBase register

Physical base address for the memory-mapped Coherency Manager Global
Configuration Register space.
The MIPS default location for the GCR_BASE address is 0x1FBF_8.
This register only exists if Config3 CMGCR is set to one.

Signed-off-by: Yongbok Kim <[email protected]>
[[email protected]: move CMGCR enabling to a separate patch]
Signed-off-by: Leon Alrae <[email protected]>
target-mips/cpu.h diff | blob | blame | history
target-mips/translate.c diff | blob | blame | history
Empty description
This page took 0.024787 seconds and 4 git commands to generate.