Peter Maydell [Thu, 21 Feb 2019 18:17:46 +0000 (18:17 +0000)]
hw/misc/tz-ppc: Support having unused ports in the middle of the range
The Peripheral Protection Controller's handling of unused ports
is that if there is nothing connected to the port's downstream
then it does not create the sysbus MMIO region for the upstream
end of the port. This results in odd behaviour when there is
an unused port in the middle of the range: since sysbus MMIO
regions are implicitly consecutively allocated, any used ports
above the unused ones end up with sysbus MMIO region numbers
that don't match the port number.
Avoid this numbering mismatch by creating dummy MMIO regions
for the unused ports. This doesn't change anything for our
existing boards, which don't have any gaps in the middle of
the port ranges they use; but it will be needed for the Musca
board.
There are lots of special cases within these insns. Split the
major argument decode/loading/saving into no_output (compares),
rd_is_dp, and rm_is_dp.
We still need to special case argument load for compare (rd as
input, rm as zero) and vcvt fixed (rd as input+output), but lots
of special cases do disappear.
Now that we have a full switch at the beginning, hoist the ISA
checks from the code generation.
Move all of the fp helpers out of helper.c into a new file.
This is code movement only. Since helper.c has no copyright
header, take the one from cpu.h for the new file.
Peter Maydell [Thu, 21 Feb 2019 18:17:45 +0000 (18:17 +0000)]
target/arm: v8M MPU should use background region as default, not always
The "background region" for a v8M MPU is a default which will be used
(if enabled, and if the access is privileged) if the access does
not match any specific MPU region. We were incorrectly using it
always (by putting the condition at the wrong nesting level). This
meant that we would always return the default background permissions
rather than the correct permissions for a specific region, and also
that we would not return the right information in response to a
TT instruction.
Move the check for the background region to the same place in the
logic as the equivalent v8M MPUCheck() pseudocode puts it.
This in turn means we must adjust the condition we use to detect
matches in multiple regions to avoid false-positives.
Peter Maydell [Thu, 21 Feb 2019 18:17:45 +0000 (18:17 +0000)]
hw/arm/armsse: Fix memory leak in error-exit path
Coverity points out (CID 1398632, CID 1398650) that we
leak a couple of allocated strings in the error-exit
code path for setting up the MHUs in the ARMSSE.
Fix this bug by moving the allocate-and-free of each
string to be closer to the use, so we do the free before
doing the error-exit check.
* remotes/jnsnow/tags/bitmaps-pull-request:
blockdev: acquire aio_context for bitmap add/remove
block/dirty-bitmap: Documentation and Comment fixups
dirty-bitmap: Expose persistent flag to 'query-block'
* remotes/kraxel/tags/usb-20190220-pull-request:
usb: remove unnecessary NULL device check from usb_ep_get()
usb: add device checks before redirector calls to usb_ep_get()
usb: check device is not NULL before calling usb_ep_get()
uhci: check device is not NULL before calling usb_ep_get()
ohci: check device is not NULL before calling usb_ep_get()
ehci: check device is not NULL before calling usb_ep_get()
xhci: check device is not NULL before calling usb_ep_get()
xhci: add asserts to help with static code analysis
usb: rearrange usb_ep_get()
Liam Merwick [Wed, 6 Feb 2019 13:36:56 +0000 (13:36 +0000)]
usb: remove unnecessary NULL device check from usb_ep_get()
No caller of usb_ep_get() calls it with a NULL device (previous commits
have addressed the few remaining cases which didn't explicitly check).
Replace check for 'dev == NULL' with an assert instead.
Liam Merwick [Wed, 6 Feb 2019 13:36:54 +0000 (13:36 +0000)]
usb: check device is not NULL before calling usb_ep_get()
In musb_packet(), the call to usb_find_device() can return NULL
if it doesn't find a device matching 'addr' so explicitly check
the return value before passing it to usb_ep_get(). This then
allows the subsequent calculation of 'id' to be streamlined.
Liam Merwick [Wed, 6 Feb 2019 13:36:53 +0000 (13:36 +0000)]
uhci: check device is not NULL before calling usb_ep_get()
In uhci_handle_td(), the call to ehci_find_device() can return NULL
if it doesn't find a device matching 'addr' so explicitly check
the return value before passing it to usb_ep_get().
Liam Merwick [Wed, 6 Feb 2019 13:36:52 +0000 (13:36 +0000)]
ohci: check device is not NULL before calling usb_ep_get()
A call to ohci_find_device() can return NULL if it doesn't find a
device matching 'addr' so for the two callers, explicitly check
the return value before passing it to usb_ep_get().
Liam Merwick [Wed, 6 Feb 2019 13:36:51 +0000 (13:36 +0000)]
ehci: check device is not NULL before calling usb_ep_get()
In ehci_process_itd(), the call to ehci_find_device() can return NULL
if it doesn't find a device matching 'devaddr' so explicitly check
the return value before passing it to usb_ep_get().
Liam Merwick [Wed, 6 Feb 2019 13:36:49 +0000 (13:36 +0000)]
xhci: add asserts to help with static code analysis
Most callers of xhci_port_update() and xhci_wakeup() pass in a pointer
to an array entry and can never be NULL but add two defensive asserts
to protect against future changes (e.g. adding a new port speed, etc.)
adding a path through xhci_lookup_port() that could result in the
return of a NULL XHCIPort.
Liam Merwick [Wed, 6 Feb 2019 13:36:48 +0000 (13:36 +0000)]
usb: rearrange usb_ep_get()
There is no need to calculate the 'eps' variable in usb_ep_get()
if 'ep' is the control endpoint. Instead the calculation should
be done after validating the input before returning an entry
indexed by the endpoint 'ep'.
John Snow [Tue, 19 Feb 2019 22:49:43 +0000 (17:49 -0500)]
blockdev: acquire aio_context for bitmap add/remove
When bitmaps are persistent, they may incur a disk read or write when bitmaps
are added or removed. For configurations like virtio-dataplane, failing to
acquire this lock will abort QEMU when disk IO occurs.
We used to acquire aio_context as part of the bitmap lookup, so re-introduce
the lock for just the cases that have an IO penalty. Commit 2119882c removed
these locks, and I failed to notice this when we committed fd5ae4cc, so this
has been broken since persistent bitmaps were introduced.
Eric Blake [Tue, 19 Feb 2019 22:49:43 +0000 (17:49 -0500)]
dirty-bitmap: Expose persistent flag to 'query-block'
Since qemu currently doesn't flush persistent bitmaps to disk until
shutdown (which might be MUCH later), it's useful if 'query-block'
at least shows WHICH bitmaps will (eventually) make it to persistent
storage. Update affected iotests.
* remotes/dgibson/tags/ppc-for-4.0-20190219: (43 commits)
target/ppc: convert vmin* and vmax* to vector operations
target/ppc: convert vadd*s and vsub*s to vector operations
target/ppc: Split out VSCR_SAT to a vector field
target/ppc: Add set_vscr_sat
target/ppc: Use mtvscr/mfvscr for vmstate
target/ppc: Add helper_mfvscr
target/ppc: Remove vscr_nj and vscr_sat
target/ppc: Use helper_mtvscr for reset and gdb
target/ppc: Pass integer to helper_mtvscr
target/ppc: convert xxsel to vector operations
target/ppc: convert xxspltw to vector operations
target/ppc: convert xxspltib to vector operations
target/ppc: convert VSX logical operations to vector operations
target/ppc: convert vsplt[bhw] to use vector operations
target/ppc: convert vspltis[bhw] to use vector operations
target/ppc: convert vaddu[b,h,w,d] and vsubu[b,h,w,d] over to use vector operations
target/ppc: convert VMX logical instructions to use vector operations
xics: Drop the KVM ICS class
spapr/irq: Use the "simple" ICS class for KVM
xics: Handle KVM interrupt presentation from "simple" ICS code
...
Peter Maydell [Mon, 18 Feb 2019 14:23:13 +0000 (14:23 +0000)]
Merge remote-tracking branch 'remotes/armbru/tags/pull-qapi-2019-02-18' into staging
QAPI patches for 2019-02-18
# gpg: Signature made Mon 18 Feb 2019 13:44:30 GMT
# gpg: using RSA key 3870B400EB918653
# gpg: Good signature from "Markus Armbruster <[email protected]>" [full]
# gpg: aka "Markus Armbruster <[email protected]>" [full]
# Primary key fingerprint: 354B C8B3 D7EB 2A6B 6867 4E5F 3870 B400 EB91 8653
* remotes/armbru/tags/pull-qapi-2019-02-18:
qapi: move RTC_CHANGE to the target schema
qmp: Deprecate query-events in favor of query-qmp-schema
Revert "qapi-events: add 'if' condition to implicit event enum"
qapi: remove qmp_unregister_command()
qapi: make query-cpu-definitions depend on specific targets
qapi: make query-cpu-model-expansion depend on s390 or x86
qapi: make query-gic-capabilities depend on TARGET_ARM
target.json: add a note about query-cpu* not being s390x-specific
qapi: make s390 commands depend on TARGET_S390X
qapi: make rtc-reset-reinjection and SEV depend on TARGET_I386
qapi: New module target.json
build: Deal with all of QAPI's .o in qapi/Makefile.objs
build-sys: move qmp-introspect per target
qapi: Generate QAPIEvent stuff into separate files
qapi: Prepare for system modules other than 'builtin'
qapi: Clean up modular built-in code generation a bit
qapi: Fix up documentation for recent commit a95291007b2
qapi: Belatedly document modular code generation
A few targets don't emit RTC_CHANGE, we could restrict the event to
the tagets that do emit it.
Note: There is a lot more of events & commands that we could restrict
to capable targets, with the cost of some additional complexity, but
the benefit of added correctness and better introspection.
qmp: Deprecate query-events in favor of query-qmp-schema
query-events doesn't reflect compile-time configuration. Instead of
fixing that, deprecate the command in favor of query-qmp-schema.
Libvirt prefers query-qmp-schema as of commit 22d7222ec0 "qemu: caps:
Don't call 'query-events' when we probe events from QMP schema".
It'll be in the next release.
The commit applied the events' conditions to the members of enum
QAPIEvent. Awkward, because it renders QAPIEvent unusable in
target-independent code as soon as we make an event target-dependent.
Reverting this has the following effects:
* ui/vnc.c can remain target independent.
* monitor_qapi_event_conf[] doesn't have to muck around with #ifdef.
* query-events again doesn't reflect conditionals. I'm going to
deprecate it in favor of query-qmp-schema.
Another option would be to split target-dependent parts off enum
QAPIEvent into a target-dependent enum. Doesn't seem worthwhile right
now.
We can't add appropriate target-specific conditionals to misc.json,
because that would make all of misc.json unusable in
target-independent code. To keep misc.json target-independent, we
need to split off target-dependent target.json.
This commit doesn't actually split off anything, it merely creates the
empty module. The next few patches will move stuff from misc.json
there.
build: Deal with all of QAPI's .o in qapi/Makefile.objs
Adding QAPI's .o to util-obj-y, common-obj-y and obj-y is spread over
three places: Makefile.objs takes care of target-independent generated
code, Makefile.target of target-dependent generated code, and
qapi/Makefile.objs of (target-independent) hand-written code.
The following patches are going to introduce per-target #ifdef in the
schemas.
The introspection data is statically generated once, and must thus be
built per-target to reflect target-specific configuration.
Drop "do_test_visitor_in_qmp_introspect(&qmp_schema_qlit)" since the
schema is no longer in a common object. It is covered by the per-target
query-qmp-schema test instead.
qapi: Generate QAPIEvent stuff into separate files
Having to include qapi-events.h just for QAPIEvent is suboptimal, but
quite tolerable now. It'll become problematic when we have events
conditional on the target, because then qapi-events.h won't be usable
from target-independent code anymore. Avoid that by generating it
into separate files.
qapi: Prepare for system modules other than 'builtin'
The next commit wants to generate qapi-emit-events.{c.h}. To enable
that, extend QAPISchemaModularCVisitor to support additional "system
modules", i.e. modules that don't correspond to a (user-defined) QAPI
schema module.
qapi: Clean up modular built-in code generation a bit
We neglect to call .visit_module() for the special module we use for
built-ins. Harmless, but clean it up anyway. The
tests/qapi-schema/*.out now show the built-in module as 'module None'.
Subclasses of QAPISchemaModularCVisitor need to ._add_module() this
special module to enable code generation for built-ins. When this
hasn't been done, QAPISchemaModularCVisitor.visit_module() does
nothing for the special module. That looks like built-ins could
accidentally be generated into the wrong module when a subclass
neglects to call ._add_module(). Can't happen, because built-ins are
all visited before any other module. But that's non-obvious. Switch
off code generation explicitly.
Rename QAPISchemaModularCVisitor._begin_module() to
._begin_user_module().
New QAPISchemaModularCVisitor._is_builtin_module(), for clarity.
We generate code for built-ins and sub-modules into separate files
since commit cdb6610ae42 and 252dc3105fc (v2.12.0). Both commits
neglected to update documentation. Do that now.
Peter Maydell [Mon, 18 Feb 2019 11:32:00 +0000 (11:32 +0000)]
Merge remote-tracking branch 'remotes/cohuck/tags/s390x-20190218' into staging
s390x updates:
- tcg: implement STCK and friends for CONFIG_USER_ONLY
- add zpci to qemu cpu model, as pci is now always built
- add mepoch to default z14 cpu model
- add cpu model for z14 GA2
- various improvements
* remotes/cohuck/tags/s390x-20190218:
s390x: upgrade status of KVM cores to "supported"
s390x/kvm: add tracepoint to ioeventfd interface
s390x/cpumodel: add z14 GA2 model
s390x/cpumodel: default enable mepoch for z14 and later
s390x/cpumodel: mepochptff: warn when no mepoch and re-align group init
s390x: add zPCI feature to "qemu" CPU model
target/s390x: Implement STCK et al for CONFIG_USER_ONLY
target/s390x: Split out s390-tod.h
s390x: always provide pci support
s390x: Fix the confusing contributions-after-2012 license statements
Collin Walling [Tue, 12 Feb 2019 01:16:56 +0000 (20:16 -0500)]
s390x/cpumodel: default enable mepoch for z14 and later
Latest systems and host kernels support mepoch, which is a
feature that was meant to be supported for z14 GA1 from the
get-go. Let's copy it to the z14 GA1 default CPU model.
Machines s390-ccw-virtio-3.1 and older will retain the old CPU
models and will not provide this bit nor the extended PTFF
functions in the default model.
Collin Walling [Tue, 12 Feb 2019 01:16:55 +0000 (20:16 -0500)]
s390x/cpumodel: mepochptff: warn when no mepoch and re-align group init
The extended PTFF features (qsie, qtoue, stoe, stoue) are dependent
on the multiple-epoch facility (mepoch). Let's print a warning if these
features are enabled without mepoch.
While we're at it, let's move the FEAT_GROUP_INIT for mepochptff down
the s390_feature_groups list so it can be properly indexed with its
generated S390FeatGroup enum.
target/s390x: Implement STCK et al for CONFIG_USER_ONLY
This is a non-privileged instruction that was only implemented
for system mode. However, the stck instruction is used by glibc,
so this was causing SIGILL for programs run under debian stretch.
Cornelia Huck [Mon, 11 Feb 2019 11:32:55 +0000 (12:32 +0100)]
s390x: always provide pci support
We tried to make pci support optional on s390x in the past;
unfortunately, we still require the s390 phb to be created
unconditionally due to backwards compatibility issues.
Instead of sinking more effort into this (including compat
handling for older machines etc.) for non-obvious gains, let's
just make CONFIG_PCI something that is always set on s390x.
Note that you can still fence off pci for the _guest_ if you
provide a cpu model without the zpci feature.
Thomas Huth [Wed, 6 Feb 2019 12:41:33 +0000 (13:41 +0100)]
s390x: Fix the confusing contributions-after-2012 license statements
The license information in these files is rather confusing. The text
declares LGPL first, but then says that contributions after 2012 are
licensed under the GPL instead. How should the average user who just
downloaded the release tarball know which part is now GPL and which
is LGPL?
Looking at the text of the LGPL (see COPYING.LIB in the top directory),
the license clearly states how this should be done instead:
"3. You may opt to apply the terms of the ordinary GNU General Public
License instead of this License to a given copy of the Library. To do
this, you must alter all the notices that refer to this License, so
that they refer to the ordinary GNU General Public License, version 2,
instead of to this License."
Thus let's clean up the confusing statements and use the proper GPL
text only.
Greg Kurz [Fri, 15 Feb 2019 11:40:30 +0000 (12:40 +0100)]
xics: Handle KVM interrupt presentation from "simple" ICS code
We want to use the "simple" ICS type in both KVM and non-KVM setups.
Teach the "simple" ICS how to present interrupts to KVM and adapt
sPAPR accordingly.
Greg Kurz [Fri, 15 Feb 2019 11:40:24 +0000 (12:40 +0100)]
xics: Handle KVM ICS reset from the "simple" ICS code
The KVM ICS reset handler simply writes the ICS state to KVM. This
doesn't need the overkill parent_reset logic we have today. Also
we want to use the same ICS type for the KVM and non-KVM case with
pseries.
Call icp_set_kvm_state() from the "simple" ICS reset function.
Greg Kurz [Fri, 15 Feb 2019 11:40:18 +0000 (12:40 +0100)]
xics: Explicitely call KVM ICS methods from the common code
The pre_save(), post_load() and synchronize_state() methods of the
ICSStateClass type are really KVM only things. Make that obvious
by dropping the indirections and directly calling the KVM functions
instead.
Greg Kurz [Fri, 15 Feb 2019 11:40:00 +0000 (12:40 +0100)]
xics: Handle KVM ICP realize from the common code
The realization of KVM ICP currently follows the parent_realize logic,
which is a bit overkill here. Also we want to get rid of the KVM ICP
class. Explicitely call icp_kvm_realize() from the base ICP realize
function.
Note that ICPStateClass::parent_realize is retained because powernv
needs it.
Greg Kurz [Fri, 15 Feb 2019 11:39:54 +0000 (12:39 +0100)]
xics: Handle KVM ICP reset from the common code
The KVM ICP reset handler simply writes the ICP state to KVM. This
doesn't need the overkill parent_reset logic we have today. Call
icp_set_kvm_state() from the base ICP reset function instead.
Since there are no other users for ICPStateClass::parent_reset, and
it isn't currently expected to change, drop it as well.
Greg Kurz [Fri, 15 Feb 2019 11:39:48 +0000 (12:39 +0100)]
xics: Explicitely call KVM ICP methods from the common code
The pre_save(), post_load() and synchronize_state() methods of the
ICPStateClass type are really KVM only things. Make that obvious
by dropping the indirections and directly calling the KVM functions
instead.
Cédric Le Goater [Wed, 13 Feb 2019 21:07:56 +0000 (22:07 +0100)]
spapr/irq: remove the XICS offset adjustment
Now that we have changed the XICS and the XIVE interrupt backend to
have different size for their IRQ number space, we do not need to
align their source numbers anymore. Remove the offset adjustment and
wire the dual 'qirq' handler to the 'qirq' handler of the current
interrupt mode in use.
Cédric Le Goater [Wed, 13 Feb 2019 21:07:55 +0000 (22:07 +0100)]
spapr/irq: add an 'nr_irq' parameter to initialize the backend.
When using the 'dual' interrupt mode, the source numbers of both sPAPR
IRQ backends are aligned to share a common IRQ number space and to use
a similar mapping of the machine qemu_irq array which is indexed by
the source number.
The XICS IRQ number range initially being [ 0x1000 - 0x2000 ], this
requires to change the XICS ICSState offset to 0 and to provision for
an extra 4K of source numbers and qemu_irqs which will never be used
by the machine when running under the XICS interrupt mode. This is not
an optimal solution.
Change the init() method to allocate an IRQ number space of the
expected size for the XICS sPAPR IRQ backend. It breaks the interrupt
signaling when under the 'dual' mode because source numbers have
unexpected values but next patch will fix that.
This causes the allocated buffer 'int_buf' to be smaller than expected
and we eventually overwrite some of glibc's control structures (see
"chunk" in https://sourceware.org/glibc/wiki/MallocInternals)
The following error is seen while trying to free int_buf:
Michael Roth [Tue, 12 Feb 2019 18:24:59 +0000 (19:24 +0100)]
qdev: pass an Object * to qbus_set_hotplug_handler()
Certain devices types, like memory/CPU, are now being handled using a
hotplug interface provided by a top-level MachineClass. Hotpluggable
host bridges are another such device where it makes sense to use a
machine-level hotplug handler. However, unlike those devices,
host-bridges have a parent bus (the main system bus), and devices with
a parent bus use a different mechanism for registering their hotplug
handlers: qbus_set_hotplug_handler(). This interface currently expects
a handler to be a subclass of DeviceClass, but this is not the case
for MachineClass, which derives directly from ObjectClass.
Internally, the interface only requires an ObjectClass, so expose that
in qbus_set_hotplug_handler().
Greg Kurz [Tue, 12 Feb 2019 18:24:06 +0000 (19:24 +0100)]
xive: Only set source type for LSIs
MSI is the default and LSI specific code is guarded by the
xive_source_irq_is_lsi() helper. The xive_source_irq_set()
helper is a nop for MSIs.
Simplify the code by turning xive_source_irq_set() into
xive_source_irq_set_lsi() and only call it for LSIs. The
call to xive_source_irq_set(false) in spapr_xive_irq_free()
is also a nop. Just drop it.
Roman Kapl [Tue, 12 Feb 2019 12:12:55 +0000 (13:12 +0100)]
ppc: fix crash during branch stepping
The PPC BRANCH exception could bubble up, but this is an QEMU internal exception
and QEMU then crased. Instead it should trigger TRACE exception, according to
PPC 2.07 book. It could happen only when using branch stepping, which is not
commonly used.
Change gen_prep_dbgex do do trigger TRACE. The excp, argument is now removed,
since the type of exception can be inferred from the singlestep_enabled flags.
removed the guards around gen_exception, since they are unnecessary.
Split mode doesn't make sense on pseries, neither with XICS nor XIVE. But
passing kernel-irqchip=split silently behaves like kernel-irqchip=on.
Other architectures that support kernel-irqchip do terminate QEMU when
split mode is requested but not available though. Do the same with pseries
for consistency.
Similarly, passing kernel-irqchip=on,accel=tcg starts the machine with the
emulated interrupt controller, ie, behaves like kernel-irqchip=off. However,
when passing kernel-irqchip=on,accel=kvm, if we can't initialize the KVM
XICS for some reason, ie, xics_kvm_init() fails, then QEMU is terminated.
This is inconsistent. Terminate QEMU all the same when requesting the
in-kernel interrupt controller without KVM.
Mark Cave-Ayland [Sun, 10 Feb 2019 17:44:21 +0000 (17:44 +0000)]
cuda: decrease time delay before raising VIA SR interrupt and remove fast path
In order to handle a race condition in the MacOS 9 CUDA driver, a
delay was introduced when raising the VIA SR interrupt inspired by
similar code in MacOnLinux.
During original testing of the MacOS 9 patches it was found that the
30us delay used in MacOnLinux did not work reliably within QEMU, and a
value of 300us was required to function correctly.
Recent experiments have shown two things: firstly when booting Linux,
MacOS 9 and MacOS X the fast path which bypasses the delay is never
triggered once the OS kernel is loaded making it effectively
useless. Rather than leave this code in place where a guest could
potentially enable it by accident and break itself, we might as well
just remove it.
Secondly the previous reliability issues are no longer present, and
this value can be reduced down to 20us with no apparent ill
effects. This has the benefit of considerably improving the
responsiveness of the ADB keyboard and mouse within the guest.
BALATON Zoltan [Sat, 26 Jan 2019 14:50:28 +0000 (15:50 +0100)]
target/ppc: Fix msync to do what hardware does
According to BookE docs, invalid bits (while undefined behaviour) should
not raise exception but be ignored. This seems to be implementation
dependent though and QEMU currently does what e500 CPUs do and raise
exception for invalid bits. Unfortunately some versions of libstdc++
(and so all programs compiled with it) have lwsync on PPC440 which is
invalid but on real hardware it's just executed as msync ignoring the
invalid bits (maybe that's why it got undetected) but they fail on QEMU.
This patch changes invalid mask of msync to allow these programs to run
but keep generating exception on e500 cores to follow what hardware does.
The `info` command can also be used:
(gdb) info registers spr
For this purpose, GDB needs to be provided with an XML description of
the registers (see the gdb-xml directory for examples) and a set of
callbacks for reading and writing the registers must be defined.
The XML file in this case is created dynamically, based on the SPRs
already defined in the machine. This way we avoid the need for several
XML files to suit each possible ppc machine.
The gdb_{get,set}_spr_reg callbacks take an index based on the order
the registers appear in the XML file. This index does not match the
actual location of the registers in the env->spr array so the
gdb_find_spr_idx function does that conversion.
Note: GDB currently needs to know the guest endianness in order to
properly print the registers values. This is done automatically by GDB
when provided with the ELF file or explicitly with the `set endian
<big|little>` command.
hw/ppc/prep: Drop useless inclusion of "hw/i386/pc.h"
In 47973a2dbf we split the last generic chipset out of the PC
board, but forgot to remove the include of "hw/i386/pc.h".
Since it is now unused, remove it.
Peter Maydell [Fri, 15 Feb 2019 10:20:04 +0000 (10:20 +0000)]
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20190215' into staging
target-arm queue:
* gdbstub: Send a reply to the vKill packet
* Improve codegen for neon min/max and saturating arithmetic
* Fix a bug in clearing FPSCR exception status bits
* hw/arm/armsse: Fix miswiring of expansion IRQs
* hw/intc/armv7m_nvic: Allow byte accesses to SHPR1
* MAINTAINERS: Remove Peter Crosthwaite from various entries
* arm: Allow system registers for KVM guests to be changed by QEMU code
* linux-user: support HWCAP_CPUID which exposes ID registers to user code
* Fix bug in 128-bit cmpxchg for BE Arm guests
* Implement (no-op) HACR_EL2
* Fix CRn to be 14 for PMEVTYPER/PMEVCNTR
* remotes/pmaydell/tags/pull-target-arm-20190215: (25 commits)
gdbstub: Send a reply to the vKill packet.
target/arm: Add missing clear_tail calls
target/arm: Use vector operations for saturation
target/arm: Split out FPSCR.QC to a vector field
target/arm: Fix set of bits kept in xregs[ARM_VFP_FPSCR]
target/arm: Split out flags setting from vfp compares
target/arm: Fix arm_cpu_dump_state vs FPSCR
target/arm: Fix vfp_gdb_get/set_reg vs FPSCR
target/arm: Remove neon min/max helpers
target/arm: Use tcg integer min/max primitives for neon
target/arm: Use vector minmax expanders for aarch32
target/arm: Use vector minmax expanders for aarch64
target/arm: Rely on optimization within tcg_gen_gvec_or
hw/arm/armsse: Fix miswiring of expansion IRQs
hw/intc/armv7m_nvic: Allow byte accesses to SHPR1
MAINTAINERS: Remove Peter Crosthwaite from various entries
arm: Allow system registers for KVM guests to be changed by QEMU code
linux-user/elfload: enable HWCAP_CPUID for AArch64
target/arm: expose remaining CPUID registers as RAZ
target/arm: expose MPIDR_EL1 to userspace
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