Two bug fixes:
* When freeing a device we unregister even stuff we didn't register in
the first place because the ->init() callback failed.
* When freeing a device with child busses attached, we fail to zap the
child bus (and the devices attached to it).
Glauber Costa [Thu, 17 Sep 2009 18:10:06 +0000 (20:10 +0200)]
temporary fix for on_vcpu
Recent changes made on_vcpu hit the abort() path, even with the IO thread
disabled. This is because cpu_single_env is no longer set when we call this
function. Although the correct fix is a little bit more complicated that that,
the recent thread in which I proposed qemu_queue_work (which fixes that, btw),
is likely to go on a quite different direction.
So for the benefit of those using guest debugging, I'm proposing this simple
fix in the interim.
Jan Kiszka [Thu, 17 Sep 2009 16:14:13 +0000 (18:14 +0200)]
gdbstub: x86: Switch 64/32 bit registers dynamically
Commit 56aebc891674cd2d07b3f64183415697be200084 changed gdbstub in way
that debugging 32 or 16-bit guest code is no longer possible with qemu
for x86_64 guest CPUs. Since that commit, qemu only provides registers
sets for 64-bit, forcing current and foreseeable gdb to also switch its
architecture to 64-bit. And this breaks if the inferior is 32 or 16 bit.
No question, this is a gdb issue. But, as it was confirmed in several
discusssions with gdb people, it is a non-trivial thing to fix. So until
qemu finds a gdb version attach with a rework x86 support, we have to
work around it by switching the register layout as the guest switches
its execution mode between 16/32 and 64 bit.
Jan Kiszka [Tue, 15 Sep 2009 11:36:04 +0000 (13:36 +0200)]
Enable host-clock-based RTC
Switch RTC emulations to the new host_clock instead of vm_clock by
default. This has the advantage that the emulated RTC will follow
automatically the host time while it might be tuned via NTP. vm_clock
can still be selected by passing '-rtc clock=vm' on the command line.
Note that some RTC emulations (at least M48T59) already use the host
time unconditionally while others (namely MC146818) do not. This patch
introduces the required infrastructure for selecting the base clock but
only converts MC146818 for now.
Jan Kiszka [Tue, 15 Sep 2009 11:36:04 +0000 (13:36 +0200)]
Introduce QEMU_CLOCK_HOST
Despite its name QEMU_CLOCK_REALTIME is (normally) not using
CLOCK_REALTIME / the host system time as base. In order to allow also
non-trivial RTC emulations (MC146818) to follow the host time instead of
the virtual guest time, introduce the new clock type QEMU_CLOCK_HOST. It
is unconditionally based on CLOCK_REALTIME, thus will follow system time
changes of the host.
The only limitation of its current implementation is that pending
host_clock timers may not fire early if the host time is pushed forward
beyond their expiry. So far no urgent need to overcome this limitation
was identified, so it's left as simple as it is (expiry on next alarm
timer tick).
If the user issues one of the following commands to the Monitor:
pci_add pci_addr=auto nic model=None
pci_add pci_addr=auto nic model=?
QEMU will exit, because the function used to perform sanity
checks (qemu_check_nic_model_list()) exits on error.
This function is used by the startup code, where it makes
sense to exit on error, but in the Monitor it doesn't.
Changing qemu_check_nic_model_list() to not exit on error
is not possible though, as it's used by the board init
code (the PC one), where all board specific code must have
void return.
The way I've chosen to fix this was to introduce a new function
called pci_nic_supported(), which checks if the NIC is supported
and returns true or false accordingly.
The new function is used only by the Monitor, it performs the
necessary check and returns an error in case the NIC is not
supported, thus qemu_check_nic_model_list()'s exit is never trigged.
The following should be observed:
1. Only the specified NIC is checked, the default one is assumed
to be supported
2. The NIC query command (model=?) won't work with pci_add, the
right way to do this with the Monitor is to add a new command
Glauber Costa [Thu, 17 Sep 2009 20:53:39 +0000 (16:53 -0400)]
Correctly free nd structure
When we "free" a NICInfo structure, we can leak pointers, since we don't do
much more than setting used = 0.
We free() the model parameter, but we don't set it to NULL. This means that
a new user of this structure will see garbage in there. It was not noticed
before because reusing a NICInfo is not that common, but it can be, for
users of device pci hotplug.
A user hit it, described at https://bugzilla.redhat.com/show_bug.cgi?id=524022
This patch memset's the whole structure, guaranteeing that anyone reusing it
will see a fresh NICinfo. Also, we free some other strings that are currently
leaking.
This codebase is quite old, so this patch should feed all stable trees.
Glauber Costa [Mon, 28 Sep 2009 18:27:44 +0000 (15:27 -0300)]
do proper cpu_self check
Currently, our check for qemu_cpu_self only checks if there is a cpu
currently in execution (represented by cpu_single_env being set). While
this might be okay for tcg, it is certainly not okay for kvm, since multiple
cpus might be executing.
Instead, I propose we use pthread primitives to test if the caller thread is
the same as env->thread.
For tcg, it will have the same semantics as before, since all CPUStates will
point to the same thread, and we'll only have one in execution at a time.
Juan Quintela [Tue, 29 Sep 2009 23:10:56 +0000 (01:10 +0200)]
bdf: Remove last users of FALSE/TRUE
This brings bfd_boolean to the wonderful world of <stdbool.h>, it is needed
because it defines bdf_boolean as an enum with values true and false,
and some architectures use TRUE, FALSE and give problems when you try to use
<stdbool.h>
Jan Kiszka [Fri, 18 Sep 2009 18:51:23 +0000 (20:51 +0200)]
musicpal: Rework GPIO input events
The qdev_gpio conversion of 343ec8e caused come polarity mismatch of key
event pins and left an overly complex solution behind. Take this chance
and refactor the GPIO input system of the Musicpal, moving it closer to
reality:
- Instantiate all 32 GPIO input pins and do the routing only via
qdev_connect_gpio_out.
- Implement IMR and IER registers. They manage the GPIO pin IRQ. IMR
seems to enable IRQs on rising edges, IER on falling ones. At least
this matches what the Musicpal fireware require.
- Move key pin logic inversion from the GPIO layer to musicpal_key.
Juan Quintela [Tue, 29 Sep 2009 20:48:42 +0000 (22:48 +0200)]
lm832x: make fields to have the same types that they are saved/loaded
They were saved as uint8_t already. To make things simpler, I just
reg == -1 used to indicate an error, I create LM832x_GENERAL_ERROR
with vale 0xff to represet it
Juan Quintela [Tue, 29 Sep 2009 20:48:40 +0000 (22:48 +0200)]
vmstate: port twl92230 device
Just don't look. struct tm members are ints' and they are sent as uint16_t.
VMState code complains as it should. Have to create hacky int32_as_uint16
type. Don't ever think about copying it
Juan Quintela [Tue, 29 Sep 2009 20:48:24 +0000 (22:48 +0200)]
vmstate: Add support for sending partial arrays
This one is needed for changees happening on fdc. It allows you to send
arrays of structs whose size we want to send it is another field with type
uint8_t. (If you have been able to read the whole sentence without
stoping for breathing, you can use it.
Juan Quintela [Tue, 29 Sep 2009 20:48:20 +0000 (22:48 +0200)]
vmstate: remove const for put operations
In a later patch, we introduce pre_save() and post_save() functions.
The whole point of that operation is to change things in the state.
Without this patch, we have to remove the const qualifier in each
use with a cast
Kevin Wolf [Fri, 2 Oct 2009 20:28:57 +0000 (22:28 +0200)]
target-i386: Fix exceptions for fxsave/fxrstor
This patch corrects the following aspects of exception generation in
fxsave/fxrstor:
* Generate #GP if the operand is not aligned to a 16 byte boundary
* Generate #UD if the LOCK prefix is used
* For CR0.EM = 1 #NM is generated, not #UD
Stefan Weil [Sat, 19 Sep 2009 11:02:09 +0000 (13:02 +0200)]
eepro100: Add more i825xx devices
The new devices added here are still not functional -
partially because some patches are still missing,
partially because I cannot test them. Nevertheless
they belong to the same family and will be supported
by this driver some day.
As soon as they work, they will also be added to hw/pci.c.
Andre Przywara [Fri, 18 Sep 2009 22:30:49 +0000 (00:30 +0200)]
target-i386: add RDTSCP support
RDTSCP reads the time stamp counter and atomically also the content
of a 32-bit MSR, which can be freely set by the OS. This allows CPU
local data to be queried by userspace.
Linux uses this to allow a fast implementation of the getcpu()
syscall, which uses the vsyscall page to avoid a context switch.
AMD CPUs since K8RevF and Intel CPUs since Nehalem support this
instruction.
RDTSCP is guarded by the RDTSCP CPUID bit (Fn8000_0001:EDX[27]).
Andre Przywara [Fri, 18 Sep 2009 22:30:48 +0000 (00:30 +0200)]
target-i386: add SSE4a instruction support
This adds support for the AMD Phenom/Barcelona's SSE4a instructions.
Those include insertq and extrq, which are doing shift and mask on
XMM registers, in two versions (immediate shift/length values and
stored in another XMM register).
Additionally it implements movntss, movntsd, which are scalar
non-temporal stores (avoiding cache trashing). These are implemented
as normal stores, though.
SSE4a is guarded by the SSE4A CPUID bit (Fn8000_0001:ECX[6]).
Andre Przywara [Fri, 18 Sep 2009 22:30:47 +0000 (00:30 +0200)]
target-i386: add lock mov cr0 = cr8
AMD CPUs featuring a shortcut to access CR8 even from 32-bit mode.
If you use the LOCK prefix with "mov CR0", it accesses CR8 instead.
This behavior is guarded by the CR8_LEGACY CPUID bit
(Fn8000_0001:ECX[1]).
Currently zero extensions ops are implemented by a and op with a
constant. This is then catched in some backend, and replaced by
a zero extension instruction. While this works well on RISC
machines, this adds a useless register move on non-RISC machines.
Example on x86:
ext16u_i32 r1, r2
is translated into
mov %eax,%ebx
movzwl %bx, %ebx
while the optimized version should be:
movzwl %ax, %ebx
This patch adds ext{8,16,32}u_i{32,64} TCG ops that can be
implemented in the backends to avoid emitting useless register
moves.
Paul Bolle [Fri, 2 Oct 2009 12:06:47 +0000 (14:06 +0200)]
linux-user: fix "#if 0"'d printf()
Make an "#if 0"'d printf() in load_elf_binary(), probably left to aid in
debugging, reflect what the actual code does. The current printf() will
only confuse those who "#if 1" it (it certainly confused me enough to
write this trivial patch).
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