Yang Zhong [Thu, 20 Jan 2022 22:31:04 +0000 (17:31 -0500)]
qapi: Cleanup SGX related comments and restore @section-size
The SGX NUMA patches were merged into Qemu 7.0 release, we need
clarify detailed version history information and also change
some related comments, which make SGX related comments clearer.
The QMP command schema promises backwards compatibility as standard.
We temporarily restore "@section-size", which can avoid incompatible
API breakage. The "@section-size" will be deprecated in 7.2 version.
Paolo Bonzini [Wed, 27 Oct 2021 13:31:44 +0000 (15:31 +0200)]
qemu-iotests: require at least an argument to check-block.sh
This is anyway how check-block.sh is used in practice, and by removing the
list of formats in the script we avoid duplication between meson.build
and check-block.sh.
Paolo Bonzini [Wed, 6 Oct 2021 09:27:47 +0000 (11:27 +0200)]
build: make check-block a meson test
"meson test" can be asked to run tests verbosely; this makes it usable
also for qemu-iotests's own harness, and it lets "make check-block"
reuse mtest2make.py's infrastructure to find and build test dependencies.
Adjust check-block.sh to use the standard exit code that reports a test
as skipped. Alternatively, in the future we could make it produce TAP
output, which is consistent with all other "make check" tests.
meson: Use find_program() to resolve the entitlement.sh script
Using ../configure without any particular option generates 31 targets
on Darwin, and meson search for the entitlement.sh script 31 times:
Program nm found: YES
Program scripts/undefsym.py found: YES (/opt/homebrew/opt/[email protected]/bin/python3.9 /Code/qemu/scripts/undefsym.py)
Program scripts/feature_to_c.sh found: YES (/bin/sh /Code/qemu/scripts/feature_to_c.sh)
Program scripts/entitlement.sh found: YES (/Code/qemu/scripts/entitlement.sh)
Program scripts/entitlement.sh found: YES (/Code/qemu/scripts/entitlement.sh)
Program scripts/entitlement.sh found: YES (/Code/qemu/scripts/entitlement.sh)
Program scripts/entitlement.sh found: YES (/Code/qemu/scripts/entitlement.sh)
Program scripts/entitlement.sh found: YES (/Code/qemu/scripts/entitlement.sh)
Program scripts/entitlement.sh found: YES (/Code/qemu/scripts/entitlement.sh)
Program scripts/entitlement.sh found: YES (/Code/qemu/scripts/entitlement.sh)
Program scripts/entitlement.sh found: YES (/Code/qemu/scripts/entitlement.sh)
Program scripts/entitlement.sh found: YES (/Code/qemu/scripts/entitlement.sh)
Program scripts/entitlement.sh found: YES (/Code/qemu/scripts/entitlement.sh)
Program scripts/entitlement.sh found: YES (/Code/qemu/scripts/entitlement.sh)
Program scripts/entitlement.sh found: YES (/Code/qemu/scripts/entitlement.sh)
Program scripts/entitlement.sh found: YES (/Code/qemu/scripts/entitlement.sh)
Program scripts/entitlement.sh found: YES (/Code/qemu/scripts/entitlement.sh)
Program scripts/entitlement.sh found: YES (/Code/qemu/scripts/entitlement.sh)
Program scripts/entitlement.sh found: YES (/Code/qemu/scripts/entitlement.sh)
Program scripts/entitlement.sh found: YES (/Code/qemu/scripts/entitlement.sh)
Program scripts/entitlement.sh found: YES (/Code/qemu/scripts/entitlement.sh)
Program scripts/entitlement.sh found: YES (/Code/qemu/scripts/entitlement.sh)
Program scripts/entitlement.sh found: YES (/Code/qemu/scripts/entitlement.sh)
Program scripts/entitlement.sh found: YES (/Code/qemu/scripts/entitlement.sh)
Program scripts/entitlement.sh found: YES (/Code/qemu/scripts/entitlement.sh)
Program scripts/entitlement.sh found: YES (/Code/qemu/scripts/entitlement.sh)
Program scripts/entitlement.sh found: YES (/Code/qemu/scripts/entitlement.sh)
Program scripts/entitlement.sh found: YES (/Code/qemu/scripts/entitlement.sh)
Program scripts/entitlement.sh found: YES (/Code/qemu/scripts/entitlement.sh)
Program scripts/entitlement.sh found: YES (/Code/qemu/scripts/entitlement.sh)
Program scripts/entitlement.sh found: YES (/Code/qemu/scripts/entitlement.sh)
Program scripts/entitlement.sh found: YES (/Code/qemu/scripts/entitlement.sh)
Program scripts/entitlement.sh found: YES (/Code/qemu/scripts/entitlement.sh)
Program scripts/entitlement.sh found: YES (/Code/qemu/scripts/entitlement.sh)
Configuring 50-edk2-i386-secure.json using configuration
Configuring 50-edk2-x86_64-secure.json using configuration
Use find_program() which seems to cache the script path once found.
exec/cpu: Make host pages variables / macros 'target agnostic'
"host" pages are related to the *host* not the *target*,
thus the qemu_host_page_size / qemu_host_page_mask variables
and the HOST_PAGE_ALIGN() / REAL_HOST_PAGE_ALIGN() macros
can be moved to "exec/cpu-common.h" which is target agnostic.
Thomas Huth [Tue, 18 Jan 2022 17:05:48 +0000 (18:05 +0100)]
meson.build: Use a function from libfdt 1.5.1 for the library check
The fdt version test in meson.build uses a function from libfdt v1.4.7,
but we require version 1.5.1 nowadays. Thus use a function that has
been introduced in that version instead.
John Snow [Mon, 10 Jan 2022 23:28:54 +0000 (18:28 -0500)]
python: move qmp utilities to python/qemu/utils
In order to upload a QMP package to PyPI, I want to remove any scripts
that I am not 100% confident I want to support upstream, beyond our
castle walls.
Move most of our QMP utilities into the utils package so we can split
them out from the PyPI upload.
John Snow [Mon, 10 Jan 2022 23:28:51 +0000 (18:28 -0500)]
python/qmp: switch qemu-ga-client to AQMP
Async QMP always raises a "ConnectError" on any connection error which
houses the cause in a second exception. We can check if this root cause
was python's ConnectionError to determine a fairly similar condition to
the original error check here.
John Snow [Mon, 10 Jan 2022 23:28:49 +0000 (18:28 -0500)]
python/aqmp: rename AQMPError to QMPError
This is in preparation for renaming qemu.aqmp to qemu.qmp. I should have
done this from this from the very beginning, but it's a convenient time
to make sure this churn is taken care of.
John Snow [Mon, 10 Jan 2022 23:28:47 +0000 (18:28 -0500)]
python/aqmp: copy type definitions from qmp
Copy the remaining type definitions from QMP into the qemu.aqmp.legacy
module. Now, users that require the legacy interface don't need to
import anything else but qemu.aqmp.legacy wrapper.
John Snow [Mon, 10 Jan 2022 23:28:45 +0000 (18:28 -0500)]
python/aqmp: add __del__ method to legacy interface
asyncio can complain *very* loudly if you forget to back out of things
gracefully before the garbage collector starts destroying objects that
contain live references to asyncio Tasks.
The usual fix is just to remember to call aqmp.disconnect(), but for the
sake of the legacy wrapper and quick, one-off scripts where a graceful
shutdown is not necessarily of paramount imporance, add a courtesy
cleanup that will trigger prior to seeing screenfuls of confusing
asyncio tracebacks.
Note that we can't *always* save you from yourself; depending on when
the GC runs, you might just seriously be out of luck. The best we can do
in this case is to gently remind you to clean up after yourself.
(Still much better than multiple pages of incomprehensible python
warnings for the crime of forgetting to put your toys away.)
John Snow [Wed, 19 Jan 2022 19:39:13 +0000 (14:39 -0500)]
python: use avocado's "new" runner
The old legacy runner no longer seems to work with output logging, so we
can't see failure logs when a test case fails. The new runner doesn't
(seem to) support Coverage.py yet, but seeing error output is a more
important feature.
John Snow [Fri, 21 Jan 2022 00:52:21 +0000 (19:52 -0500)]
python: pin setuptools below v60.0.0
setuptools is a package that replaces the python stdlib 'distutils'. It
is generally installed by all venv-creating tools "by default". It isn't
actually needed at runtime for the qemu package, so our own setup.cfg
does not mention it as a dependency.
However, tox will create virtual environments that include it, and will
upgrade it to the very latest version. the 'venv' tool will also include
whichever version your host system happens to have.
Unfortunately, setuptools version 60.0.0 and above include a hack to
forcibly overwrite python's built-in distutils. The pylint tool that we
use to run code analysis checks on this package relies on distutils and
suffers regressions when setuptools >= 60.0.0 is present at all, see
https://github.com/PyCQA/pylint/issues/5704
Instruct tox and the 'check-dev' targets to avoid setuptools packages
that are too new, for now. Pipenv is unaffected, because setuptools 60
does not offer Python 3.6 support, and our pipenv config is pinned
against Python 3.6.
Peter Maydell [Fri, 21 Jan 2022 10:31:25 +0000 (10:31 +0000)]
Merge remote-tracking branch 'remotes/alistair/tags/pull-riscv-to-apply-20220121-1' into staging
Third RISC-V PR for QEMU 7.0
* Fixes for OpenTitan timer
* Correction of OpenTitan PLIC stride length
* RISC-V KVM support
* Device tree code cleanup
* Support for the Zve64f and Zve32f extensions
* OpenSBI binary loading support for the Spike machine
* Removal of OpenSBI ELFs
* Support for the UXL field in xstatus
# gpg: Signature made Fri 21 Jan 2022 05:57:09 GMT
# gpg: using RSA key F6C4AC46D4934868D3B8CE8F21E10D29DF977054
# gpg: Good signature from "Alistair Francis <[email protected]>" [full]
# Primary key fingerprint: F6C4 AC46 D493 4868 D3B8 CE8F 21E1 0D29 DF97 7054
* remotes/alistair/tags/pull-riscv-to-apply-20220121-1: (61 commits)
target/riscv: Relax UXL field for debugging
target/riscv: Enable uxl field write
target/riscv: Set default XLEN for hypervisor
target/riscv: Adjust scalar reg in vector with XLEN
target/riscv: Adjust vector address with mask
target/riscv: Fix check range for first fault only
target/riscv: Remove VILL field in VTYPE
target/riscv: Adjust vsetvl according to XLEN
target/riscv: Split out the vill from vtype
target/riscv: Split pm_enabled into mask and base
target/riscv: Calculate address according to XLEN
target/riscv: Alloc tcg global for cur_pm[mask|base]
target/riscv: Create current pm fields in env
target/riscv: Adjust csr write mask with XLEN
target/riscv: Relax debug check for pm write
target/riscv: Use gdb xml according to max mxlen
target/riscv: Extend pc for runtime pc write
target/riscv: Ignore the pc bits above XLEN
target/riscv: Create xl field in env
target/riscv: Sign extend pc for different XLEN
...
LIU Zhiwei [Thu, 20 Jan 2022 12:20:47 +0000 (20:20 +0800)]
target/riscv: Adjust scalar reg in vector with XLEN
When sew <= 32bits, not need to extend scalar reg.
When sew > 32bits, if xlen is less that sew, we should sign extend
the scalar register, except explicitly specified by the spec.
LIU Zhiwei [Thu, 20 Jan 2022 12:20:34 +0000 (20:20 +0800)]
target/riscv: Extend pc for runtime pc write
In some cases, we must restore the guest PC to the address of the start of
the TB, such as when the instruction counter hits zero. So extend pc register
according to current xlen for these cases.
LIU Zhiwei [Thu, 20 Jan 2022 12:20:32 +0000 (20:20 +0800)]
target/riscv: Create xl field in env
Current xlen has been used in helper functions and many other places.
The computation of current xlen is not so trivial, so that we should
recompute it as little as possible.
Fortunately, xlen only changes in very seldom cases, such as exception,
misa write, mstatus write, cpu reset, migration load. So that we can only
recompute xlen in this places and cache it into CPURISCVState.
Anup Patel [Thu, 13 Jan 2022 14:50:39 +0000 (20:20 +0530)]
hw/riscv: spike: Allow using binary firmware as bios
Currently, we have to use OpenSBI firmware ELF as bios for the spike
machine because the HTIF console requires ELF for parsing "fromhost"
and "tohost" symbols.
The latest OpenSBI can now optionally pick-up HTIF register address
from HTIF DT node so using this feature spike machine can now use
OpenSBI firmware BIN as bios.
Frank Chang [Tue, 18 Jan 2022 01:45:16 +0000 (09:45 +0800)]
target/riscv: rvv-1.0: Add Zve32f support for scalar fp insns
Zve32f extension requires the scalar processor to implement the F
extension and implement all vector floating-point instructions for
floating-point operands with EEW=32 (i.e., no widening floating-point
operations).
Frank Chang [Tue, 18 Jan 2022 01:45:09 +0000 (09:45 +0800)]
target/riscv: rvv-1.0: Add Zve64f support for scalar fp insns
Zve64f extension requires the scalar processor to implement the F
extension and implement all vector floating-point instructions for
floating-point operands with EEW=32 (i.e., no widening floating-point
operations).
Frank Chang [Tue, 18 Jan 2022 01:45:07 +0000 (09:45 +0800)]
target/riscv: rvv-1.0: Add Zve64f support for vmulh variant insns
All Zve* extensions support all vector integer instructions,
except that the vmulh integer multiply variants that return the
high word of the product (vmulh.vv, vmulh.vx, vmulhu.vv, vmulhu.vx,
vmulhsu.vv, vmulhsu.vx) are not included for EEW=64 in Zve64*.
The pointer assignment "const char *p = path;" in function
qemu_fdt_add_path is unnecessary. Let's remove it and just
use the "path" passed in. No functional change.
Thomas Huth [Fri, 7 Jan 2022 13:38:44 +0000 (14:38 +0100)]
softmmu/device_tree: Silence compiler warning with --enable-sanitizers
If I configure my build with --enable-sanitizers, my GCC (v8.5.0)
complains:
.../softmmu/device_tree.c: In function ‘qemu_fdt_add_path’:
.../softmmu/device_tree.c:560:18: error: ‘retval’ may be used uninitialized
in this function [-Werror=maybe-uninitialized]
int namelen, retval;
^~~~~~
It's a false warning since the while loop is always executed at least
once (p has to be non-NULL, otherwise the derefence in the if-statement
earlier will crash). Thus let's switch to a do-while loop here instead
to make the compiler happy in all cases.
Yifei Jiang [Wed, 12 Jan 2022 08:13:27 +0000 (16:13 +0800)]
target/riscv: Implement virtual time adjusting with vm state changing
We hope that virtual time adjusts with vm state changing. When a vm
is stopped, guest virtual time should stop counting and kvm_timer
should be stopped. When the vm is resumed, guest virtual time should
continue to count and kvm_timer should be restored.
Yifei Jiang [Wed, 12 Jan 2022 08:13:26 +0000 (16:13 +0800)]
target/riscv: Add kvm_riscv_get/put_regs_timer
Add kvm_riscv_get/put_regs_timer to synchronize virtual time context
from KVM.
To set register of RISCV_TIMER_REG(state) will occur a error from KVM
on kvm_timer_state == 0. It's better to adapt in KVM, but it doesn't matter
that adaping in QEMU.
Wilfred Mallawa [Tue, 11 Jan 2022 07:10:24 +0000 (17:10 +1000)]
riscv: opentitan: fixup plic stride len
The following change was made to rectify incorrectly set stride length
on the PLIC [1]. Where it should be 32bit and not 24bit (0x18). This was
discovered whilst attempting to fix a bug where a timer_interrupt was
not serviced on TockOS-OpenTitan.
Wilfred Mallawa [Mon, 10 Jan 2022 05:16:06 +0000 (15:16 +1000)]
hw: timer: ibex_timer: Fixup reading w/o register
This change fixes a bug where a write only register is read.
As per https://docs.opentitan.org/hw/ip/rv_timer/doc/#register-table
the 'INTR_TEST0' register is write only.
Peter Maydell [Thu, 20 Jan 2022 16:13:17 +0000 (16:13 +0000)]
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20220120-1' into staging
target-arm:
* hw/intc/arm_gicv3_its: Fix various minor bugs
* hw/arm/aspeed: Add the i3c device to the AST2600 SoC
* hw/arm: kudo: add lm75s behind bus 1 switch at 75
* hw/arm/virt: Fix support for running guests on hosts
with restricted IPA ranges
* hw/intc/arm_gic: Allow reset of the running priority
* hw/intc/arm_gic: Implement read of GICC_IIDR
* hw/arm/virt: Support for virtio-mem-pci
* hw/arm/virt: Support CPU cluster on ARM virt machine
* docs/can: convert to restructuredText
* hw/net: Move MV88W8618 network device out of hw/arm/ directory
* hw/arm/virt: KVM: Enable PAuth when supported by the host
* remotes/pmaydell/tags/pull-target-arm-20220120-1: (38 commits)
hw/intc/arm_gicv3: Check for !MEMTX_OK instead of MEMTX_ERROR
hw/intc/arm_gicv3_its: Range-check ICID before indexing into collection table
hw/intc/arm_gicv3_its: Check indexes before use, not after
hw/intc/arm_gicv3_its: Factor out "find address of table entry" code
hw/intc/arm_gicv3_its: Fix return codes in process_mapd()
hw/intc/arm_gicv3_its: Fix return codes in process_mapc()
hw/intc/arm_gicv3_its: Fix return codes in process_mapti()
hw/intc/arm_gicv3_its: Refactor process_its_cmd() to reduce nesting
hw/intc/arm_gicv3_its: Fix return codes in process_its_cmd()
hw/intc/arm_gicv3_its: Use enum for return value of process_* functions
hw/intc/arm_gicv3_its: Don't use data if reading command failed
hw/intc/arm_gicv3_its: Fix handling of process_its_cmd() return value
hw/intc/arm_gicv3_its: Convert int ID check to num_intids convention
hw/intc/arm_gicv3_its: Fix event ID bounds checks
hw/arm/aspeed: Add the i3c device to the AST2600 SoC
hw/misc/aspeed_i3c.c: Introduce a dummy AST2600 I3C model.
hw/arm: kudo add lm75s behind bus 1 switch at 75
hw/arm/virt: Drop superfluous checks against highmem
hw/arm/virt: Disable highmem devices that don't fit in the PA range
hw/arm/virt: Use the PA range to compute the memory map
...
hw/intc/arm_gicv3: Check for !MEMTX_OK instead of MEMTX_ERROR
Quoting Peter Maydell:
"These MEMTX_* aren't from the memory transaction
API functions; they're just being used by gicd_readl() and
friends as a way to indicate a success/failure so that the
actual MemoryRegionOps read/write fns like gicv3_dist_read()
can log a guest error."
We are going to introduce more MemTxResult bits, so it is
safer to check for !MEMTX_OK rather than MEMTX_ERROR.
Peter Maydell [Tue, 11 Jan 2022 17:10:48 +0000 (17:10 +0000)]
hw/intc/arm_gicv3_its: Range-check ICID before indexing into collection table
In process_its_cmd(), we read an ICID out of the interrupt table
entry, and then use it as an index into the collection table. Add a
check that it is within range for the collection table first.
This check is not strictly necessary, because:
* we range check the ICID from the guest before writing it into
the interrupt table entry, so the the only way to get an
out of range ICID in process_its_cmd() is if a badly-behaved
guest is writing directly to the interrupt table memory
* the collection table is in guest memory, so QEMU won't fall
over if we read off the end of it
Peter Maydell [Tue, 11 Jan 2022 17:10:47 +0000 (17:10 +0000)]
hw/intc/arm_gicv3_its: Check indexes before use, not after
In a few places in the ITS command handling functions, we were
doing the range-check of an event ID or device ID only after using
it as a table index; move the checks to before the uses.
This misordering wouldn't have very bad effects because the
tables are in guest memory anyway.
Peter Maydell [Tue, 11 Jan 2022 17:10:46 +0000 (17:10 +0000)]
hw/intc/arm_gicv3_its: Factor out "find address of table entry" code
The ITS has several tables which all share a similar format,
described by the TableDesc struct: the guest may configure them
to be a single-level table or a two-level table. Currently we
open-code the process of finding the table entry in all the
functions which read or write the device table or the collection
table. Factor out the "get the address of the table entry"
logic into a new function, so that the code which needs to
read or write a table entry only needs to call table_entry_addr()
and then perform a suitable load or store to that address.
Note that the error handling is slightly complicated because
we want to handle two cases differently:
* failure to read the L1 table entry should end up causing
a command stall, like other kinds of DMA error
* an L1 table entry that says there is no L2 table for this
index (ie whose valid bit is 0) must result in us treating
the table entry as not-valid on read, and discarding
writes (this is mandated by the spec)
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