Paolo Bonzini [Tue, 15 Mar 2016 12:49:25 +0000 (13:49 +0100)]
target-s390x: make cpu-qom.h not target specific
Make S390XCPU an opaque type within cpu-qom.h, and move all definitions
of private methods, as well as all type definitions that require knowledge
of the layout to cpu.h. This helps making files independent of NEED_CPU_H
if they only need to pass around CPU pointers.
Paolo Bonzini [Tue, 15 Mar 2016 12:49:25 +0000 (13:49 +0100)]
target-ppc: make cpu-qom.h not target specific
Make PowerPCCPU an opaque type within cpu-qom.h, and move all definitions
of private methods, as well as all type definitions that require knowledge
of the layout to cpu.h. Conversely, move all definitions needed to define
a class to cpu-qom.h. This helps making files independent of NEED_CPU_H
if they only need to pass around CPU pointers.
Paolo Bonzini [Wed, 18 May 2016 11:24:27 +0000 (13:24 +0200)]
target-ppc: do not make PowerPCCPUClass depend on target-specific symbols
Just leave some members in even if they are unused on e.g.
32-bit PPC or user-mode emulation. This avoids complications
when using PowerPCCPUClass in code that is compiled just
once (because it applies to both 32-bit and 64-bit PPC
for example) but still needs to peek at PPC-specific members.
Paolo Bonzini [Tue, 15 Mar 2016 12:49:25 +0000 (13:49 +0100)]
target-mips: make cpu-qom.h not target specific
Make MIPSCPU an opaque type within cpu-qom.h, and move all definitions of
private methods, as well as all type definitions that require knowledge
of the layout to cpu.h. This helps making files independent of NEED_CPU_H
if they only need to pass around CPU pointers.
Paolo Bonzini [Tue, 15 Mar 2016 12:49:25 +0000 (13:49 +0100)]
target-microblaze: make cpu-qom.h not target specific
Make MicroBlazeCPU an opaque type within cpu-qom.h, and move all
definitions of private methods, as well as all type definitions that
require knowledge of the layout to cpu.h. This helps making files
independent of NEED_CPU_H if they only need to pass around CPU pointers.
Paolo Bonzini [Tue, 15 Mar 2016 12:49:25 +0000 (13:49 +0100)]
target-m68k: make cpu-qom.h not target specific
Make M68KCPU an opaque type within cpu-qom.h, and move all definitions of
private methods, as well as all type definitions that require knowledge
of the layout to cpu.h. This helps making files independent of NEED_CPU_H
if they only need to pass around CPU pointers.
Paolo Bonzini [Tue, 15 Mar 2016 12:49:25 +0000 (13:49 +0100)]
target-lm32: make cpu-qom.h not target specific
Make LM32CPU an opaque type within cpu-qom.h, and move all definitions of
private methods, as well as all type definitions that require knowledge
of the layout to cpu.h. This helps making files independent of NEED_CPU_H
if they only need to pass around CPU pointers.
Paolo Bonzini [Tue, 15 Mar 2016 12:49:25 +0000 (13:49 +0100)]
target-i386: make cpu-qom.h not target specific
Make X86CPU an opaque type within cpu-qom.h, and move all definitions of
private methods, as well as all type definitions that require knowledge
of the layout to cpu.h. This helps making files independent of NEED_CPU_H
if they only need to pass around CPU pointers.
Paolo Bonzini [Tue, 15 Mar 2016 12:49:25 +0000 (13:49 +0100)]
target-cris: make cpu-qom.h not target specific
Make CRISCPU an opaque type within cpu-qom.h, and move all definitions of
private methods, as well as all type definitions that require knowledge
of the layout to cpu.h. This helps making files independent of NEED_CPU_H
if they only need to pass around CPU pointers.
Paolo Bonzini [Tue, 15 Mar 2016 12:49:25 +0000 (13:49 +0100)]
target-arm: make cpu-qom.h not target specific
Make ARMCPU an opaque type within cpu-qom.h, and move all definitions of
private methods, as well as all type definitions that require knowledge
of the layout to cpu.h. This helps making files independent of NEED_CPU_H
if they only need to pass around CPU pointers.
Paolo Bonzini [Tue, 15 Mar 2016 12:49:25 +0000 (13:49 +0100)]
target-alpha: make cpu-qom.h not target specific
Make AlphaCPU an opaque type within cpu-qom.h, and move all definitions
of private methods, as well as all type definitions that require knowledge
of the layout to cpu.h. This helps making files independent of NEED_CPU_H
if they only need to pass around CPU pointers.
Peter Maydell [Thu, 19 May 2016 08:27:28 +0000 (09:27 +0100)]
Merge remote-tracking branch 'remotes/mjt/tags/pull-trivial-patches-2016-05-18' into staging
trivial patches for 2016-05-18
# gpg: Signature made Wed 18 May 2016 13:04:43 BST using RSA key ID A4C3D7DB
# gpg: Good signature from "Michael Tokarev <[email protected]>"
# gpg: aka "Michael Tokarev <[email protected]>"
# gpg: aka "Michael Tokarev <[email protected]>"
* remotes/mjt/tags/pull-trivial-patches-2016-05-18:
Fix some typos found by codespell
9p: drop unused declaration from coth.h
smbios: fix typo
accel: make configure_accelerator return void
configure: Use uniform description for devel packages
ipack: Update e-mail address
util: fix comment typos
qdict: fix unbounded stack warning for qdict_array_entries
Fix typo in variable name (found and fixed by codespell)
vl: fix comment about when parsing cpu definitions
loader: fix potential memory leak
remove comment for nonexistent structure member
s390: remove misleading comment
Peter Xu [Tue, 22 Mar 2016 02:37:26 +0000 (10:37 +0800)]
qdict: fix unbounded stack warning for qdict_array_entries
Here we use one g_strdup_printf() to replace the two stack allocated
array, considering it's more convenient, safe, and as long as it's
called rarely only when quorum device opens. This will remove the
unbound stack warning when compiling with "-Wstack-usage=1000000".
Peter Maydell [Tue, 17 May 2016 15:49:11 +0000 (16:49 +0100)]
Merge remote-tracking branch 'remotes/cohuck/tags/s390x-20160517' into staging
First batch of s390x patches for 2.7:
- The new machine for 2.7
- Make use of the runtime instrumentation support introduced in
the kernel
- Enhance our ipl (boot) process: We can now start from devices
in subchannel sets > 0 as well. As a bonus, the conversion to
diag308 in the bios allows us to get rid of the gr7 hack.
- Xiaoqiang Zhao's SCLP qomification patches
- Several fixes in the s390x pci implementation
# gpg: Signature made Tue 17 May 2016 15:35:32 BST using RSA key ID C6F02FAF
# gpg: Good signature from "Cornelia Huck <[email protected]>"
# gpg: aka "Cornelia Huck <[email protected]>"
* remotes/cohuck/tags/s390x-20160517:
s390x/pci: remove whitespace
s390x/pci: add length checking for pci sclp handlers
s390x/pci: enhance mpcifc_service_call
s390x/pci: fix s390_pci_sclp_deconfigure
s390x/pci: introduce S390PCIBusDevice.iommu_enabled
s390x/pci: export pci_dereg_ioat and pci_dereg_irqs
s390x/pci: separate s390_pcihost_iommu_configure function
s390x/pci: separate s390_sclp_configure function
s390x/pci: fix reg_irqs()
hw/char: QOM'ify sclpconsole.c
hw/char: QOM'ify sclpconsole-lm.c
s390x/ipl: Remove redundant usage of gr7
s390-ccw.img: rebuild image
pc-bios/s390-ccw: Get device address via diag 308/6
s390x/ipl: Add ssid field to IplParameterBlock
s390x/ipl: Provide ipl parameter block
s390x/ipl: Add type and length checks for IplParameterBlock values
s390x/ipl: Extend the IplParameterBlock struct
s390x: enable runtime instrumentation
s390x: add compat machine for 2.7
We introduce iommu_enabled field for S390PCIBusDevice struct to
track whether the iommu has been enabled for the device. This allows
us to stop temporarily changing ->configured while en/disabling the
iommu and to do conditional cleanup later.
Yi Min Zhao [Tue, 26 Apr 2016 11:26:32 +0000 (19:26 +0800)]
s390x/pci: fix reg_irqs()
In reg_irqs(), present code assumes that map_indicator() always issues
successfully. Let's check it and return the error to caller in order to
inform guest.
We don't need to pass device address for pc-bios using gr7 anymore as
the pcbios completely relies on diag308 now, so we can remove it from
qemu. devno, ssid and cssid are migrated but the value was never reused,
so we can safely ignore these fields and migrate 0.
pc-bios/s390-ccw: Get device address via diag 308/6
To IPL from a device, pc-bios receives from qemu a device address via
general register 7. The better way to do it is to use diag308/6
instruction which returns so called
"IplParameterBlock". IplParameterBlock contains the device address for
IPL and additional parameters that can be used by pc-bios.
This patch allows pc-bios to get device address via diag308/6 and
doesn't use gr7 passed boot information anymore.
Right now we return the ipl parameter block only if the guest
specified one. Let's fill in the parameter block when bootindex
parameter is available and not booting from an external kernel.
The IplParameterBlock struct currently has only 200 bytes filled, but it
can be up to 4K.
This patch converts the struct to union with a fully populated struct
inside it and second struct with old values.
For compatibility reasons we disable migration of the extended iplb
field for pre-2.7 machines. Also a guest still can read/write only the
first 200 bytes of IPLB for now.
Fan Zhang [Wed, 9 Mar 2016 12:11:17 +0000 (13:11 +0100)]
s390x: enable runtime instrumentation
Introduce run-time-instrumentation support when running under kvm for
virtio-ccw 2.7 machine and make sure older machines can not enable it.
The new ri_allowed field in the s390MachineClass serves as an indicator
whether the feature can be used by the machine and should therefore be
activated if available.
riccb_needed() is used to check whether riccb is needed or not in live
migration.
Peter Maydell [Tue, 17 May 2016 08:16:00 +0000 (09:16 +0100)]
Merge remote-tracking branch 'remotes/thibault/tags/samuel-thibault' into staging
slirp updates
# gpg: Signature made Mon 16 May 2016 20:22:36 BST using RSA key ID FB6B2F1D
# gpg: Good signature from "Samuel Thibault <[email protected]>"
# gpg: aka "Samuel Thibault <[email protected]>"
# gpg: aka "Samuel Thibault <[email protected]>"
# gpg: aka "Samuel Thibault <[email protected]>"
# gpg: aka "Samuel Thibault <[email protected]>"
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 900C B024 B679 31D4 0F82 304B D017 8C76 7D06 9EE6
# Subkey fingerprint: F632 74CD C630 0873 CB3D 29D9 E3E5 1CE8 FB6B 2F1D
* remotes/thibault/tags/samuel-thibault:
slirp: Clean up osdep.h related header inclusions
slirp: Remove some unused code from slirp.h
slirp: Remove obsolete backward-compatibility cruft
slirp: Clean up slirp_config.h
These are obviously critical to understanding interrupt delivery:
gic_enable_irq
gic_disable_irq
gic_set_irq (inbound irq from device models)
gic_update_set_irq (outbound irq to CPU)
gic_acknowledge_irq
The only one that I think might raise eyebrows is gic_update_bestirq, but I've
(sadly) debugged problems that ended up being caused by unexpected priorities.
Knowing that the GIC has an irq ready, but doesn't deliver to the CPU due to
priority, has also proven important.
Thomas Huth [Fri, 13 May 2016 07:04:32 +0000 (09:04 +0200)]
slirp: Clean up osdep.h related header inclusions
qemu/osdep.h is included in some headers twice - one time
should be sufficient.
Also remove the inclusion of time.h since that is already
done by osdep.h, too (this makes scripts/clean-includes
happy again).
The slirp code does not use index() and gethostid() anymore,
so these parts can be removed without problems.
memmove() and strerror() should be available on each of the
supported platforms nowadays, too, so these wrappers are also
not needed anymore.
And we certainly also do not support Ultrix anymore, so no
need to keep the code for this platform anymore.
Thomas Huth [Fri, 13 May 2016 07:04:29 +0000 (09:04 +0200)]
slirp: Clean up slirp_config.h
There are a lot of unused #defines / #undefs in slirp_config.h,
which are apparently left-overs from the very early slirp code.
Since there is no more code that uses them, let's simply remove
them from our version of slirp.
Peter Maydell [Fri, 13 May 2016 12:39:38 +0000 (13:39 +0100)]
Merge remote-tracking branch 'remotes/kraxel/tags/pull-ui-20160513-1' into staging
gtk/sdl build tweaks
fix gtk 3.20 warnings
gtk clipboard support
spice-gl monitor config support
fix coverity warnings
# gpg: Signature made Fri 13 May 2016 13:30:39 BST using RSA key ID D3E87138
# gpg: Good signature from "Gerd Hoffmann (work) <[email protected]>"
# gpg: aka "Gerd Hoffmann <[email protected]>"
# gpg: aka "Gerd Hoffmann (private) <[email protected]>"
* remotes/kraxel/tags/pull-ui-20160513-1:
gtk: don't leak the GtkBorder with VTE 0.36
gtk: update grab code for gtk 3.20
spice: fix coverity complains
egl-helpers: fix possible resource leak
Changed malloc to g_malloc, free to g_free in ui/shader.c
spice/gl: add & use qemu_spice_gl_monitor_config
ui/gtk: copy to clipboard support
ui: gtk: Fix some deprecation warnings
ui: gtk: Fix a runtime warning on vte >= 0.37
configure: support vte-2.91
configure: report SDL version
configure: report GTK version
configure: add echo_version helper
configure: error on unknown --with-sdlabi value
configure: build SDL if only SDL2 available
ui: sdl2: Release grab before opening console window
ui: gtk: fix crash when terminal inner-border is NULL
Peter Maydell [Fri, 13 May 2016 09:42:40 +0000 (10:42 +0100)]
Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20160512' into staging
queued 2.7 patches
# gpg: Signature made Fri 13 May 2016 01:08:20 BST using RSA key ID 4DD0279B
# gpg: Good signature from "Richard Henderson <[email protected]>"
# gpg: aka "Richard Henderson <[email protected]>"
# gpg: aka "Richard Henderson <[email protected]>"
* remotes/rth/tags/pull-tcg-20160512: (39 commits)
cpu-exec: Clean up 'interrupt_request' reloading in cpu_handle_interrupt()
cpu-exec: Remove unused 'x86_cpu' and 'env' from cpu_exec()
cpu-exec: Move TB execution stuff out of cpu_exec()
cpu-exec: Move interrupt handling out of cpu_exec()
cpu-exec: Move exception handling out of cpu_exec()
cpu-exec: Move halt handling out of cpu_exec()
cpu-exec: Remove relic orphaned comment
tcg: Remove needless CPUState::current_tb
cpu-exec: Move TB chaining into tb_find_fast()
tcg: Rework tb_invalidated_flag
tcg: Clean up from 'next_tb'
cpu-exec: elide more icount code if CONFIG_USER_ONLY
tcg: reorganize tb_find_physical loop
tcg: code_bitmap and code_write_count are not used by user-mode emulation
tcg: Allow goto_tb to any target PC in user mode
tcg: Clean up direct block chaining safety checks
tcg: Clean up tb_jmp_unlink()
tcg: Extract removing of jumps to TB from tb_phys_invalidate()
tcg: Rename tb_jmp_remove() to tb_remove_from_jmp_list()
tcg: Clarify thread safety check in tb_add_jump()
...
Sergey Fedorov [Wed, 11 May 2016 10:21:48 +0000 (13:21 +0300)]
cpu-exec: Move exception handling out of cpu_exec()
Simplify cpu_exec() by extracting exception handling code out of
cpu_exec() into a new static inline function cpu_handle_exception().
Also make cpu_handle_debug_exception() inline as it is used only once.
Sergey Fedorov [Tue, 3 May 2016 11:04:22 +0000 (14:04 +0300)]
tcg: Remove needless CPUState::current_tb
This field was used for telling cpu_interrupt() to unlink a chain of TBs
being executed when it worked that way. Now, cpu_interrupt() don't do
this anymore. So we don't need this field anymore.
Move tb_add_jump() call and surrounding code from cpu_exec() into
tb_find_fast(). That simplifies cpu_exec() a little by hiding the direct
chaining optimization details into tb_find_fast(). It also allows to
move tb_lock()/tb_unlock() pair into tb_find_fast(), putting it closer
to tb_find_slow() which also manipulates the lock.
'tb_invalidated_flag' was meant to catch two events:
* some TB has been invalidated by tb_phys_invalidate();
* the whole translation buffer has been flushed by tb_flush().
Then it was checked:
* in cpu_exec() to ensure that the last executed TB can be safely
linked to directly call the next one;
* in cpu_exec_nocache() to decide if the original TB should be provided
for further possible invalidation along with the temporarily
generated TB.
It is always safe to patch an invalidated TB since it is not going to be
used anyway. It is also safe to call tb_phys_invalidate() for an already
invalidated TB. Thus, setting this flag in tb_phys_invalidate() is
simply unnecessary. Moreover, it can prevent from pretty proper linking
of TBs, if any arbitrary TB has been invalidated. So just don't touch it
in tb_phys_invalidate().
If this flag is only used to catch whether tb_flush() has been called
then rename it to 'tb_flushed'. Declare it as 'bool' and stick to using
only 'true' and 'false' to set its value. Also, instead of setting it in
tb_gen_code(), just after tb_flush() has been called, do it right inside
of tb_flush().
In cpu_exec(), this flag is used to track if tb_flush() has been called
and have made 'next_tb' (a reference to the last executed TB) invalid
for linking it to directly call the next TB. tb_flush() can be called
during the CPU execution loop from tb_gen_code(), during TB execution or
by another thread while 'tb_lock' is released. Catch for translation
buffer flush reliably by resetting this flag once before first TB lookup
and each time we find it set before trying to add a direct jump. Don't
touch in in tb_find_physical().
Each vCPU has its own execution loop in multithreaded mode and thus
should have its own copy of the flag to be able to reset it with its own
'next_tb' and don't affect any other vCPU execution thread. So make this
flag per-vCPU and move it to CPUState.
In cpu_exec_nocache(), we only need to check if tb_flush() has been
called from tb_gen_code() called by cpu_exec_nocache() itself. To do
this reliably, preserve the old value of the flag, reset it before
calling tb_gen_code(), check afterwards, and combine the saved value
back to the flag.
This patch is based on the patch "tcg: move tb_invalidated_flag to
CPUState" from Paolo Bonzini <[email protected]>.
The value returned from tcg_qemu_tb_exec() is the value passed to the
corresponding tcg_gen_exit_tb() at translation time of the last TB
attempted to execute. It is a little confusing to store it in a variable
named 'next_tb'. In fact, it is a combination of 4-byte aligned pointer
and additional information in its two least significant bits. Break it
down right away into two variables named 'last_tb' and 'tb_exit' which
are a pointer to the last TB attempted to execute and the TB exit
reason, correspondingly. This simplifies the code and improves its
readability.
Correct a misleading documentation comment for tcg_qemu_tb_exec() and
fix logging in cpu_tb_exec(). Also rename a misleading 'next_tb' in
another couple of places.
Alex Bennée [Tue, 22 Mar 2016 14:59:20 +0000 (14:59 +0000)]
tcg: reorganize tb_find_physical loop
Put some comments and improve code structure. This should help reading
the code.
Signed-off-by: Alex Bennée <[email protected]>
[Sergey Fedorov: provide commit message; bring back resetting of
tb_invalidated_flag] Signed-off-by: Sergey Fedorov <[email protected]> Reviewed-by: Richard Henderson <[email protected]> Signed-off-by: Richard Henderson <[email protected]>
In user mode, there's only a static address translation, TBs are always
invalidated properly and direct jumps are reset when mapping change.
Thus the destination address is always valid for direct jumps and
there's no need to restrict it to the pages the TB resides in.
We don't take care of direct jumps when address mapping changes. Thus we
must be sure to generate direct jumps so that they always keep valid
even if address mapping changes. Luckily, we can only allow to execute a
TB if it was generated from the pages which match with current mapping.
Document tcg_gen_goto_tb() declaration and note the reason for
destination PC limitations.
Some targets with variable length instructions allow TB to straddle a
page boundary. However, we make sure that both of TB pages match the
current address mapping when looking up TBs. So it is safe to do direct
jumps into the both pages. Correct the checks for some of those targets.
Given that, we can safely patch a TB which spans two pages. Remove the
unnecessary check in cpu_exec() and allow such TBs to be patched.
Sergey Fedorov [Wed, 23 Mar 2016 18:47:33 +0000 (21:47 +0300)]
tcg: Clean up tb_jmp_unlink()
Unify the code of this function with tb_jmp_remove_from_list(). Making
these functions similar improves their readability. Also this could be a
step towards making this function thread-safe.
Sergey Fedorov [Wed, 23 Mar 2016 15:36:31 +0000 (18:36 +0300)]
tcg: Extract removing of jumps to TB from tb_phys_invalidate()
Move the code for removing jumps to a TB out of tb_phys_invalidate() to
a separate static inline function tb_jmp_unlink(). This simplifies
tb_phys_invalidate() and improves code structure.
Sergey Fedorov [Wed, 23 Mar 2016 15:30:16 +0000 (18:30 +0300)]
tcg: Rename tb_jmp_remove() to tb_remove_from_jmp_list()
tb_jmp_remove() was only used to remove the TB from a list of all TBs
jumping to the same TB which is n-th jump destination of the given TB.
Put a comment briefly describing the function behavior and rename it to
better reflect its purpose.
Sergey Fedorov [Tue, 22 Mar 2016 16:00:12 +0000 (19:00 +0300)]
tcg: Init TB's direct jumps before making it visible
Initialize TB's direct jump list data fields and reset the jumps before
tb_link_page() puts it into the physical hash table and the physical
page list. So TB is completely initialized before it becomes visible.
This is pure rearrangement of code to a more suitable place, though it
could be a preparation for relaxing the locking scheme in future.
Sergey Fedorov [Mon, 21 Mar 2016 20:11:00 +0000 (23:11 +0300)]
tcg: Use uintptr_t type for jmp_list_{next|first} fields of TB
These fields do not contain pure pointers to a TranslationBlock
structure. So uintptr_t is the most appropriate type for them.
Also put some asserts to assure that the two least significant bits of
the pointer are always zero before assigning it to jmp_list_first.
Briefly describe in a comment how direct block chaining is done. It
should help in understanding of the following data fields.
Rename some fields in TranslationBlock and TCGContext structures to
better reflect their purpose (dropping excessive 'tb_' prefix in
TranslationBlock but keeping it in TCGContext):
tb_next_offset => jmp_reset_offset
tb_jmp_offset => jmp_insn_offset
tb_next => jmp_target_addr
jmp_next => jmp_list_next
jmp_first => jmp_list_first
Avoid using a magic constant as an invalid offset which is used to
indicate that there's no n-th jump generated.
Ensure direct jump patching in s390 is atomic by:
* naturally aligning a location of direct jump address;
* using atomic_read()/atomic_set() for code patching.
Ensure direct jump patching in i386 is atomic by:
* naturally aligning a location of direct jump address;
* using atomic_read()/atomic_set() for code patching.