Alon Levy [Wed, 21 Mar 2012 16:17:18 +0000 (18:17 +0200)]
ui/spice-display: use uintptr_t when casting qxl physical addresses
The current intptr_t casts are a problem when the address's highest
bit is 1, and it is cast to a intptr_t and then to uint64_t, such
as at:
surface.mem = (intptr_t)ssd->buf;
This causes the sign bit to be extended which causes a wrong address to
be passed on to spice, which then complains when it gets the wrong
slot_id number, since the slot_id is taken from the higher bits.
The assertion happens early - during the first primary surface creation.
This fixes running "-vga qxl -spice" with 32 bit compiled
qemu-system-i386.
Anthony Liguori [Mon, 19 Mar 2012 18:39:42 +0000 (13:39 -0500)]
Merge remote-tracking branch 'sstabellini/saverestore-8' into staging
* sstabellini/saverestore-8:
xen: do not allocate RAM during INMIGRATE runstate
xen mapcache: check if memory region has moved.
xen: record physmap changes to xenstore
Set runstate to INMIGRATE earlier
Introduce "xen-save-devices-state"
cirrus_vga: do not reset videoram
Anthony Liguori [Mon, 19 Mar 2012 18:37:41 +0000 (13:37 -0500)]
Merge remote-tracking branch 'stefanha/trivial-patches' into staging
* stefanha/trivial-patches:
qemu-ga: for w32, fix leaked handle ov.hEvent in ga_channel_write()
ioapic: fix build with DEBUG_IOAPIC
.gitignore: add qemu-bridge-helper and option rom build products
cleanup obsolete typedef
monitor: Remove unused bool field 'qapi' in mon_cmd_t struct
ds1338: Add missing break statement
vnc: Fix packed boolean struct members
Remove type field in ModuleEntry as it's not used
Anthony Liguori [Mon, 19 Mar 2012 18:36:37 +0000 (13:36 -0500)]
Merge remote-tracking branch 'bonzini/scsi-next' into staging
* bonzini/scsi-next:
scsi: add get_dev_path
virtio-scsi: call unregister_savevm properly
scsi: copy serial number into VPD page 0x83
scsi-cd: check ready condition before processing several commands
get rid of CONFIG_VIRTIO_SCSI
Anthony PERARD [Wed, 18 Jan 2012 12:21:38 +0000 (12:21 +0000)]
xen mapcache: check if memory region has moved.
This patch changes the xen_map_cache behavior. Before trying to map a guest
addr, mapcache will look into the list of range of address that have been moved
(physmap/set_memory). There is currently one memory space like this, the vram,
"moved" from were it's allocated to were the guest will look into.
Anthony PERARD [Mon, 19 Mar 2012 15:54:34 +0000 (15:54 +0000)]
exec: fix guest memory access for Xen
In cpu_physical_memory_rw, a change has been introduced and qemu_get_ram_ptr is
no longuer called with the ram addr we want to access, but only with the
section address. This patch fixes this. (All other call to qemu_get_ram_ptr are
already called with the right address.)
Paolo Bonzini [Fri, 16 Mar 2012 18:12:43 +0000 (19:12 +0100)]
scsi: copy serial number into VPD page 0x83
Currently QEMU passes the qdev device id to the guest in an ASCII-string
designator in page 0x83. While this is fine, it does not match what
real hardware does; usually the ASCII-string designator there hosts
another copy of the serial number (there can be other designators,
for example with a world-wide name). Do the same for QEMU SCSI
disks.
ATAPI does not support VPD pages, so it does not matter there.
Paolo Bonzini [Fri, 16 Mar 2012 18:11:43 +0000 (19:11 +0100)]
scsi-cd: check ready condition before processing several commands
This commit is more or less obvious. What it caused is less obvious:
SCSI CD drives failed to eject under Linux, though for example the
"change" command worked okay. This happens because of the autoclose
option in the Linux CD-ROM driver.
The actual chain of events is quite complex and somehow involves
udev helpers; the actual command that matters is READ TOC, though
honestly it's not really clear to me how because it should always be
invoked after autoclose, not before.
Anthony Liguori [Mon, 19 Mar 2012 13:51:50 +0000 (08:51 -0500)]
Merge remote-tracking branch 'qemu-kvm/memory/urgent' into staging
* qemu-kvm/memory/urgent: (42 commits)
memory: check for watchpoints when getting code ram_addr
exec: fix write tlb entry misused as iotlb
Sparc: avoid AREG0 wrappers for memory access helpers
Sparc: avoid AREG0 for memory access helpers
TCG: add 5 arg helpers to def-helper.h
softmmu templates: optionally pass CPUState to memory access functions
i386: Remove REGPARM
sparc64: implement PCI and ISA irqs
sparc: reset CPU state on reset
apb: use normal PCI device header for PBM device
w64: Fix data type of next_tb and tcg_qemu_tb_exec
softfloat: fix for C99
vmstate: fix varrays with uint32_t indexes
Fix large memory chunks allocation with tcg_malloc.
hw/pxa2xx.c: Fix handling of pxa2xx_i2c variable offset within region
hw/pxa2xx_lcd.c: drop target_phys_addr_t usage in device state
hw/pxa2xx_dma.c: drop target_phys_addr_t usage in device state
ARM: Remove unnecessary subpage workarounds
malta: Fix display for LED array
malta: Use symbolic hardware addresses
...
Anthony Liguori [Mon, 19 Mar 2012 13:51:06 +0000 (08:51 -0500)]
Merge remote-tracking branch 'qmp/queue/qmp' into staging
* qmp/queue/qmp:
qapi: Convert migrate
Purge migration of (almost) everything to do with monitors
Error: Introduce error_copy()
QError: Introduce new errors for the migration command
Alon Levy [Wed, 14 Mar 2012 18:33:37 +0000 (20:33 +0200)]
spice: fix broken initialization
Commit 1b71f7c14fab6f00c2680d4489fbee7baf796e4f moved MODULE_INIT_QOM to
way before MODULE_INIT_MACHINE, thereby breaking assumptions made in
spice-core.c which registered both a type initializer and a machine
intializer.
This fix removes the type registration, and replaces it with calling
qemu_spice_init in vl.c after command line parsing (second pass) is
done, and after timers are armed, required by spice server.
Jeff Cody [Thu, 15 Mar 2012 18:26:18 +0000 (14:26 -0400)]
qemu-ga: for w32, fix leaked handle ov.hEvent in ga_channel_write()
In the function ga_channel_write(), the handle ov.hEvent is created
by the call to CreateEvent(). However, the handle is not closed
prior to the function return.
This patch closes the handle before the return of the function.
David Gibson [Mon, 19 Mar 2012 04:58:45 +0000 (15:58 +1100)]
.gitignore: add qemu-bridge-helper and option rom build products
This adds a few previously missing generated files to .gitignore: the
qemu-bridge-helper binary, and more generated versions of the
linuxboot, multiboot and kvmvapic roms from pc-bios/optionrom.
Stefan Weil [Thu, 8 Mar 2012 21:58:06 +0000 (22:58 +0100)]
vnc: Fix packed boolean struct members
This patch fixes warnings reported by splint:
For variables which are packed in a single bit, a signed data type
like 'int' does not make much sense.
There is no obvious reason why the two values should be packed,
so I removed the packing and changed the data type to bool
because both are used as boolean values.
v2:
Some versions of gcc complain after this modification,
for example gcc (Debian 4.4.5-8) 4.4.5):
ui/vnc-auth-sasl.c: In function ‘vnc_sasl_client_cleanup’:
ui/vnc-auth-sasl.c:34: error: suggest parentheses around assignment used as truth value
Obviously, the compiler does not like code which does
bool = unsigned = bool = 0
Avi Kivity [Sun, 18 Mar 2012 16:31:13 +0000 (18:31 +0200)]
memory: check for watchpoints when getting code ram_addr
The code to get the ram_addr from a (tlb entry, vaddr) pair
checks that the resulting memory is not MMIO, but neglects to
check whether the region is hidden by a watchpoint page.
Avi Kivity [Wed, 14 Mar 2012 14:19:39 +0000 (16:19 +0200)]
exec: fix write tlb entry misused as iotlb
A couple of code paths check the lower bits of CPUTLBEntry::addr_write
against io_mem_ram as a way of looking for a dirty RAM page. This works
by accident since the value is zero, which matches all clear bits for
TLB_INVALID, TLB_MMIO, and TLB_NOTDIRTY (indicating dirty RAM).
Make it work by design by checking for the proper bits.
Blue Swirl [Sat, 17 Mar 2012 16:23:19 +0000 (16:23 +0000)]
Merge branch 'arm-devs.for-upstream' of git://git.linaro.org/people/pmaydell/qemu-arm
* 'arm-devs.for-upstream' of git://git.linaro.org/people/pmaydell/qemu-arm:
hw/pxa2xx.c: Fix handling of pxa2xx_i2c variable offset within region
hw/pxa2xx_lcd.c: drop target_phys_addr_t usage in device state
hw/pxa2xx_dma.c: drop target_phys_addr_t usage in device state
ARM: Remove unnecessary subpage workarounds
hw/omap_i2c: Convert to qdev
Stefan Weil [Fri, 16 Mar 2012 22:50:54 +0000 (23:50 +0100)]
w64: Fix data type of next_tb and tcg_qemu_tb_exec
next_tb is the numeric value of a tcg target (= QEMU host) address.
Using tcg_target_ulong instead of unsigned long shows this and makes
the code portable for hosts with an unusual size of long (w64).
The type cast '(long)(next_tb & ~3)' was not needed (casting
unsigned long to long does not change the bits, and nor does
casting long to pointer for most (= all non w64) hosts.
It is removed here.
Macro or function tcg_qemu_tb_exec is used to set next_tb.
The function also returns next_tb. Therefore tcg_qemu_tb_exec
must return a tcg_target_ulong.
Avi Kivity [Tue, 27 Dec 2011 15:11:20 +0000 (17:11 +0200)]
softfloat: fix for C99
C99 appears to consider compound literals as non-constants, and complains
when they are used in static initializers. Switch to ordinary initializer
syntax.
Blue Swirl [Sat, 17 Mar 2012 12:59:41 +0000 (12:59 +0000)]
Merge branch 'target-arm.for-upstream' of git://git.linaro.org/people/pmaydell/qemu-arm
* 'target-arm.for-upstream' of git://git.linaro.org/people/pmaydell/qemu-arm:
target-arm: Decode SETEND correctly in Thumb
target-arm: Clear IT bits when taking exceptions in v7M
target-arm: Fix typo in ARM946 cp15 c5 handling
Blue Swirl [Sat, 17 Mar 2012 12:59:36 +0000 (12:59 +0000)]
Merge branch 'malta' of git://qemu.weilnetz.de/qemu
* 'malta' of git://qemu.weilnetz.de/qemu:
malta: Fix display for LED array
malta: Use symbolic hardware addresses
malta: Always allocate flash memory
malta: Clean allocation of bios region alias
Blue Swirl [Sat, 17 Mar 2012 12:59:23 +0000 (12:59 +0000)]
Merge branch 'ppc-for-upstream' of git://repo.or.cz/qemu/agraf
* 'ppc-for-upstream' of git://repo.or.cz/qemu/agraf:
PPC: Fix openpic with relative memregions
pseries: Configure PCI bridge using properties
PPC: KVM: Synchronize regs on CPU dump
kvm: Comparison with ioctl number macros needs to be unsigned
ppc: Correctly define POWERPC_INSNS2_DEFAULT
pseries: Add support for level interrupts to XICS
PPC: Fix large page support in TCG
PPC: Add PIR register to POWER7 CPU
pseries: Remove PCI device from PCI host bridge code
pseries: Remove unused constant from PCI code
pseries: Update SLOF firmware image
PPC64: Add support for ldbrx and stdbrx instructions
pseries: Don't try to munmap() a malloc()ed TCE table
ppc: Add missing 'static' to spin_rw_ops
PPC: 405: Fix ppc405ep initialization
Bad zero comparison for sas_ss_flags on powerpc
Amos Kong [Tue, 13 Mar 2012 06:05:36 +0000 (14:05 +0800)]
vmstate: fix varrays with uint32_t indexes
VMSTATE_VARRAY_UINT32() is used in hw/ds1225y.c, and we checked
VMS_VARRAY_UINT32 bit of field->flags in vmstate_load_state(),
but we don't check this bit in vmstate_save_state().
Kirill Batuzov [Fri, 2 Mar 2012 09:22:17 +0000 (13:22 +0400)]
Fix large memory chunks allocation with tcg_malloc.
An attempt to allocate a large memory chunk after a small one resulted in
circular links in list of pools. It caused the same memory being
allocated twice for different arrays.
Now pools for large memory chunks are kept in separate list and are
freed during pool reset because current allocator can not reuse them.
Peter Maydell [Wed, 14 Mar 2012 15:37:53 +0000 (15:37 +0000)]
hw/pxa2xx.c: Fix handling of pxa2xx_i2c variable offset within region
The pxa2xx I2C controller can have its registers at an arbitrary offset
within the MemoryRegion it creates. We use this to create two controllers,
one which covers a region of size 0x10000 with registers starting at an
offset 0x1600 into that region, and a second one which covers a region
of size just 0x100 with the registers starting at the base of the region.
The implementation of this offsetting uses two qdev properties, "offset"
(which sets the offset which must be subtracted from the address to
get the offset into the actual register bank) and "size", which is the
size of the MemoryRegion. We were actually using "offset" for two
purposes: firstly the required one of handling the registers not being
at the base of the MemoryRegion, and secondly as a workaround for a
deficiency of QEMU. Until commit 5312bd8b3, if a MemoryRegion was mapped
at a non-page boundary, the address passed into the read and write
functions would be the offset from the start of the page, not the
offset from the start of the MemoryRegion. So when calculating the value
to set the "offset" qdev property we included a rounding to a page
boundary.
Following commit 5312bd8b3 MemoryRegion read/write functions are now
correctly passed the offset from the base of the region, and our
workaround now means we're subtracting too much from addresses, resulting
in warnings like "pxa2xx_i2c_read: Bad register 0xffffff90".
The fix for this is simply to remove the rounding to a page boundary;
this allows us to slightly simplify the expression since
base - (base & (~region_size)) == base & region_size
The qdev property "offset" itself must remain because it is still
performing its primary job of handling register banks not being at
the base of the MemoryRegion.
Mitsyanko Igor [Wed, 14 Mar 2012 15:37:53 +0000 (15:37 +0000)]
hw/pxa2xx_lcd.c: drop target_phys_addr_t usage in device state
Pxa2xx LCD controller is intended to work with 32-bit bus and it has no knowledge
of system's physical address size, so it should not use target_phys_addr_t in it's
state. Convert three variables in DMAChannel state from target_phys_addr_t to uint32_t,
use VMSTATE_UINT32 instead of VMSTATE_UINTTL for these variables.
We can do this safely because:
1) pxa2xx has 32-bit physical address;
2) rest of the code in file never assumes converted variables to have any size
different from uint32_t;
3) we shouldn't have used VMSTATE_UINTTL in the first place because this macro
is for target_ulong type (which can be different from target_phys_addr_t).
Mitsyanko Igor [Wed, 14 Mar 2012 15:37:53 +0000 (15:37 +0000)]
hw/pxa2xx_dma.c: drop target_phys_addr_t usage in device state
Pxa2xx DMA controller is a 32-bit device and it has no knowledge of system's
physical address size, so it should not use target_phys_addr_t in it's state.
Convert variables descr, src and dest from type target_phys_addr_t to uint32_t,
use VMSTATE_UINT32 instead of VMSTATE_UINTTL for these variables.
We can do this safely because:
1) pxa2xx actually has 32-bit physical address size;
2) rest of the code in file never assumes descr, src and dest variables to have
size different from uint32_t;
3) we shouldn't have used VMSTATE_UINTTL in the first place because this macro
is for target_ulong type (which can be different from target_phys_addr_t).
Peter Maydell [Wed, 14 Mar 2012 15:37:53 +0000 (15:37 +0000)]
ARM: Remove unnecessary subpage workarounds
In the ARM per-CPU peripherals (GIC, private timers, SCU, etc),
remove workarounds for subpage memory region read/write functions
being passed offsets from the start of the page rather than the
start of the region. Following commit 5312bd8b3 the masking off
of high bits of the address offset is now harmless but unnecessary.
Stefan Weil [Sat, 28 Jan 2012 05:18:18 +0000 (05:18 +0000)]
malta: Use symbolic hardware addresses
The patch adds definitions of some hardware addresses and uses these
definitions.
It also replaces the type of all addresses from signed to unsigned values.
This is only a cosmetic change because addresses are unsigned values,
the functions called also expect unsigned values,
and we need no sign extension here.
Stefan Weil [Sat, 28 Jan 2012 05:18:17 +0000 (05:18 +0000)]
malta: Always allocate flash memory
There is no reason why there should not be a flash memory when the
Malta emulation is started with a Linux kernel. When flash memory
is always available, the code is simpler, and it can be better tested.
Peter Maydell [Wed, 14 Mar 2012 12:26:11 +0000 (12:26 +0000)]
target-arm: Decode SETEND correctly in Thumb
Decode the SETEND instruction correctly in Thumb mode,
rather than accidentally treating it like CPS. We don't
support BE8 mode, but this change brings the Thumb mode
in to line with behaviour in ARM mode: 'SETEND BE' is
not supported and will provoke an UNDEF exception, but
'SETEND LE' is correctly handled as a no-op.
Peter Maydell [Wed, 14 Mar 2012 12:26:10 +0000 (12:26 +0000)]
target-arm: Clear IT bits when taking exceptions in v7M
When taking an exception for an M profile core, we must clear
the IT bits. Since the IT bits are cached in env->condexec_bits
we must clear them there: writing the bits in env->uncached_cpsr
has no effect. (Reported as LP:944645.)
Peter Maydell [Wed, 14 Mar 2012 12:26:10 +0000 (12:26 +0000)]
target-arm: Fix typo in ARM946 cp15 c5 handling
Fix a typo in handling of the ARM946 cp15 c5 c0 0 1 handling
(instruction access permission bits) that meant it would
return the data access permission bits by mistake.
Juha Riihimäki [Wed, 14 Mar 2012 15:37:53 +0000 (15:37 +0000)]
hw/omap_i2c: Convert to qdev
Convert the omap_i2c device to qdev.
Signed-off-by: Juha Riihimäki <[email protected]>
[Riku Voipio: Fixes and restructuring patchset] Signed-off-by: Riku Voipio <[email protected]>
[Peter Maydell: More fixes and cleanups for upstream submission] Signed-off-by: Peter Maydell <[email protected]>
Luiz Capitulino [Mon, 5 Dec 2011 16:48:01 +0000 (14:48 -0200)]
qapi: Convert migrate
The migrate command is one of those commands where HMP and QMP completely
mix up together. This made the conversion to the QAPI (which separates the
command into QMP and HMP parts) a bit difficult.
The first important change to be noticed is that this commit completes the
removal of the Monitor object from migration code, started by the previous
commit.
Another important and tricky change is about supporting the non-detached
mode. That is, if the user doesn't pass '-d' the migrate command will lock
the monitor and will only release it when migration is finished.
To support this in the new HMP command (hmp_migrate()), it is necessary
to create a timer which runs every second and checks if the migration is
still active. If it is, the timer callback will re-schedule itself to run
one second in the future. If the migration has already finished, the
monitor lock is released and the user can use it normally.
All these changes should be transparent to the user.
David Gibson [Mon, 12 Mar 2012 17:50:24 +0000 (17:50 +0000)]
pseries: Configure PCI bridge using properties
Currently, the function spapr_create_phb() uses its parameters to
initialize the correct memory windows for the new PCI Host Bridge
(PHB). This is not the way things are supposed to be done with qdevs,
and means you can't create extra PHBs easily using -device.
Since pSeries machines can and do have many PHBs with various
configurations, this is a real limitation, not just a theoretical.
This patch, therefore, alters the PHB initialization code to use qdev
properties to set these parameters of the new bridge, moving most of
the code from spapr_create_phb() to spapr_phb_init().
While we're at it, we change the naming of each PCI bus and its
associated memory regions to be less arbitrary and make it easier to
relate the guest and qemu views of memory to each other.
David Gibson [Wed, 7 Mar 2012 14:41:09 +0000 (14:41 +0000)]
kvm: Comparison with ioctl number macros needs to be unsigned
In kvm-all.c we store an ioctl cmd number in the irqchip_inject_ioctl field
of KVMState, which has type 'int'. This seems to make sense since the
ioctl() man page says that the cmd parameter has type int.
However, the kernel treats ioctl numbers as unsigned - sys_ioctl() takes an
unsigned int, and the macros which generate ioctl numbers expand to
unsigned expressions. Furthermore, some ioctls (IOC_READ ioctls on x86
and IOC_WRITE ioctls on powerpc) have bit 31 set, and so would be negative
if interpreted as an int. This has the surprising and compile-breaking
consequence that in kvm_irqchip_set_irq() where we do:
return (s->irqchip_inject_ioctl == KVM_IRQ_LINE) ? 1 : event.status;
We will get a "comparison is always false due to limited range of data
type" warning from gcc if KVM_IRQ_LINE is one of the bit-31-set ioctls,
which it is on powerpc.
So, despite the fact that the man page and posix say ioctl numbers are
signed, they're actually unsigned. The kernel uses unsigned, the glibc
header uses unsigned long, and FreeBSD, NetBSD and OSX also use unsigned
long ioctl numbers in the code.
Therefore, this patch changes the variable to be unsigned, fixing the
compile.
Meador Inge [Thu, 23 Feb 2012 03:44:14 +0000 (03:44 +0000)]
ppc: Correctly define POWERPC_INSNS2_DEFAULT
'POWERPC_INSNS2_DEFAULT' was defined incorrectly which was causing the
opcode table creation code to erroneously register 'eieio' and 'mbar'
for the "default" processor:
David Gibson [Wed, 7 Mar 2012 15:12:21 +0000 (15:12 +0000)]
pseries: Add support for level interrupts to XICS
The pseries "xics" interrupt controller, like most interrupt
controllers can support both message (i.e. edge sensitive) interrupts
and level sensitive interrupts, but it needs to know which are which.
When I implemented the xics emulation for qemu, the only devices we
supported were the PAPR virtual IO devices. These devices only use
message interrupts, so they were the only ones I implemented in xics.
Since then, however, we have added support for PCI devices, which use
level sensitive interrupts. It turns out the message interrupt logic
still actually works most of the time for these, but there are
circumstances where we can lost interrupts due to the incorrect
interrupt logic.
This patch, therefore, implements the correct xics level-sensitive
interrupt logic. The type of the interrupt is set when a device
allocates a new xics interrupt.
Fix large page support in TCG. The old code would overwrite the large page
table entry with the fake 4 KB one generated here whenever the ref/change bits
were updated, causing it to point to the wrong area of memory.
The POWER7 emulation is missing the Processor Identification Register,
mandatory in recent POWER CPUs, that is required for SMP on at least
some operating systems (e.g. FreeBSD) to function properly. This patch
copies the existing PIR code from the other CPUs that implement it.
pseries: Remove PCI device from PCI host bridge code
The sPAPR PCI code defines a PCI device "spapr-pci-host-bridge-pci" which
is never used. This came over from the earlier bridge driver we used as
a template. Some other bridges appear on their own PCI bus as a device,
but that is not true of pSeries bridges, which are pure host to PCI with
no visible presence on the PCI side.
David Gibson [Mon, 27 Feb 2012 17:18:11 +0000 (17:18 +0000)]
pseries: Remove unused constant from PCI code
The 'bars' constant array was used in experimental device allocation code
which is no longer necessary now that we always run the SLOF firmware.
This patch removes the now redundant variable.
David Gibson [Mon, 27 Feb 2012 17:18:10 +0000 (17:18 +0000)]
pseries: Update SLOF firmware image
This patch updates the SLOF firmware image used on the pseries
machine. The new version adds support for Cirrus VGA and virtfs, as
well as including a number of bugfixes.
David Gibson [Mon, 27 Feb 2012 17:18:07 +0000 (17:18 +0000)]
pseries: Don't try to munmap() a malloc()ed TCE table
For the pseries machine, TCE (IOMMU) tables can either be directly
malloc()ed in qemu or, when running on a KVM which supports it, mmap()ed
from a KVM ioctl. The latter option is used when available, because it
allows the (frequent bottlenext) H_PUT_TCE hypercall to be KVM accelerated.
However, even when KVM is persent, TCE acceleration is not always possible.
Only KVM HV supports this ioctl(), not KVM PR, or the kernel could run out
of contiguous memory to allocate the new table. In this case we need to
fall back on the malloc()ed table.
When a device is removed, and we need to remove the TCE table, we need to
either munmap() or free() the table as appropriate for how it was
allocated. The code is supposed to do that, but we buggily fail to
initialize the tcet->fd variable in the malloc() case, which is used as a
flag to determine which is the right choice.
This patch fixes the bug, and cleans up error messages relating to this
path while we're at it.
Alex Barcelo [Thu, 9 Feb 2012 23:55:46 +0000 (23:55 +0000)]
Bad zero comparison for sas_ss_flags on powerpc
All architectures work the same way, and all check for sas_ss_flags ==
0. The powerpc lines are wrong, and do the check the other way round
(it's a qemu internal check, which is done wrong only for this
architecture, it's more a typo than a bug). It's NOT ppc specific,
it's POSIX standard (sigaltstack) and qemu internal.
I have a test source that I will send in a follow-up (it's longer than
I would have wished, I'm sure that a better test case can be written
if needed)
Corentin Chary [Wed, 14 Mar 2012 06:58:47 +0000 (07:58 +0100)]
vnc: don't mess up with iohandlers in the vnc thread
The threaded VNC servers messed up with QEMU fd handlers without
any kind of locking, and that can cause some nasty race conditions.
Using qemu_mutex_lock_iothread() won't work because vnc_dpy_cpy(),
which will wait for the current job queue to finish, can be called with
the iothread lock held.
Instead, we now store the data in a temporary buffer, and use a bottom
half to notify the main thread that new data is available.
vnc_[un]lock_ouput() is still needed to access VncState members like
abort, csock or jobs_buffer.
Andreas Färber [Sat, 28 Jan 2012 15:39:52 +0000 (16:39 +0100)]
qom: Introduce CPU class
Reintroduce CPUState as QOM object: It's abstract and derived directly
from TYPE_OBJECT for compatibility with the user emulators.
The identifier CPUState avoids conflicts between CPU() and the struct.
Introduce $(qom-twice-y) to build it separately for system and for user
emulators.
Prepare a virtual reset method, (re)introduce cpu_reset() as wrapper.
Andreas Färber [Wed, 14 Mar 2012 00:38:32 +0000 (01:38 +0100)]
Rename CPUState -> CPUArchState
Scripted conversion:
for file in *.[hc] hw/*.[hc] hw/kvm/*.[hc] linux-user/*.[hc] linux-user/m68k/*.[hc] bsd-user/*.[hc] darwin-user/*.[hc] tcg/*/*.[hc] target-*/cpu.h; do
sed -i "s/CPUState/CPUArchState/g" $file
done
All occurrences of CPUArchState are expected to be replaced by QOM CPUState,
once all targets are QOM'ified and common fields have been extracted.
Andreas Färber [Wed, 14 Mar 2012 00:38:23 +0000 (01:38 +0100)]
ppc hw/: Don't use CPUState
Scripted conversion:
for file in hw/ppc*.[hc] hw/mpc8544_guts.c hw/spapr*.[hc] hw/virtex_ml507.c hw/xics.c; do
sed -i "s/CPUState/CPUPPCState/g" $file
done
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