tests/docker: update debian-amd64 with lcitool

The one minor wrinkle we need to account for is the netmap support
still requires building from source. We also include cscope and GNU
global as they are used in one of the builds.

Signed-off-by: Alex Bennée <[email protected]>
Cc: Philippe Mathieu-Daudé <[email protected]>
Cc: Luigi Rizzo <[email protected]>
Cc: Giuseppe Lettieri <[email protected]>
Cc: Vincenzo Maffione <[email protected]>
Reviewed-by: Daniel P. Berrangé <[email protected]>
Message-Id: <20220527153603[email protected]>

tests/docker: update debian-ppc64el-cross with lcitool

Use lcitool to update debian-ppc64el-cross to a Debian 11 based system.

Signed-off-by: Alex Bennée <[email protected]>
Reviewed-by: Daniel P. Berrangé <[email protected]>
Message-Id: <20220527153603[email protected]>

tests/docker: update debian-mips64el-cross with lcitool

Use lcitool to update debian-mips64el-cross to a Debian 11 based system.

Signed-off-by: Alex Bennée <[email protected]>
Reviewed-by: Daniel P. Berrangé <[email protected]>
Message-Id: <20220527153603[email protected]>

tests/docker: update debian-mipsel-cross with lcitool

Use lcitool to update debian-mipsel-cross to a Debian 11 based system.

Signed-off-by: Alex Bennée <[email protected]>
Reviewed-by: Daniel P. Berrangé <[email protected]>
Message-Id: <20220527153603[email protected]>

tests/docker: update debian-armel-cross with lcitool

Use lcitool to update debian-armel-cross to a Debian 11 based system.

Signed-off-by: Alex Bennée <[email protected]>
Reviewed-by: Daniel P. Berrangé <[email protected]>
Message-Id: <20220527153603[email protected]>

tests/docker: update debian-armhf-cross with lcitool

Use lcitool to update debian-armhf-cross to a Debian 11 based system.

Signed-off-by: Alex Bennée <[email protected]>
Reviewed-by: Daniel P. Berrangé <[email protected]>
Message-Id: <20220527153603[email protected]>

tests/lcitool: fix up indentation to correct style

3 space indentation snuck into the initial commit. Clean it up before
we let it get established. I've also:

  - removed unused os import
  - added double lines between functions
  - added some comments and grouped and sorted the generation stanzas

My lint tool is also recommending using f-strings but that requires
python 3.6.

Signed-off-by: Alex Bennée <[email protected]>
Cc: Daniel P. Berrangé <[email protected]>
Reviewed-by: Daniel P. Berrangé <[email protected]>
Message-Id: <20220527153603[email protected]>

meson.build: fix summary display of test compilers

The recent refactoring of configure.sh dropped a number of variables
we relied on for printing out information. Make it simpler.

Fixes: eebf199c09 (tests/tcg: invoke Makefile.target directly from QEMU's makefile)
Signed-off-by: Alex Bennée <[email protected]>
Reviewed-by: Richard Henderson <[email protected]>
Message-Id: <20220527153603[email protected]>

gitlab-ci: add meson JUnit test result into report

This allows the gitlab UI to show the test results in different ways,
see doc:

  https://docs.gitlab.com/ee/ci/unit_test_reports.html#how-it-works

Previous we only reports avocado test results (.avocado_test_job_template),
with this change, the qemu/meson tests are also covered.

Signed-off-by: Marc-André Lureau <[email protected]>
Message-Id: <20220525173411[email protected]>
[AJB: expand the commit description]
Signed-off-by: Alex Bennée <[email protected]>
Reviewed-by: Thomas Huth <[email protected]>
Message-Id: <20220527153603[email protected]>

.gitlab-ci.d/crossbuilds: Fix the dependency of the cross-i386-tci job

The cross-i386-tci job uses the fedora-i386-cross image, so we should make sure
that the corresponding job that builds it (the i386-fedora-cross-container job)
has finished before we start the TCI job.

Signed-off-by: Thomas Huth <[email protected]>
Reviewed-by: Richard Henderson <[email protected]>
Message-Id: <20220524092600[email protected]>
Signed-off-by: Alex Bennée <[email protected]>
Message-Id: <20220527153603[email protected]>

.gitlab-ci.d/container-cross: Fix RISC-V container dependencies / stages

The "riscv64-debian-cross-container" job does not depend on any other
container job from the first stage, so we can move it to the first
stage, too.

The "riscv64-debian-test-cross-container" job needs the debian11
container, so we should add a proper "needs:" statement here.

Signed-off-by: Thomas Huth <[email protected]>
Message-Id: <20220524093141[email protected]>
Signed-off-by: Alex Bennée <[email protected]>
Reviewed-by: Alistair Francis <[email protected]>
Message-Id: <20220527153603[email protected]>

Merge tag 'vmbus-maint-20220530' of https://github.com/maciejsszmigiero/qemu into staging

Pull request

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# gpg: Good signature from "Maciej S. Szmigiero <[email protected]>" [unknown]
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# gpg:          There is no indication that the signature belongs to the owner.
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* tag 'vmbus-maint-20220530' of https://github.com/maciejsszmigiero/qemu:
  hw/hyperv/vmbus: Remove unused vmbus_load/save_req()
  MAINTAINERS: Add myself as the maintainer for Hyper-V VMBus

Signed-off-by: Richard Henderson <[email protected]>

hw/hyperv/vmbus: Remove unused vmbus_load/save_req()

vmbus_save_req() and vmbus_load_req() are not used.
Remove them to avoid maintaining dead code.

This essentially reverts commit 4dd8a7064b8a6527f99a62be11
("vmbus: add infrastructure to save/load vmbus requests").

Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Message-Id: <20211106134155[email protected]>
[MSS: Remove also corresponding variables, which are now unused]
Signed-off-by: Maciej S. Szmigiero <[email protected]>

MAINTAINERS: Add myself as the maintainer for Hyper-V VMBus

This way there is some contact point for incoming patches,
and somebody to review and pick up them.

Signed-off-by: Maciej S. Szmigiero <[email protected]>

Merge tag 'pull-target-arm-20220530' of https://git.linaro.org/people/pmaydell/qemu-arm into staging

target-arm queue:
 * docs/system/arm: Add FEAT_HCX to list of emulated features
 * target/arm/hvf: Include missing "cpregs.h"
 * hw/sd/allwinner-sdhost: report FIFO water level as 1 when data ready
 * SVE: refactor to use TRANS/TRANS_FEAT macros and push
   SVE feature check down to individual insn level

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# gpg: Signature made Mon 30 May 2022 09:06:05 AM PDT
# gpg:                using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg:                issuer "[email protected]"
# gpg: Good signature from "Peter Maydell <[email protected]>" [full]
# gpg:                 aka "Peter Maydell <[email protected]>" [full]
# gpg:                 aka "Peter Maydell <[email protected]>" [full]

* tag 'pull-target-arm-20220530' of https://git.linaro.org/people/pmaydell/qemu-arm: (117 commits)
  target/arm: Remove aa64_sve check from before disas_sve
  target/arm: Add sve feature check for remaining trans_* functions
  target/arm: Use TRANS_FEAT for do_FMLAL_zzxw
  target/arm: Use TRANS_FEAT for do_FMLAL_zzzw
  target/arm: Use TRANS_FEAT for do_shr_narrow
  target/arm: Use TRANS_FEAT for do_shll_tb
  target/arm: Use TRANS_FEAT for do_narrow_extract
  target/arm: Use TRANS_FEAT for FCMLA_zzxz
  target/arm: Remove assert in trans_FCMLA_zzxz
  target/arm: Use TRANS_FEAT for DO_FPCMP
  target/arm: Use TRANS_FEAT for DO_FP_IMM
  target/arm: Move null function and sve check into do_fp_imm
  target/arm: Use TRANS_FEAT for gen_gvec_fpst_zzzzp
  target/arm: Introduce gen_gvec_fpst_zzzzp
  target/arm: Use TRANS_FEAT for FCADD
  target/arm: Use TRANS_FEAT for gen_gvec_fpst_arg_zpzz
  target/arm: Rename do_zpzz_ptr to gen_gvec_fpst_arg_zpzz
  target/arm: Use TRANS_FEAT for do_ppz_fp
  target/arm: Use TRANS_FEAT for FLOGB
  target/arm: Use TRANS_FEAT for do_frint_mode
  ...

Signed-off-by: Richard Henderson <[email protected]>

target/arm: Remove aa64_sve check from before disas_sve

We now have individual checks on all insns within disas_sve.

Signed-off-by: Richard Henderson <[email protected]>
Message-id: 20220527181907[email protected]
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Peter Maydell <[email protected]>

target/arm: Add sve feature check for remaining trans_* functions

For all remaining trans_* functions that do not already
have a check, add one now.

Signed-off-by: Richard Henderson <[email protected]>
Message-id: 20220527181907[email protected]
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Peter Maydell <[email protected]>

target/arm: Use TRANS_FEAT for do_FMLAL_zzxw

Signed-off-by: Richard Henderson <[email protected]>
Message-id: 20220527181907[email protected]
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Peter Maydell <[email protected]>

target/arm: Use TRANS_FEAT for do_FMLAL_zzzw

Signed-off-by: Richard Henderson <[email protected]>
Message-id: 20220527181907[email protected]
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Peter Maydell <[email protected]>

target/arm: Use TRANS_FEAT for do_shr_narrow

Rename from do_sve2_shr_narrow and hoist the sve2
check into the TRANS_FEAT macro.

Signed-off-by: Richard Henderson <[email protected]>
Message-id: 20220527181907[email protected]
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Peter Maydell <[email protected]>

target/arm: Use TRANS_FEAT for do_shll_tb

Rename from do_sve2_shll_tb and hoist the sve2
check into the TRANS_FEAT macro.

Signed-off-by: Richard Henderson <[email protected]>
Message-id: 20220527181907[email protected]
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Peter Maydell <[email protected]>

target/arm: Use TRANS_FEAT for do_narrow_extract

Rename from do_sve2_narrow_extract and hoist the sve2
check into the TRANS_FEAT macro.

Signed-off-by: Richard Henderson <[email protected]>
Message-id: 20220527181907[email protected]
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Peter Maydell <[email protected]>

target/arm: Use TRANS_FEAT for FCMLA_zzxz

Signed-off-by: Richard Henderson <[email protected]>
Message-id: 20220527181907[email protected]
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Peter Maydell <[email protected]>

target/arm: Remove assert in trans_FCMLA_zzxz

Since 636ddeb15c0, we do not require rd == ra.

Signed-off-by: Richard Henderson <[email protected]>
Message-id: 20220527181907[email protected]
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Peter Maydell <[email protected]>

target/arm: Use TRANS_FEAT for DO_FPCMP

Signed-off-by: Richard Henderson <[email protected]>
Message-id: 20220527181907[email protected]
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Peter Maydell <[email protected]>

target/arm: Use TRANS_FEAT for DO_FP_IMM

Signed-off-by: Richard Henderson <[email protected]>
Message-id: 20220527181907[email protected]
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Peter Maydell <[email protected]>

target/arm: Move null function and sve check into do_fp_imm

Signed-off-by: Richard Henderson <[email protected]>
Message-id: 20220527181907[email protected]
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Peter Maydell <[email protected]>

target/arm: Use TRANS_FEAT for gen_gvec_fpst_zzzzp

Signed-off-by: Richard Henderson <[email protected]>
Message-id: 20220527181907[email protected]
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Peter Maydell <[email protected]>

target/arm: Introduce gen_gvec_fpst_zzzzp

Signed-off-by: Richard Henderson <[email protected]>
Message-id: 20220527181907[email protected]
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Peter Maydell <[email protected]>

target/arm: Use TRANS_FEAT for FCADD

Signed-off-by: Richard Henderson <[email protected]>
Message-id: 20220527181907[email protected]
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Peter Maydell <[email protected]>

target/arm: Use TRANS_FEAT for gen_gvec_fpst_arg_zpzz

Signed-off-by: Richard Henderson <[email protected]>
Message-id: 20220527181907[email protected]
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Peter Maydell <[email protected]>

target/arm: Rename do_zpzz_ptr to gen_gvec_fpst_arg_zpzz

Rename the function to match other expansion functions and
move to be adjacent.  Split out gen_gvec_fpst_zzzp as a
helper while we're at it.

Signed-off-by: Richard Henderson <[email protected]>
Message-id: 20220527181907[email protected]
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Peter Maydell <[email protected]>

target/arm: Use TRANS_FEAT for do_ppz_fp

Signed-off-by: Richard Henderson <[email protected]>
Message-id: 20220527181907[email protected]
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Peter Maydell <[email protected]>

target/arm: Use TRANS_FEAT for FLOGB

Signed-off-by: Richard Henderson <[email protected]>
Message-id: 20220527181907[email protected]
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Peter Maydell <[email protected]>

target/arm: Use TRANS_FEAT for do_frint_mode

Signed-off-by: Richard Henderson <[email protected]>
Message-id: 20220527181907[email protected]
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Peter Maydell <[email protected]>

target/arm: Move null function and sve check into do_frint_mode

Signed-off-by: Richard Henderson <[email protected]>
Message-id: 20220527181907[email protected]
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Peter Maydell <[email protected]>

target/arm: Rename do_zpz_ptr to gen_gvec_ool_fpst_arg_zpz

Rename the function to match other expansion function and
move to be adjacent.  Split out gen_gvec_fpst_zzp as a
helper while we're at it.

Signed-off-by: Richard Henderson <[email protected]>
Message-id: 20220527181907[email protected]
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Peter Maydell <[email protected]>

target/arm: Expand frint_fns for MO_8

Simplify indexing of this array.  This will allow folding
of the illegal esz == 0 into the normal fn == NULL check.

Signed-off-by: Richard Henderson <[email protected]>
Message-id: 20220527181907[email protected]
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Peter Maydell <[email protected]>

target/arm: Use TRANS_FEAT for FRECPE, FRSQRTE

Rename do_zz_fp to gen_gvec_fpst_arg_zz, and move up.
Split out gen_gvec_fpst_zz as a helper while we're at it.

Signed-off-by: Richard Henderson <[email protected]>
Message-id: 20220527181907[email protected]
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Peter Maydell <[email protected]>

target/arm: Use TRANS_FEAT for do_reduce

Signed-off-by: Richard Henderson <[email protected]>
Message-id: 20220527181907[email protected]
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Peter Maydell <[email protected]>

target/arm: Move null function and sve check into do_reduce

Signed-off-by: Richard Henderson <[email protected]>
Message-id: 20220527181907[email protected]
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Peter Maydell <[email protected]>

target/arm: Use TRANS_FEAT for FTMAD

Signed-off-by: Richard Henderson <[email protected]>
Message-id: 20220527181907[email protected]
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Peter Maydell <[email protected]>

target/arm: Use TRANS_FEAT for FMUL_zzx

Signed-off-by: Richard Henderson <[email protected]>
Message-id: 20220527181907[email protected]
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Peter Maydell <[email protected]>

target/arm: Use TRANS_FEAT for DO_FP3

Signed-off-by: Richard Henderson <[email protected]>
Message-id: 20220527181907[email protected]
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Peter Maydell <[email protected]>

target/arm: Rename do_zzz_fp to gen_gvec_ool_fpst_arg_zzz

Rename the function to match gen_gvec_ool_arg_zzz,
and move to be adjacent.  Split out gen_gvec_fpst_zzz
as a helper while we're at it.

Signed-off-by: Richard Henderson <[email protected]>
Message-id: 20220527181907[email protected]
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Peter Maydell <[email protected]>

target/arm: Use TRANS_FEAT for BFMLA

Signed-off-by: Richard Henderson <[email protected]>
Message-id: 20220527181907[email protected]
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Peter Maydell <[email protected]>

target/arm: Use TRANS_FEAT for FMLA

Signed-off-by: Richard Henderson <[email protected]>
Message-id: 20220527181907[email protected]
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Peter Maydell <[email protected]>

target/arm: Use TRANS_FEAT for MOVPRFX

Signed-off-by: Richard Henderson <[email protected]>
Message-id: 20220527181907[email protected]
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Peter Maydell <[email protected]>

target/arm: Use TRANS_FEAT for SEL_zpzz

Signed-off-by: Richard Henderson <[email protected]>
Message-id: 20220527181907[email protected]
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Peter Maydell <[email protected]>

target/arm: Implement NOT (prediates) alias

This alias is defined on EOR (prediates).  While the
same operation could be performed with NAND or NOR,
only bother with the official alias.

Signed-off-by: Richard Henderson <[email protected]>
Message-id: 20220527181907[email protected]
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Peter Maydell <[email protected]>

target/arm: Move sve check into gen_gvec_fn_ppp

Combined with the check already present in gen_mov_p,
we can simplify some special cases in trans_AND_pppp
and trans_BIC_pppp.

Signed-off-by: Richard Henderson <[email protected]>
Message-id: 20220527181907[email protected]
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Peter Maydell <[email protected]>

target/arm: Use TRANS_FEAT for FMMLA

Being able to specify the feature predicate in TRANS_FEAT
makes it easier to split trans_FMMLA by element size,
which also happens to simplify the decode.

Signed-off-by: Richard Henderson <[email protected]>
Message-id: 20220527181907[email protected]
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Peter Maydell <[email protected]>

target/arm: Introduce gen_gvec_{ptr,fpst}_zzzz

Use these for the several varieties of floating-point
multiply-add instructions.

Signed-off-by: Richard Henderson <[email protected]>
Message-id: 20220527181907[email protected]
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Peter Maydell <[email protected]>

target/arm: Use TRANS_FEAT for do_zzi_ool

Signed-off-by: Richard Henderson <[email protected]>
Message-id: 20220527181907[email protected]
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Peter Maydell <[email protected]>

target/arm: Use TRANS_FEAT for do_zzi_sat

Signed-off-by: Richard Henderson <[email protected]>
Message-id: 20220527181907[email protected]
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Peter Maydell <[email protected]>

target/arm: Use TRANS_FEAT for ADD_zzi

Signed-off-by: Richard Henderson <[email protected]>
Message-id: 20220527181907[email protected]
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Peter Maydell <[email protected]>

target/arm: Reject copy w/ shifted byte early

Remove the unparsed extractions in trans_CPY_{m,z}_i which are intended
to reject an 8-bit shift of an 8-bit constant for 8-bit element.

Signed-off-by: Richard Henderson <[email protected]>
Message-id: 20220527181907[email protected]
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Peter Maydell <[email protected]>

target/arm: Reject add/sub w/ shifted byte early

Remove the unparsed extractions in trans_ADD_zzi, trans_SUBR_zzi,
and do_zzi_sat which are intended to reject an 8-bit shift of an
8-bit constant for 8-bit element.

Signed-off-by: Richard Henderson <[email protected]>
Message-id: 20220527181907[email protected]
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Peter Maydell <[email protected]>

target/arm: Reject dup_i w/ shifted byte early

Remove the unparsed extraction in trans_DUP_i,
which is intended to reject an 8-bit shift of
an 8-bit constant for 8-bit element.

Signed-off-by: Richard Henderson <[email protected]>
Message-id: 20220527181907[email protected]
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Peter Maydell <[email protected]>

target/arm: Use TRANS_FEAT for MUL_zzi

Signed-off-by: Richard Henderson <[email protected]>
Message-id: 20220527181907[email protected]
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Peter Maydell <[email protected]>

target/arm: Use TRANS_FEAT for do_brk2, do_brk3

Signed-off-by: Richard Henderson <[email protected]>
Message-id: 20220527181907[email protected]
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Peter Maydell <[email protected]>

target/arm: Use TRANS_FEAT for do_ppzi_flags

Signed-off-by: Richard Henderson <[email protected]>
Message-id: 20220527181907[email protected]
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Peter Maydell <[email protected]>

target/arm: Use TRANS_FEAT for do_sve2_ppzz_flags

Signed-off-by: Richard Henderson <[email protected]>
Message-id: 20220527181907[email protected]
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Peter Maydell <[email protected]>

target/arm: Use TRANS_FEAT for do_ppzz_flags

Signed-off-by: Richard Henderson <[email protected]>
Message-id: 20220527181907[email protected]
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Peter Maydell <[email protected]>

target/arm: Use TRANS_FEAT for SPLICE

Signed-off-by: Richard Henderson <[email protected]>
Message-id: 20220527181907[email protected]
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Peter Maydell <[email protected]>

target/arm: Use TRANS_FEAT for do_last_general

Signed-off-by: Richard Henderson <[email protected]>
Message-id: 20220527181907[email protected]
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Peter Maydell <[email protected]>

target/arm: Use TRANS_FEAT for do_last_fp

Signed-off-by: Richard Henderson <[email protected]>
Message-id: 20220527181907[email protected]
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Peter Maydell <[email protected]>

target/arm: Use TRANS_FEAT for do_clast_general

Signed-off-by: Richard Henderson <[email protected]>
Message-id: 20220527181907[email protected]
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Peter Maydell <[email protected]>

target/arm: Use TRANS_FEAT for do_clast_fp

Signed-off-by: Richard Henderson <[email protected]>
Message-id: 20220527181907[email protected]
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Peter Maydell <[email protected]>

target/arm: Use TRANS_FEAT for do_clast_vector

Signed-off-by: Richard Henderson <[email protected]>
Message-id: 20220527181907[email protected]
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Peter Maydell <[email protected]>

target/arm: Use TRANS_FEAT for do_zip, do_zip_q

Convert SVE translation functions using do_zip*
to use TRANS_FEAT and gen_gvec_ool_arg_zzz.

Signed-off-by: Richard Henderson <[email protected]>
Message-id: 20220527181907[email protected]
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Peter Maydell <[email protected]>

target/arm: Use gen_gvec_ool_arg_zzz for do_zip, do_zip_q

Signed-off-by: Richard Henderson <[email protected]>
Message-id: 20220527181907[email protected]
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Peter Maydell <[email protected]>

target/arm: Move sve zip high_ofs into simd_data

This is in line with how we treat uzp, and will
eliminate the special case code during translation.

Signed-off-by: Richard Henderson <[email protected]>
Message-id: 20220527181907[email protected]
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Peter Maydell <[email protected]>

target/arm: Use TRANS_FEAT for do_perm_pred2

Signed-off-by: Richard Henderson <[email protected]>
Message-id: 20220527181907[email protected]
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Peter Maydell <[email protected]>

target/arm: Use TRANS_FEAT for do_perm_pred3

Signed-off-by: Richard Henderson <[email protected]>
Message-id: 20220527181907[email protected]
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Peter Maydell <[email protected]>

target/arm: Use TRANS_FEAT for do_EXT

Signed-off-by: Richard Henderson <[email protected]>
Message-id: 20220527181907[email protected]
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Peter Maydell <[email protected]>

target/arm: Use TRANS_FEAT for do_pfirst_pnext

Signed-off-by: Richard Henderson <[email protected]>
Message-id: 20220527181907[email protected]
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Peter Maydell <[email protected]>

target/arm: Use TRANS_FEAT for RDFFR, WRFFR

Signed-off-by: Richard Henderson <[email protected]>
Message-id: 20220527181907[email protected]
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Peter Maydell <[email protected]>

target/arm: Use TRANS_FEAT for do_predset

Signed-off-by: Richard Henderson <[email protected]>
Message-id: 20220527181907[email protected]
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Peter Maydell <[email protected]>

target/arm: Use TRANS_FEAT for do_adr

Signed-off-by: Richard Henderson <[email protected]>
Message-id: 20220527181907[email protected]
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Peter Maydell <[email protected]>

target/arm: Use TRANS_FEAT for do_index

Signed-off-by: Richard Henderson <[email protected]>
Message-id: 20220527181907[email protected]
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Peter Maydell <[email protected]>

target/arm: Move sve check into do_index

Signed-off-by: Richard Henderson <[email protected]>
Message-id: 20220527181907[email protected]
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Peter Maydell <[email protected]>

target/arm: Use TRANS_FEAT for do_zpzzz_ool

Remove the DO_ZPZZZ macro, as it had just the two uses.

Signed-off-by: Richard Henderson <[email protected]>
Message-id: 20220527181907[email protected]
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Peter Maydell <[email protected]>

target/arm: Use TRANS_FEAT for do_shift_zpzi

Signed-off-by: Richard Henderson <[email protected]>
Message-id: 20220527181907[email protected]
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Peter Maydell <[email protected]>

target/arm: Introduce do_shift_zpzi

Share code between the various shifts using arg_rpri_esz.

Signed-off-by: Richard Henderson <[email protected]>
Message-id: 20220527181907[email protected]
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Peter Maydell <[email protected]>

target/arm: Use TRANS_FEAT for do_shift_imm

Signed-off-by: Richard Henderson <[email protected]>
Message-id: 20220527181907[email protected]
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Peter Maydell <[email protected]>

target/arm: Use TRANS_FEAT for do_vpz_ool

Signed-off-by: Richard Henderson <[email protected]>
Message-id: 20220527181907[email protected]
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Peter Maydell <[email protected]>

target/arm: Use TRANS_FEAT for do_sve2_fn2i

Convert SVE translation functions using do_sve2_fn2i
to use TRANS_FEAT and gen_gvec_fn_arg_zzi.

Signed-off-by: Richard Henderson <[email protected]>
Message-id: 20220527181907[email protected]
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Peter Maydell <[email protected]>

target/arm: Introduce gen_gvec_fn_arg_zzi

We have two places that perform this particular operation.

Signed-off-by: Richard Henderson <[email protected]>
Message-id: 20220527181907[email protected]
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Peter Maydell <[email protected]>

target/arm: Hoist sve access check through do_sel_z

The check is already done in gen_gvec_ool_zzzp,
which is called by do_sel_z; remove from callers.

Signed-off-by: Richard Henderson <[email protected]>
Message-id: 20220527181907[email protected]
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Peter Maydell <[email protected]>

target/arm: Use TRANS_FEAT for do_zz_dbm

Signed-off-by: Richard Henderson <[email protected]>
Message-id: 20220527181907[email protected]
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Peter Maydell <[email protected]>

target/arm: Introduce gen_gvec_fn_zzi

We have two places that perform this particular operation.

Signed-off-by: Richard Henderson <[email protected]>
Message-id: 20220527181907[email protected]
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Peter Maydell <[email protected]>

target/arm: Use TRANS_FEAT for do_sve2_zzzz_fn

Convert SVE translation functions using do_sve2_zzzz_fn
to use TRANS_FEAT and gen_gvec_fn_arg_zzzz.

Signed-off-by: Richard Henderson <[email protected]>
Message-id: 20220527181907[email protected]
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Peter Maydell <[email protected]>

target/arm: Introduce gen_gvec_fn_arg_zzzz

Merge gen_gvec_fn_zzzz with the sve access check and the
dereference of arg_rrrr_esz.

Signed-off-by: Richard Henderson <[email protected]>
Message-id: 20220527181907[email protected]
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Peter Maydell <[email protected]>

target/arm: Use TRANS_FEAT for RAX1

The decode for RAX1 sets esz to MO_8, because that's what
we use by default for "no esz present".  We changed that
to MO_64 during translation because it is more logical for
the operation.  However, the esz argument to gen_gvec_rax1
is unused and forces MO_64 within that function, so there
is no need to do it here as well.

Simplify to use gen_gvec_fn_arg_zzz and TRANS_FEAT.

Signed-off-by: Richard Henderson <[email protected]>
Message-id: 20220527181907[email protected]
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Peter Maydell <[email protected]>

target/arm: Use TRANS_FEAT for do_sve2_fn_zzz

Convert SVE translation functions using do_sve2_fn_zzz
to use TRANS_FEAT and gen_gvec_fn_arg_zzz.

Signed-off-by: Richard Henderson <[email protected]>
Message-id: 20220527181907[email protected]
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Peter Maydell <[email protected]>

target/arm: Use TRANS_FEAT for gen_gvec_fn_arg_zzz

Convert SVE translation functions directly using
gen_gvec_fn_arg_zzz to TRANS_FEAT.

Signed-off-by: Richard Henderson <[email protected]>
Message-id: 20220527181907[email protected]
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Peter Maydell <[email protected]>

target/arm: More use of gen_gvec_fn_arg_zzz

Two uses of gen_gvec_fn_zzz can pass on arg_rrr_esz instead.

Signed-off-by: Richard Henderson <[email protected]>
Message-id: 20220527181907[email protected]
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Peter Maydell <[email protected]>

target/arm: Rename do_zzz_fn to gen_gvec_fn_arg_zzz

Rename the function to match gen_gvec_fn_zzz,
and move to be adjacent.

Signed-off-by: Richard Henderson <[email protected]>
Message-id: 20220527181907[email protected]
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Peter Maydell <[email protected]>

target/arm: Move null function and sve check into gen_gvec_fn_zzz

Signed-off-by: Richard Henderson <[email protected]>
Message-id: 20220527181907[email protected]
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Peter Maydell <[email protected]>