Akihiko Odaki [Thu, 25 Feb 2021 00:12:39 +0000 (09:12 +0900)]
virtio-blk: Respect discard granularity
Report the configured granularity for discard operation to the
guest. If this is not set use the block size.
Since until now we have ignored the configured discard granularity
and always reported the block size, let's add
'report-discard-granularity' property and disable it for older
machine types to avoid migration issues.
Lichang Zhao [Fri, 9 Oct 2020 06:44:46 +0000 (14:44 +0800)]
target/avr: Fix some comment spelling errors
I found that there are many spelling errors in the comments of qemu/target/avr.
I used spellcheck to check the spelling errors and found some errors in the folder.
* remotes/vivier2/tags/linux-user-for-6.0-pull-request:
linux-user/elfload: fix address calculation in fallback scenario
linux-user/elfload: do not assume MAP_FIXED_NOREPLACE kernel support
linux-user/elfload: munmap proper address in pgd_find_hole_fallback
linux-user: manage binfmt-misc preserve-arg[0] flag
linux-user: Fix executable page of /proc/self/maps
Peter Maydell [Sun, 14 Mar 2021 15:13:53 +0000 (15:13 +0000)]
Merge remote-tracking branch 'remotes/thuth-gitlab/tags/pull-request-2021-03-12' into staging
* Move unit and bench tests into separate directories
* Clean-up and improve gitlab-ci jobs
* Drop the non-working "check-speed" makefile target
* Minor documentation updates
* remotes/thuth-gitlab/tags/pull-request-2021-03-12:
README: Add Documentation blurb
MAINTAINERS: Merge the Gitlab-CI section into the generic CI section
tests: remove "make check-speed" in favor of "make bench"
gitlab-ci.yml: Merge check-crypto-old jobs into the build-crypto-old jobs
gitlab-ci.yml: Merge one of the coroutine jobs with the tcg-disabled job
gitlab-ci.yml: Add some missing dependencies to the jobs
gitlab-ci.yml: Move build-tools-and-docs-debian to a better place
tests: Move benchmarks into a separate folder
tests: Move unit tests into a separate directory
The instruction manual specifies undefined behaviour for this case. So
we bring this in line with the golden Infineon simlator 'tsim', which
simply writes 0 to the result in case of width=0.
target/tricore: Fix imask OPC2_32_RRPW_IMASK for r3+1 == r2
if r3+1 and r2 are the same then we would overwrite r2 with our first
move and use the wrong result for the shift. Thus we store the result
from the mov in a temp.
Andreas Konopik [Thu, 11 Feb 2021 11:53:29 +0000 (12:53 +0100)]
tricore: fixed faulty conditions for extr and imask
According to the TC 1.3.1. Architecture Manual [1; page 174], results are
undefined, if pos + width > 32 and not 31 or if width = 0.
We found this error because of a different behavior between qemu-tricore
and the real tricore processor. For pos + width = 32, qemu-tricore did not
generate any intermediate code and ran into a different state compared to
the real hardware.
target/tricore: Pass MMUAccessType to get_physical_address()
'int access_type' and ACCESS_INT are unused, drop them.
Provide the mmu_idx argument to match other targets.
'int rw' is actually the MMUAccessType, rename it.
* remotes/pmaydell/tags/pull-target-arm-20210314: (39 commits)
hw/display/pxa2xx: Inline template header
hw/display/pxa2xx: Apply whitespace-only coding style fixes to template header
hw/display/pxa2xx: Apply brace-related coding style fixes to template header
hw/display/pxa2xx: Remove use of BITS in pxa2xx_template.h
hw/display/pxa2xx_lcd: Remove dest_width state field
hw/display/pxa2xx_lcd: Remove dead code for non-32-bpp surfaces
hw/display/pl110: Remove use of BITS from pl110_template.h
hw/display/pl110: Pull included-once parts of template header into pl110.c
hw/display/pl110: Remove dead code for non-32-bpp surfaces
tests/qtest: Test PWM fan RPM using MFT in PWM test
hw/arm: Connect PWM fans in NPCM7XX boards
hw/arm: Add MFT device to NPCM7xx Soc
hw/misc: Add NPCM7XX MFT Module
hw/misc: Add GPIOs for duty in NPCM7xx PWM
hw/arm/virt: KVM: The IPA lower bound is 32
accel: kvm: Fix kvm_type invocation
hw/timer/sse-timer: Propagate eventual error in sse_timer_realize()
tests/acceptance: drop ARMBIAN_ARTIFACTS_CACHED condition for orangepi-pc, cubieboard tests
tests/acceptance: update sunxi kernel from armbian to 5.10.16
tests/acceptance/boot_linux_console: change URL for test_arm_orangepi_bionic_20_08
...
Peter Maydell [Thu, 11 Feb 2021 14:15:14 +0000 (14:15 +0000)]
hw/display/pxa2xx: Apply whitespace-only coding style fixes to template header
We're about to move code from the template header into pxa2xx_lcd.c.
Before doing that, make coding style fixes so checkpatch doesn't
complain about the patch which moves the code. This commit is
whitespace changes only:
* avoid hard-coded tabs
* fix ident on function prototypes
* no newline before open brace on array definitions
Peter Maydell [Thu, 11 Feb 2021 14:15:13 +0000 (14:15 +0000)]
hw/display/pxa2xx: Apply brace-related coding style fixes to template header
We're about to move code from the template header into pxa2xx_lcd.c.
Before doing that, make coding style fixes so checkpatch doesn't
complain about the patch which moves the code. This commit fixes
missing braces in the SKIP_PIXEL() macro definition and in if()
statements.
Peter Maydell [Thu, 11 Feb 2021 14:15:10 +0000 (14:15 +0000)]
hw/display/pxa2xx_lcd: Remove dead code for non-32-bpp surfaces
For a long time now the UI layer has guaranteed that the console
surface is always 32 bits per pixel. Remove the legacy dead code
from the pxa2xx_lcd display device which was handling the possibility
that the console surface was some other format.
Peter Maydell [Thu, 11 Feb 2021 14:15:09 +0000 (14:15 +0000)]
hw/display/pl110: Remove use of BITS from pl110_template.h
BITS is always 32, so remove all uses of it from the template header,
by dropping the trailing '32' from the draw function names and
not constructing the name of rgb_to_pixel32() via the glue() macro.
Peter Maydell [Thu, 11 Feb 2021 14:15:08 +0000 (14:15 +0000)]
hw/display/pl110: Pull included-once parts of template header into pl110.c
The pl110_template.h header has a doubly-nested multiple-include pattern:
* pl110.c includes it once for each host bit depth (now always 32)
* every time it is included, it includes itself 6 times, to account
for multiple guest device pixel and byte orders
Now we only have to deal with 32-bit host bit depths, we can move the
code corresponding to the outer layer of this double-nesting to be
directly in pl110.c and reduce the template header to a single layer
of nesting.
Peter Maydell [Thu, 11 Feb 2021 14:15:07 +0000 (14:15 +0000)]
hw/display/pl110: Remove dead code for non-32-bpp surfaces
For a long time now the UI layer has guaranteed that the console
surface is always 32 bits per pixel. Remove the legacy dead
code from the pl110 display device which was handling the
possibility that the console surface was some other format.
target/mips: Remove 'C790 Multimedia Instructions' dead code
We have almost 400 lines of code full of /* TODO */ comments
which end calling gen_reserved_instruction().
As we are not going to implement them, and all the caller's
switch() default cases already call gen_reserved_instruction(),
we can remove this altogether.
Extract the MXU register initialization code from mips_tcg_init()
as a new mxu_translate_init() helper. Make it public and replace
!TARGET_MIPS64 ifdef'ry by the 'TARGET_LONG_BITS == 32' check to
elide this code at preprocessing time.
target/mips: Move MUL opcode check from decode_mxu() to decode_legacy()
Move the check for MUL opcode from decode_opc_mxu() callee
to decode_opc_legacy() caller, so we can simplify the ifdef'ry
and elide the call in few commits.
hw/mips/gt64xxx: Rename trace events related to interrupt registers
We want to trace all register accesses. First rename the current
gt64120_read / gt64120_write events with '_intreg' suffix, as they
are restricted to interrupt registers.
hw/mips/gt64xxx: Initialize ISD I/O memory region in DeviceRealize()
The ISD I/O region belongs to the TYPE_GT64120_PCI_HOST_BRIDGE,
so initialize it before it is realized, not after.
Rename the region as 'gt64120-isd' so it is clearer to realize
it belongs to the GT64120 in the memory tree view.
Vincent Fazio [Sun, 31 Jan 2021 06:19:48 +0000 (00:19 -0600)]
linux-user/elfload: fix address calculation in fallback scenario
Previously, guest_loaddr was not taken into account when returning an
address from pgb_find_hole when /proc/self/maps was unavailable which
caused an improper guest_base address to be calculated.
This could cause a SIGSEGV later in load_elf_image -> target_mmap for
ET_EXEC type images since the mmap MAP_FIXED flag is specified which
could clobber existing mappings at the address returnd by g2h().
Vincent Fazio [Sun, 31 Jan 2021 06:19:30 +0000 (00:19 -0600)]
linux-user/elfload: do not assume MAP_FIXED_NOREPLACE kernel support
Previously, pgd_find_hole_fallback assumed that if the build host's libc
had MAP_FIXED_NOREPLACE defined that the address returned by mmap would
match the requested address. This is not a safe assumption for Linux
kernels prior to 4.17
Now, we always compare mmap's resultant address with the requested
address and no longer short-circuit based on MAP_FIXED_NOREPLACE.
Vincent Fazio [Sun, 31 Jan 2021 06:18:49 +0000 (00:18 -0600)]
linux-user/elfload: munmap proper address in pgd_find_hole_fallback
Previously, if the build host's libc did not define MAP_FIXED_NOREPLACE
or if the running kernel didn't support that flag, it was possible for
pgd_find_hole_fallback to munmap an incorrect address which could lead to
SIGSEGV if the range happened to overlap with the mapped address of the
QEMU binary.
Laurent Vivier [Mon, 22 Feb 2021 10:50:04 +0000 (11:50 +0100)]
linux-user: manage binfmt-misc preserve-arg[0] flag
Add --preserve-argv0 in qemu-binfmt-conf.sh to configure the preserve-argv0
flag.
This patch allows to use new flag in AT_FLAGS to detect if
preserve-argv0 is configured for this interpreter:
argv[0] (the full pathname provided by binfmt-misc) is removed and
replaced by argv[1] (the original argv[0] provided by binfmt-misc when
'P'/preserve-arg[0] is set)
For instance with this patch and kernel support for AT_FLAGS:
$ sudo chroot m68k-chroot sh -c 'echo $0'
sh
without this patch:
$ sudo chroot m68k-chroot sh -c 'echo $0'
/usr/bin/sh
The new flag is available in kernel (v5.12) since: 2347961b11d4 ("binfmt_misc: pass binfmt_misc flags to the interpreter")
linux-user: Fix executable page of /proc/self/maps
The guest binary and libraries are not always map with the
executable bit in the host process. The guest may read a
/proc/self/maps with no executable address range. The
perm fields should be based on the guest permission inside
Qemu.
John Snow [Wed, 4 Nov 2020 19:30:32 +0000 (14:30 -0500)]
README: Add Documentation blurb
Add it in a prominent place: Right after figuring out what QEMU is,
users may wish to know how to use it more than they want to know how to
build their own version of it.
Thomas Huth [Tue, 9 Mar 2021 11:23:56 +0000 (12:23 +0100)]
MAINTAINERS: Merge the Gitlab-CI section into the generic CI section
The status of the gitlab-CI files is currently somewhat confusing, and
it is often not quite clear whether a patch should go via my tree or
via the testing tree of Alex. That situation has grown historically...
Initially, I was the only one using the gitlab-CI, just for my private
repository there. But in the course of time, the gitlab-CI switched to
use the containers from tests/docker/ (which is not part of the gitlab-CI
section in the MAINTAINERS file), and QEMU now even switched to gitlab.com
completely for the repository and will soon use it as its gating CI, too,
so it makes way more sense if the gitlab-ci.yml files belong to the people
who are owning the qemu-project on gitlab.com and take care of the gitlab
CI there. Thus let's merge the gitlab-ci section into the common "test and
build automation" section.
And while we're at it, I'm also removing the line with Fam there for now,
since he was hardly active during the last years in this area anymore.
If he ever gets more time for this part again in the future, we surely
can add the line back again. I'm also removing the Patchew URL from this
section now since Patchew's files are not tracked in the main QEMU repo
and it is also not maintained by Alex, Philippe and myself.
The maintainers of Patchew are still listed more accurately in the wiki on
https://wiki.qemu.org/AdminContacts & https://wiki.qemu.org/Testing/CI/Patchew
instead.
Now to avoid that Alex is listed here in this section alone, Philippe and
I agreed to help as backup maintainers here, too. And Willian volunteered
to be an additional reviewer.
Paolo Bonzini [Wed, 10 Mar 2021 16:46:12 +0000 (17:46 +0100)]
tests: remove "make check-speed" in favor of "make bench"
"make check-speed" has been broken since the removal of ninja2make
last October. It was just a backwards-compatibility alias for
"make bench-speed", which in turn is in principle a subset of
"make bench". Advertise the latter and drop "make check-speed"
completely since no one has noticed.
Thomas Huth [Thu, 11 Mar 2021 14:22:11 +0000 (15:22 +0100)]
gitlab-ci.yml: Merge check-crypto-old jobs into the build-crypto-old jobs
Both, the build-crypto-old and the check-crypto-old jobs finish reasonably
fast, and the build artifacts are only used for the single corresponding
check jobs, so there is no reason for doing the check step in a separate
job here. Thus let's stop wasting artifacts space and job scheduler over-
head by simply merging the test step into the build jobs.
Thomas Huth [Thu, 11 Mar 2021 14:22:10 +0000 (15:22 +0100)]
gitlab-ci.yml: Merge one of the coroutine jobs with the tcg-disabled job
Our gitlab-ci got quite slow in the past weeks, due to the immense amount
of jobs that we have, so we should try to reduce the number of jobs.
Since we already have a job that builds without TCG, we can merge
one of the "build-coroutine" jobs with it to get rid of at least one
job.
Thomas Huth [Thu, 11 Mar 2021 14:22:09 +0000 (15:22 +0100)]
gitlab-ci.yml: Add some missing dependencies to the jobs
Let's make sure that all jobs have proper "needs:" statements so that
they can start as soon as possible, without having to wait for the
previous pipeline stage to finish.
Thomas Huth [Thu, 11 Mar 2021 14:22:08 +0000 (15:22 +0100)]
gitlab-ci.yml: Move build-tools-and-docs-debian to a better place
The "build-tools-and-docs-debian" job had been added in between
the "check-system-debian" and the "accepance-system-debian" jobs
and thus separates the jobs that belong together. Move it away,
to the end of the file, next to the "pages" job that depends on it.
And while we're at it, also add a proper "needs:" line to the
job so that it can be started as soon as possible instead of always
waiting for the previous stage to finish.
Thomas Huth [Wed, 10 Mar 2021 06:33:14 +0000 (07:33 +0100)]
tests: Move unit tests into a separate directory
The main tests directory still looks very crowded, and it's not
clear which files are part of a unit tests and which belong to
a different test subsystem. Let's clean up the mess and move the
unit tests to a separate directory.
* remotes/kraxel/tags/ui-20210311-pull-request:
ui/cocoa: Fix mouse association state
ui/cocoa: Mark variables static
ui/cocoa: Clear modifiers whenever possible
ui/cocoa: Do not rely on the first argument
ui/cocoa: Show QEMU icon in the about window
docs: Fix removal text of -show-cursor
ui/cocoa: Use kCGColorSpaceSRGB
ui/gtk: Remove NULL checks in gd_switch
Hao Wu [Thu, 11 Mar 2021 18:08:55 +0000 (10:08 -0800)]
tests/qtest: Test PWM fan RPM using MFT in PWM test
This patch adds testing of PWM fan RPMs in the existing npcm7xx pwm
test. It tests whether the MFT module can measure correct fan values
for a PWM fan in NPCM7XX boards.
Hao Wu [Thu, 11 Mar 2021 18:08:54 +0000 (10:08 -0800)]
hw/arm: Connect PWM fans in NPCM7XX boards
This patch adds fan_splitters (split IRQs) in NPCM7XX boards. Each fan
splitter corresponds to 1 PWM output and can connect to multiple fan
inputs (MFT devices).
In NPCM7XX boards(NPCM750 EVB and Quanta GSJ boards), we initializes
these splitters and connect them to their corresponding modules
according their specific device trees.
Hao Wu [Thu, 11 Mar 2021 18:08:52 +0000 (10:08 -0800)]
hw/misc: Add NPCM7XX MFT Module
This patch implements Multi Function Timer (MFT) module for NPCM7XX.
This module is mainly used to configure PWM fans. It has just enough
functionality to make the PWM fan kernel module work.
The module takes two input, the max_rpm of a fan (modifiable via QMP)
and duty cycle (a GPIO from the PWM module.) The actual measured RPM
is equal to max_rpm * duty_cycle / NPCM7XX_PWM_MAX_DUTY. The RPM is
measured as a counter compared to a prescaled input clock. The kernel
driver reads this counter and report to user space.
Hao Wu [Thu, 11 Mar 2021 18:08:51 +0000 (10:08 -0800)]
hw/misc: Add GPIOs for duty in NPCM7xx PWM
This patch adds GPIOs in NPCM7xx PWM module for its duty values.
The purpose of this is to connect it to the MFT module to provide
an input for measuring a PWM fan's RPM. Each PWM module has
NPCM7XX_PWM_PER_MODULE of GPIOs, each one corresponds to
one PWM instance and can connect to multiple fan instances in MFT.
Andrew Jones [Wed, 10 Mar 2021 13:52:18 +0000 (14:52 +0100)]
hw/arm/virt: KVM: The IPA lower bound is 32
The virt machine already checks KVM_CAP_ARM_VM_IPA_SIZE to get the
upper bound of the IPA size. If that bound is lower than the highest
possible GPA for the machine, then QEMU will error out. However, the
IPA is set to 40 when the highest GPA is less than or equal to 40,
even when KVM may support an IPA limit as low as 32. This means KVM
may fail the VM creation unnecessarily. Additionally, 40 is selected
with the value 0, which means use the default, and that gets around
a check in some versions of KVM, causing a difficult to debug fail.
Always use the IPA size that corresponds to the highest possible GPA,
unless it's lower than 32, in which case use 32. Also, we must still
use 0 when KVM only supports the legacy fixed 40 bit IPA.
Andrew Jones [Wed, 10 Mar 2021 13:52:17 +0000 (14:52 +0100)]
accel: kvm: Fix kvm_type invocation
Prior to commit f2ce39b4f067 a MachineClass kvm_type method
only needed to be registered to ensure it would be executed.
With commit f2ce39b4f067 a kvm-type machine property must also
be specified. hw/arm/virt relies on the kvm_type method to pass
its selected IPA limit to KVM, but this is not exposed as a
machine property. Restore the previous functionality of invoking
kvm_type when it's present.
Niek Linnenbank [Wed, 10 Mar 2021 19:58:20 +0000 (20:58 +0100)]
tests/acceptance: drop ARMBIAN_ARTIFACTS_CACHED condition for orangepi-pc, cubieboard tests
Previously the ARMBIAN_ARTIFACTS_CACHED pre-condition was added to allow running
tests that have already existing armbian.com artifacts stored in the local avocado cache,
but do not have working URLs to download a fresh copy.
At this time of writing the URLs for artifacts on the armbian.com server are updated and working.
Any future broken URLs will result in a skipped acceptance test, for example:
Niek Linnenbank [Wed, 10 Mar 2021 19:58:17 +0000 (20:58 +0100)]
tests/acceptance/boot_linux_console: remove Armbian 19.11.3 bionic test for orangepi-pc machine
The image for Armbian 19.11.3 bionic has been removed from the armbian server.
Without the image as input the test arm_orangepi_bionic_19_11 cannot run.
This commit removes the test completely and merges the code of the generic function
do_test_arm_orangepi_uboot_armbian back with the 20.08 test.
Niek Linnenbank [Wed, 10 Mar 2021 19:58:16 +0000 (20:58 +0100)]
hw/net/allwinner-sun8i-emac: traverse transmit queue using TX_CUR_DESC register value
Currently the emulated EMAC for sun8i always traverses the transmit queue
from the head when transferring packets. It searches for a list of consecutive
descriptors whichs are flagged as ready for processing and transmits their payloads
accordingly. The controller stops processing once it finds a descriptor that is not
marked ready.
While the above behaviour works in most situations, it is not the same as the actual
EMAC in hardware. Actual hardware uses the TX_CUR_DESC register value to keep track
of the last position in the transmit queue and continues processing from that position
when software triggers the start of DMA processing. The currently emulated behaviour can
lead to packet loss on transmit when software fills the transmit queue with ready
descriptors that overlap the tail of the circular list.
This commit modifies the emulated EMAC for sun8i such that it processes
the transmit queue using the TX_CUR_DESC register in the same way as hardware.
With the reduction operations, we intentionally increase maxsz to
the next power of 2, so as to fill out the reduction tree correctly.
Since e2e7168a214b, oprsz must equal maxsz, with exceptions for small
vectors, so this triggers an assertion for vector sizes > 32 that are
not themselves a power of 2.
Pass the power-of-two value in the simd_data field instead.
Missed out on compressing the second half of a predicate
with length vl % 512 > 256.
Adjust all of the x + (y << s) to x | (y << s) as a
general style fix. Drop the extract64 because the input
uint64_t are known to be already zero-extended from the
current size of the predicate.
If the whole SID range (32b) is invalidated (SMMU_CMD_CFGI_ALL),
@end overflows and we fail to handle the command properly.
Once this gets fixed, the current code really is awkward in the
sense it loops over the whole range instead of removing the
currently cached configs through a hash table lookup.
Eric Auger [Tue, 9 Mar 2021 10:27:40 +0000 (11:27 +0100)]
hw/arm/smmuv3: Enforce invalidation on a power of two range
As of today, the driver can invalidate a number of pages that is
not a power of 2. However IOTLB unmap notifications and internal
IOTLB invalidations work with masks leading to erroneous
invalidations.
In case the range is not a power of 2, split invalidations into
power of 2 invalidations.
When looking for a single page entry in the vSMMU internal IOTLB,
let's make sure that if the entry is not found using a
g_hash_table_remove() we iterate over all the entries to find a
potential range that overlaps it.
Eric Auger [Tue, 9 Mar 2021 10:27:37 +0000 (11:27 +0100)]
dma: Introduce dma_aligned_pow2_mask()
Currently get_naturally_aligned_size() is used by the intel iommu
to compute the maximum invalidation range based on @size which is
a power of 2 while being aligned with the @start address and less
than the maximum range defined by @gaw.
This helper is also useful for other iommu devices (virtio-iommu,
SMMUv3) to make sure IOMMU UNMAP notifiers only are called with
power of 2 range sizes.
Let's move this latter into dma-helpers.c and rename it into
dma_aligned_pow2_mask(). Also rewrite the helper so that it
accomodates UINT64_MAX values for the size mask and max mask.
It now returns a mask instead of a size. Change the caller.
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