monitor.c: Fix infinite loop in monitor's auto-complete
The QEMU monitor enters an infinite loop when trying to auto-complete commands
that accept only optional parameters. The commands currently affected by this
issue are 'info registers' and 'info mtree'.
The "default" parameter of the "-mon" option is useless since
QEMU v2.4.0, and marked as deprecated since QEMU v2.8.0. That
should have been long enough to let people update their scripts,
so time to remove it now.
* remotes/kraxel/tags/ui-20180216-pull-request:
ui: extend VNC trottling tracing to SASL codepaths
ui: check VNC audio frequency limit at time of reading from client
ui: avoid 'local_err' variable shadowing in VNC SASL auth
ui: avoid risk of 32-bit int overflow in VNC buffer check
sdl2: fix mouse grab
sdl: restore optimized redraw
vnc: fix segfault in closed connection handling
vnc: add qapi/error.h include to stubs
vnc: remove bogus object_unref on client socket
Peter Maydell [Fri, 16 Feb 2018 14:26:12 +0000 (14:26 +0000)]
Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-2.12-20180216' into staging
ppc patch queue 2018-02-16
Highlights of this batch:
* Conversion to TranslatorOps (Emilio Cota)
* Further bugfixes and cleanups to vcpu id allocation for pseries
(Greg Kurz)
* Another bugfix for HPT resizing (Daniel Henrique-Barboza)
* Macintosh CUDA cleanups (Mark Cave-Ayland)
* Further tweaks to Spectre/Meltdown mitigations (Suraj Singh)
* remotes/dgibson/tags/ppc-for-2.12-20180216:
ppc4xx: Add device models found in PPC440 core SoCs
ppc/spapr-caps: Disallow setting workaround for spapr-cap-ibs
target/ppc: convert to TranslatorOps
target/ppc: convert to DisasContextBase
spapr: consolidate the VCPU id numbering logic in a single place
spapr: rename spapr_vcpu_id() to spapr_get_vcpu_id()
spapr: move VCPU calculation to core machine code
spapr: use spapr->vsmt to compute VCPU ids
ppc/spapr-caps: Change migration macro to take full spapr-cap name
hw/char: remove legacy interface escc_init()
hw/ppc/spapr_hcall: set htab_shift after kvmppc_resize_hpt_commit
cuda: convert to trace-events
ppc: move CUDAState and other CUDA-related definitions into separate cuda.h file
cuda: convert to use the shared mos6522 device
Note that the 'Add test for migration to bad destination' displays
a 'Connection refused' during running, but still gives the correct exit
code and OK (It's checking that the source doesn't fail when
it can't connect, so that's the right error).
If it's particularly disliked that patch can be skipped individually.
# gpg: Signature made Wed 14 Feb 2018 15:33:04 GMT
# gpg: using RSA key 0516331EBC5BFDE7
# gpg: Good signature from "Dr. David Alan Gilbert (RH2) <[email protected]>"
# Primary key fingerprint: 45F5 C71B 4A0C B7FB 977A 9FA9 0516 331E BC5B FDE7
* remotes/dgilbert/tags/pull-migration-20180214a:
migration: pass MigrationState to migrate_init()
migration: allow send_rq to fail
migration: provide postcopy_fault_thread_notify()
migration: reuse mis->userfault_quit_fd
migration: better error handling with QEMUFile
tests/migration: Add test for migration to bad destination
migration: Fix early failure cleanup
tests/migration: Add source to PC boot block
migration: improve documentation of postcopy-ram
migration/xen: Check return value of qemu_fclose
ui: check VNC audio frequency limit at time of reading from client
The 'vs->as.freq' value is a signed integer, which is read from an
unsigned 32-bit int field on the wire. There is thus a risk of overflow
on 32-bit platforms. Move the frequency limit checking to be done at
time of read before casting to a signed integer.
ui: avoid 'local_err' variable shadowing in VNC SASL auth
The start_auth_sasl() method declares a 'Error *local_err' variable in
an inner if () {...} scope, which shadows a variable of the same name
declared at the start of the method. This is confusing for reviewers and
may trigger compiler warnings.
ui: avoid risk of 32-bit int overflow in VNC buffer check
For very large framebuffers, it is theoretically possible for the result
of 'vs->throttle_output_offset * VNC_THROTTLE_OUTPUT_LIMIT_SCALE' to
exceed the size of a 32-bit int. For this to happen in practice, the
video RAM would have to be set to a large enough value, which is not
likely today. None the less we can be paranoid against future growth by
using division instead of multiplication when checking the limits.
The documentation on SDL_RenderPresent function states that
"the backbuffer should be considered invalidated after each present",
so copy the entire texture on each redraw.
On the other hand, SDL_UpdateTexture function is described as
"fairly slow function", so restrict it to just the changed pixels.
Also added SDL_RenderClear call, as suggested in the documentation
page on SDL_RenderPresent.
Having analyzed the coredump, I understood that the reason is that
ioc_tag is reset on vnc_disconnect_start and ioc is cleaned
in vnc_disconnect_finish. Between these two events due to some
reasons the ioc_tag was set again and after vnc_disconnect_finish
the handler is running with freed ioc,
which led to the segmentation fault.
The patch checks vs->disconnecting in places where we call
qio_channel_add_watch and resets handler if disconnecting == TRUE
to prevent such an occurrence.
Peter Maydell [Fri, 16 Feb 2018 11:19:37 +0000 (11:19 +0000)]
Merge remote-tracking branch 'remotes/berrange/tags/qio-next-pull-request' into staging
# gpg: Signature made Thu 15 Feb 2018 17:50:22 GMT
# gpg: using RSA key BE86EBB415104FDF
# gpg: Good signature from "Daniel P. Berrange <[email protected]>"
# gpg: aka "Daniel P. Berrange <[email protected]>"
# Primary key fingerprint: DAF3 A6FD B26B 6291 2D0E 8E3F BE86 EBB4 1510 4FDF
* remotes/berrange/tags/qio-next-pull-request:
allow to build with older sed
io/channel-command: Do not kill the child process after closing the pipe
io: Add /dev/fdset/ support to QIOChannelFile
io: Don't call close multiple times in QIOChannelFile
io: Fix QIOChannelFile when creating and opening read-write
io/channel-websock: handle continuous reads without any data
io: fix QIONetListener memory leak
Thomas Huth [Fri, 16 Feb 2018 06:12:44 +0000 (07:12 +0100)]
tests/boot-serial-test: Fix problem with timeout due to dropped characters
Commit 92b540dac9fc3a5 introduce a counter to handle the timeouts in a
better way. But in case ccnt reaches 512, the current read character is
ignored - and if that character is part of the string that we are looking
for, the test fails to match the string.
Almost all of the tests look for a string within the first 512 bytes of
firmware output, so the problem never triggered there. But the hppa test
that has been added recently looks for a longer string at the very end of
a long output, thus there's a chance that we miss a character there so
that the test fails unexpectedly. Fix it by *not* reading and dropping a
character if the counter reaches 512.
Fixes: 92b540dac9fc3a572c7342edd0b073000f5a6abf Signed-off-by: Thomas Huth <[email protected]>
Message-id: 1518761564[email protected]
[PMM: added initializer for nbd to silence false-positive warning
from OpenBSD 6 compiler] Signed-off-by: Peter Maydell <[email protected]>
BALATON Zoltan [Thu, 15 Feb 2018 21:27:06 +0000 (22:27 +0100)]
ppc4xx: Add device models found in PPC440 core SoCs
These devices are found in newer SoCs based on 440 core e.g. the 460EX
(http://www.embeddeddeveloper.com/assets/processors/amcc/datasheets/
PP460EX_DS2063.pdf)
ppc/spapr-caps: Disallow setting workaround for spapr-cap-ibs
The spapr-cap cap-ibs can only have values broken or fixed as there is
no explicit workaround required. Currently setting the value workaround
for this cap will hit an assert if the guest makes the hcall
h_get_cpu_characteristics.
Report an error when attempting to apply the setting with a more helpful
error message.
or guess that the VCPU id of a given VCPU is the first thread of a virtual
core:
index % spapr->vsmt != 0
Even if the numbering logic isn't that complex, it is rather fragile to
have these assumptions open-coded in several places. FWIW this was
proved with recent issues related to VSMT.
This patch moves the VCPU id formula to a single function to be called
everywhere the code needs to compute one. It also adds an helper to
guess if a VCPU is the first thread of a VCORE.
Signed-off-by: Greg Kurz <[email protected]>
[dwg: Rename spapr_is_vcore() to spapr_is_thread0_in_vcore() for clarity] Signed-off-by: David Gibson <[email protected]>
Greg Kurz [Wed, 14 Feb 2018 19:40:35 +0000 (20:40 +0100)]
spapr: move VCPU calculation to core machine code
The VCPU ids are currently computed and assigned to each individual
CPU threads in spapr_cpu_core_realize(). But the numbering logic
of VCPU ids is actually a machine-level concept, and many places
in hw/ppc/spapr.c also have to compute VCPU ids out of CPU indexes.
The current formula used in spapr_cpu_core_realize() is:
vcpu_id = (cc->core_id * spapr->vsmt / smp_threads) + i
where:
cc->core_id is a multiple of smp_threads
cpu_index = cc->core_id + i
0 <= i < smp_threads
This formula was used before VSMT at the time VCPU ids where computed
at the target emulation level. It has the advantage of being useable
to derive a VPCU id out of a CPU index only. It is fitted for all the
places where the machine code has to compute a VCPU id.
This patch introduces an accessor to set the VCPU id in a PowerPCCPU object
using the above formula. It is a first step to consolidate all the VCPU id
logic in a single place.
Greg Kurz [Wed, 14 Feb 2018 19:40:26 +0000 (20:40 +0100)]
spapr: use spapr->vsmt to compute VCPU ids
Since the introduction of VSMT in 2.11, the spacing of VCPU ids
between cores is controllable through a machine property instead
of being only dictated by the SMT mode of the host:
cpu->vcpu_id = (cc->core_id * spapr->vsmt / smp_threads) + i
Until recently, the machine code would try to change the SMT mode
of the host to be equal to VSMT or exit. This allowed the rest of
the code to assume that kvmppc_smt_threads() == spapr->vsmt is
always true.
Recent commit "8904e5a75005 spapr: Adjust default VSMT value for
better migration compatibility" relaxed the rule. If the VSMT
mode cannot be set in KVM for some reasons, but the requested
CPU topology is compatible with the current SMT mode, then we
let the guest run with kvmppc_smt_threads() != spapr->vsmt.
This breaks quite a few places in the code, in particular when
calculating DRC indexes.
This is what happens on a POWER host with subcores-per-core=2 (ie,
supports up to SMT4) when passing the following topology:
But since the spacing of VCPU ids is 8, the DRC for core1 points to a
VCPU that doesn't exist, the DRC for core2 points to the first VCPU of
core1 and and so on...
ppc/spapr-caps: Change migration macro to take full spapr-cap name
Change the macro that generates the vmstate migration field and the needed
function for the spapr-caps to take the full spapr-cap name. This has
the benefit of meaning this instance will be picked up when greping
for the spapr-caps and making it more obvious what this macro is doing.
Laurent Vivier [Wed, 14 Feb 2018 06:35:58 +0000 (07:35 +0100)]
hw/char: remove legacy interface escc_init()
Move necessary stuff in escc.h and update type names.
Remove slavio_serial_ms_kbd_init().
Fix code style problems reported by checkpatch.pl
Update mac_newworld, mac_oldworld and sun4m to use directly the
QDEV interface.
hw/ppc/spapr_hcall: set htab_shift after kvmppc_resize_hpt_commit
Newer kernels have a htab resize capability when adding or remove
memory. At these situations, the guest kernel might reallocate its
htab to a more suitable size based on the resulting memory.
However, we're not setting the new value back into the machine state
when a KVM guest resizes its htab. At first this doesn't seem harmful,
but when migrating or saving the guest state (via virsh managedsave,
for instance) this mismatch between the htab size of QEMU and the
kernel makes the guest hangs when trying to load its state.
Inside h_resize_hpt_commit, the hypercall that commits the hash page
resize changes, let's set spapr->htab_shift to the new value if we're
sure that kvmppc_resize_hpt_commit were successful.
While we're here, add a "not RADIX" sanity check as it is already done
in the related hypercall h_resize_hpt_prepare.
Fixes: https://github.com/open-power-host-os/qemu/issues/28 Reported-by: Satheesh Rajendran <[email protected]> Signed-off-by: Daniel Henrique Barboza <[email protected]> Signed-off-by: David Gibson <[email protected]>
Peter Maydell [Thu, 15 Feb 2018 18:37:46 +0000 (18:37 +0000)]
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20180215-1' into staging
target-arm queue:
* aspeed: code cleanup to use unimplemented_device
* preparatory work for 'raspi3' RaspberryPi 3 machine model
* more SVE prep work
* v8M: add minor missing registers
* v7M: fix bug where we weren't migrating v7m.other_sp
* v7M: fix bugs in handling of interrupt registers for
external interrupts beyond 32
* remotes/pmaydell/tags/pull-target-arm-20180215-1:
raspi: Raspberry Pi 3 support
bcm2836: Make CPU type configurable
target/arm: Implement v8M MSPLIM and PSPLIM registers
target/arm: Migrate v7m.other_sp
target/arm: Add AIRCR to vmstate struct
hw/intc/armv7m_nvic: Fix byte-to-interrupt number conversions
target/arm: Implement writing to CONTROL_NS for v8M
hw/intc/armv7m_nvic: Implement SCR
hw/intc/armv7m_nvic: Implement cache ID registers
hw/intc/armv7m_nvic: Implement v8M CPPWR register
hw/intc/armv7m_nvic: Implement M profile cache maintenance ops
hw/intc/armv7m_nvic: Fix ICSR PENDNMISET/CLR handling
hw/intc/armv7m_nvic: Don't hardcode M profile ID registers in NVIC
target/arm: Handle SVE registers when using clear_vec_high
target/arm: Enforce access to ZCR_EL at translation
target/arm: Suppress TB end for FPCR/FPSR
target/arm: Enforce FP access to FPCR/FPSR
target/arm: Remove ARM_CP_64BIT from ZCR_EL registers
hw/arm/aspeed: simplify using the 'unimplemented device' for aspeed_soc.io
hw/arm/aspeed: directly map the serial device to the system address space
Pekka Enberg [Thu, 15 Feb 2018 18:29:36 +0000 (18:29 +0000)]
raspi: Raspberry Pi 3 support
This patch adds Raspberry Pi 3 support to hw/arm/raspi.c. The
differences to Pi 2 are:
- Firmware address
- Board ID
- Board revision
The CPU is different too, but that's going to be configured as part of
the machine default CPU when we introduce a new machine type.
The patch was written from scratch by me but the logic is similar to
Zoltán Baldaszti's previous work, which I used as a reference (with
permission from the author):
Pekka Enberg [Thu, 15 Feb 2018 18:29:36 +0000 (18:29 +0000)]
bcm2836: Make CPU type configurable
This patch adds a "cpu-type" property to BCM2836 SoC in preparation for
reusing the code for the Raspberry Pi 3, which has a different processor
model.
Peter Maydell [Thu, 15 Feb 2018 18:29:38 +0000 (18:29 +0000)]
target/arm: Implement v8M MSPLIM and PSPLIM registers
The v8M architecture includes hardware support for enforcing
stack pointer limits. We don't implement this behaviour yet,
but provide the MSPLIM and PSPLIM stack pointer limit registers
as reads-as-written, so that when we do implement the checks
in future this won't break guest migration.
Peter Maydell [Thu, 15 Feb 2018 18:29:37 +0000 (18:29 +0000)]
target/arm: Migrate v7m.other_sp
In commit abc24d86cc0364f we accidentally broke migration of
the stack pointer value for the mode (process, handler) the CPU
is not currently running as. (The commit correctly removed the
no-longer-used v7m.current_sp flag from the VMState but also
deleted the still very much in use v7m.other_sp SP value field.)
Add a subsection to migrate it again. (We don't need to care
about trying to retain compatibility with pre-abc24d86cc0364f
versions of QEMU, because that commit bumped the version_id
and we've since bumped it again a couple of times.)
Peter Maydell [Thu, 15 Feb 2018 18:29:37 +0000 (18:29 +0000)]
target/arm: Add AIRCR to vmstate struct
In commit commit 3b2e934463121 we added support for the AIRCR
register holding state, but forgot to add it to the vmstate
structs. Since it only holds r/w state if the security extension
is implemented, we can just add it to vmstate_m_security.
Peter Maydell [Thu, 15 Feb 2018 18:29:37 +0000 (18:29 +0000)]
hw/intc/armv7m_nvic: Fix byte-to-interrupt number conversions
In many of the NVIC registers relating to interrupts, we
have to convert from a byte offset within a register set
into the number of the first interrupt which is affected.
We were getting this wrong for:
* reads of NVIC_ISPR<n>, NVIC_ISER<n>, NVIC_ICPR<n>, NVIC_ICER<n>,
NVIC_IABR<n> -- in all these cases we were missing the "* 8"
needed to convert from the byte offset to the interrupt number
(since all these registers use one bit per interrupt)
* writes of NVIC_IPR<n> had the opposite problem of a spurious
"* 8" (since these registers use one byte per interrupt)
Peter Maydell [Thu, 15 Feb 2018 18:29:37 +0000 (18:29 +0000)]
target/arm: Implement writing to CONTROL_NS for v8M
In commit 50f11062d4c896 we added support for MSR/MRS access
to the NS banked special registers, but we forgot to implement
the support for writing to CONTROL_NS. Correct the omission.
Peter Maydell [Thu, 15 Feb 2018 18:29:37 +0000 (18:29 +0000)]
hw/intc/armv7m_nvic: Implement SCR
We were previously making the system control register (SCR)
just RAZ/WI. Although we don't implement the functionality
this register controls, we should at least provide the state,
including the banked state for v8M.
Peter Maydell [Thu, 15 Feb 2018 18:29:37 +0000 (18:29 +0000)]
hw/intc/armv7m_nvic: Implement cache ID registers
M profile cores have a similar setup for cache ID registers
to A profile:
* Cache Level ID Register (CLIDR) is a fixed value
* Cache Type Register (CTR) is a fixed value
* Cache Size ID Registers (CCSIDR) are a bank of registers;
which one you see is selected by the Cache Size Selection
Register (CSSELR)
The only difference is that they're in the NVIC memory mapped
register space rather than being coprocessor registers.
Implement the M profile view of them.
Since neither Cortex-M3 nor Cortex-M4 implement caches,
we don't need to update their init functions and can leave
the ctr/clidr/ccsidr[] fields in their ARMCPU structs at zero.
Newer cores (like the Cortex-M33) will want to be able to
set these ID registers to non-zero values, though.
Peter Maydell [Thu, 15 Feb 2018 18:29:37 +0000 (18:29 +0000)]
hw/intc/armv7m_nvic: Implement v8M CPPWR register
The Coprocessor Power Control Register (CPPWR) is new in v8M.
It allows software to control whether coprocessors are allowed
to power down and lose their state. QEMU doesn't have any
notion of power control, so we choose the IMPDEF option of
making the whole register RAZ/WI (indicating that no coprocessors
can ever power down and lose state).
Peter Maydell [Thu, 15 Feb 2018 18:29:37 +0000 (18:29 +0000)]
hw/intc/armv7m_nvic: Implement M profile cache maintenance ops
For M profile cores, cache maintenance operations are done by
writing to special registers in the system register space.
For QEMU, cache operations are always NOPs, since we don't
implement the cache. Implementing these explicitly avoids
a spurious LOG_GUEST_ERROR when the guest uses them.
The PENDNMISET/CLR bits in the ICSR should be RAZ/WI from
NonSecure state if the AIRCR.BFHFNMINS bit is zero. We had
misimplemented this as making the bits RAZ/WI from both
Secure and NonSecure states. Fix this bug by checking
attrs.secure so that Secure code can pend and unpend NMIs.
Peter Maydell [Thu, 15 Feb 2018 18:29:37 +0000 (18:29 +0000)]
hw/intc/armv7m_nvic: Don't hardcode M profile ID registers in NVIC
Instead of hardcoding the values of M profile ID registers in the
NVIC, use the fields in the CPU struct. This will allow us to
give different M profile CPU types different ID register values.
This commit includes the addition of the missing ID_ISAR5,
which exists as RES0 in both v7M and v8M.
(The values of the ID registers might be wrong for the M4 --
this commit leaves the behaviour there unchanged.)
Jan Beulich [Fri, 19 Jan 2018 07:52:27 +0000 (00:52 -0700)]
allow to build with older sed
sed's -E option may not be supported by older distros. As there's no
point using sed here at all, use just shell mechanisms to establish the
variable values, starting from the stem instead of the full target.
Thomas Huth [Wed, 14 Feb 2018 16:09:35 +0000 (17:09 +0100)]
io/channel-command: Do not kill the child process after closing the pipe
We are currently facing some migration failure on s390x when running
certain avocado-vt tests, e.g. when running the test
type_specific.io-github-autotest-qemu.migrate.with_reboot.exec.gzip_exec.
This test is using 'migrate -d "exec:nc localhost 5200"' for the migration.
The problem is detected at the receiving side, where the migration stream
apparently ends too early. However, the cause for the problem is at the
sending side: After writing the migration stream into the pipe to netcat,
the source QEMU calls qio_channel_command_close() which closes the pipe
and immediately (!) kills the child process afterwards (via the function
qio_channel_command_abort()). So if the sending netcat did not read the
final bytes from the pipe yet, or if it did not manage to send out all
its buffers yet, it is killed before the whole migration stream is passed
to the destination side.
QEMU can not know how much time is required by the child process to send
over all migration data, so we should not kill it, neither directly nor
after a delay. Let's simply wait for the child process to exit gracefully
instead (this was also the behaviour of pclose() that was used in "exec:"
migration before the QIOChannel rework).
Ross Lagerwall [Wed, 1 Nov 2017 14:25:26 +0000 (14:25 +0000)]
io: Add /dev/fdset/ support to QIOChannelFile
Add /dev/fdset/ support to QIOChannelFile by calling qemu_open() instead
of open() and qemu_close() instead of close(). There is a subtle
semantic change since qemu_open() automatically sets O_CLOEXEC, but this
doesn't affect any of the users of the function.
Ross Lagerwall [Wed, 1 Nov 2017 14:25:25 +0000 (14:25 +0000)]
io: Don't call close multiple times in QIOChannelFile
If the file descriptor underlying QIOChannelFile is closed in the
io_close() method, don't close it again in the finalize() method since
the file descriptor number may have been reused in the meantime.
Ross Lagerwall [Wed, 1 Nov 2017 14:25:24 +0000 (14:25 +0000)]
io: Fix QIOChannelFile when creating and opening read-write
The code wrongly passes the mode to open() only if O_WRONLY is set.
Instead, the mode should be passed when O_CREAT is set (or O_TMPFILE on
Linux). Fix this by always passing the mode since open() will correctly
ignore the mode if it is not needed. Add a testcase which exercises this
bug and also change the existing testcase to check that the mode of the
created file is correct.
io/channel-websock: handle continuous reads without any data
According to the current implementation of websocket protocol in QEMU,
qio_channel_websock_handshake_io tries to read handshake from the
channel to start communication over socket. But this approach
doesn't cover scenario when socket was closed while handshaking.
Therefore, if G_IO_IN is caught and qio_channel_read returns zero,
error has to be set and connection has to be done.
Such behaviour causes 100% CPU load in main QEMU loop, because main loop
poll continues to receive and handle G_IO_IN events from websocket.
Step to reproduce 100% CPU load:
1) start qemu with the simplest configuration
$ qemu -vnc [::1]:1,websocket=7500
2) open any vnc listener (which doesn't follow websocket
protocol)
$ vncviewer :7500
3) kill listener
4) qemu main thread eats 100% CPU
Peter Maydell [Thu, 15 Feb 2018 13:00:44 +0000 (13:00 +0000)]
Merge remote-tracking branch 'remotes/huth/tags/pull-request-2018-02-14' into staging
Various improvements to the qtest checks:
- Clean-ups by Eric Blake with regards to the global_qtest variable
- Some more test cases for the boot-serial tester
- Re-activation of the m48t59-test
* remotes/huth/tags/pull-request-2018-02-14:
tests/m48t59: Use the m48t59 test on ppc, too
tests/Makefile: Derive check-qtest-ppc64-y from check-qtest-ppc-y
tests/m48t59: Make the test independent of global_qtest
tests/m48t59: Fix and re-enable the test for sparc
tests/boot-serial-test: Add support for the aarch64 virt machine
tests/boot-serial: Add tests for PowerPC Mac machines
tests/boot-serial: Enable the boot-serial test on SPARC machines, too
wdt_ib700-test: Drop dependence on global_qtest
tests/boot-sector: Drop dependence on global_qtest
qmp-test: Drop dependence on global_qtest
libqos: Use explicit QTestState for remaining libqos operations
libqos: Use explicit QTestState for ahci operations
libqos: Use explicit QTestState for i2c operations
libqos: Use explicit QTestState for rtas operations
libqos: Use explicit QTestState for fw_cfg operations
libqos: Track QTestState with QPCIBus
libqtest: Use qemu_strtoul()
tests: Clean up wait for event
It is possible for rate limited writes to keep overshooting a slice's
quota by a tiny amount causing the slice-aligned waiting period to
effectively halve the rate.
Stefan Hajnoczi [Thu, 1 Feb 2018 11:07:08 +0000 (11:07 +0000)]
vl: pause vcpus before stopping iothreads
Commit dce8921b2baaf95974af8176406881872067adfa ("iothread: Stop threads
before main() quits") introduced iothread_stop_all() to avoid the
following virtio-scsi assertion failure:
Back then the assertion failed because when bdrv_close_all() made
d->conf.blk NULL, blk_get_aio_context() returned the global AioContext
instead of s->ctx.
The same assertion can still fail today when vcpus submit new I/O
requests after iothread_stop_all() has moved the BDS to the global
AioContext.
This patch hardens the iothread_stop_all() approach by pausing vcpus
before calling iothread_stop_all().
Note that the assertion failure is a race condition. It is not possible
to reproduce it reliably.
Thomas Huth [Mon, 12 Feb 2018 11:59:46 +0000 (12:59 +0100)]
tests/m48t59: Make the test independent of global_qtest
Stop using the functions that require global_qtest here and pass
around the QTestState instead (global_qtest should finally get
removed since this causes problems with tests running in parallel).
Thomas Huth [Mon, 12 Feb 2018 11:13:38 +0000 (12:13 +0100)]
tests/m48t59: Fix and re-enable the test for sparc
The m48t59 test has been disabled in commit baeddded5fe6fa37d13fb94bf8d
("sparc: disable qtest in make check"), likely due to some timing issues
in the bcd_check_time tests which might fail if it gets interrupted for
too long. It should be OK to re-enable this test if we make sure that we
do not run it on timing-sensitive machines, thus it should be OK if we only
run it in the g_test_slow() mode.
Additionally, there are two other issues:
First, the test can not run so easily on sparc64 anymore, since commit f3b18f35a23c60edbda6420cd ("sun4u: switch m48t59 NVRAM to MMIO access")
moved the m48t59 device to the ebus instead, and for this you first
have to set up the corresponding PCI device (which is currently not
possible from within the m48t59 test). So we can only re-enable this
test on sparc, but not the sparc64 target.
Second, the fuzzing test is executed before the bcd-check-time test
(due to the naming of the tests), without having the base address set
up properly, so the fuzzing test does not really check anything at all.
Fix it by setting up the base address from the main function already
and by moving the qtest_start() to the tests themselves, so that each
test starts with a clean environment (since after the fuzzing, the clock
is unusable for the bcd-check-time test).
Thomas Huth [Thu, 1 Feb 2018 09:28:22 +0000 (10:28 +0100)]
tests/boot-serial: Enable the boot-serial test on SPARC machines, too
OpenBIOS prints out the name of the detected CPU here, so looking for
this string is a nice test to verify that the CPU detection is still
working correctly.
Eric Blake [Mon, 11 Sep 2017 17:20:09 +0000 (12:20 -0500)]
wdt_ib700-test: Drop dependence on global_qtest
As a general rule, we prefer avoiding implicit global state
because it makes code harder to safely copy and paste without
thinking about the global state. Improve this test to be
explicit about the state.
Eric Blake [Mon, 11 Sep 2017 17:20:07 +0000 (12:20 -0500)]
tests/boot-sector: Drop dependence on global_qtest
As a general rule, we prefer avoiding implicit global state
because it makes code harder to safely copy and paste without
thinking about the global state. Adjust the helper code to
use explicit state instead, and update all callers.
Fix some trailing whitespace while touching the file.
Eric Blake [Mon, 11 Sep 2017 17:20:06 +0000 (12:20 -0500)]
qmp-test: Drop dependence on global_qtest
As a general rule, we prefer avoiding implicit global state
because it makes code harder to safely copy and paste without
thinking about the global state. Although qmp-test does not
maintain parallel qtest connections, it was the last test
assigning to global_qtest. It's just as easy to be explicit
about the state; once all tests have been cleaned up, a later
patch can then get rid of global_qtest and a layer of wrappers
in libqtest.
Eric Blake [Mon, 11 Sep 2017 17:20:01 +0000 (12:20 -0500)]
libqos: Use explicit QTestState for remaining libqos operations
Drop one more client of global_qtest by teaching all remaining
libqos stragglers to pass in an explicit QTestState. Change the
setting of global_qtest from being implicit in libqos' call to
qtest_start() to instead be explicit in all clients that are
still relying on global_qtest.
Note that qmp_execute() can be greatly simplified in the process,
and that we also get rid of interpolation of a JSON string into a
temporary variable when qtest_qmp() can do it more reliably.
Eric Blake [Mon, 11 Sep 2017 17:20:00 +0000 (12:20 -0500)]
libqos: Use explicit QTestState for ahci operations
Drop one more client of global_qtest by teaching all ahci test
functionality to pass in an explicit QTestState. The state was
already available, so no callers had to be adjusted.
Eric Blake [Mon, 11 Sep 2017 17:19:57 +0000 (12:19 -0500)]
libqos: Use explicit QTestState for fw_cfg operations
Drop one more client of global_qtest by teaching all fw_cfg test
functionality (invoked through alloc-pc) to pass in an explicit
QTestState, adjusting all callers. In particular, fw_cfg-test
had to reorder things to create the test state prior to creating
the fw_cfg (and drop a pointless strdup in the meantime), but that
test now no longer depends on global_qtest.
Eric Blake [Mon, 11 Sep 2017 17:19:52 +0000 (12:19 -0500)]
libqos: Track QTestState with QPCIBus
When initializing a QPCIBus, track which QTestState the bus is
associated with (so that a later patch can then explicitly use
that test state for all communication on the bus, rather than
blindly relying on global_qtest). Update the initialization
functions to take another parameter, and update all callers to
pass in state (for now, most callers get away with passing the
current global_qtest as the current state, although this required
fixing the order of initialization to ensure qtest_start() is
called before qpci_init*() in rtl8139-test, and provided an
opportunity to pass in the allocator in e1000e-test).
Touch up some allocations to use g_new0() rather than g_malloc()
while in the area, and simplify some code (all implementations
of QOSOps provide a .init_allocator() that never fails).
Signed-off-by: Eric Blake <[email protected]> Reviewed-by: John Snow <[email protected]> Reviewed-by: Thomas Huth <[email protected]>
[thuth: Removed hunk from vhost-user-test.c that is not required anymore,
fixed conflict in qtest_vboot() and adjusted qpci_init_pc() in sdhci-test] Signed-off-by: Thomas Huth <[email protected]>
Peter Xu [Thu, 8 Feb 2018 10:31:12 +0000 (18:31 +0800)]
migration: allow send_rq to fail
We will not allow failures to happen when sending data from destination
to source via the return path. However it is possible that there can be
errors along the way. This patch allows the migrate_send_rp_message()
to return error when it happens, and further extended it to
migrate_send_rp_req_pages().
Peter Xu [Thu, 8 Feb 2018 10:31:06 +0000 (18:31 +0800)]
migration: reuse mis->userfault_quit_fd
It was only used for quitting the page fault thread before. Let it be
something more useful - now we can use it to notify a "wake" for the
page fault thread (for any reason), and it only means "quit" if the
fault_thread_quit is set.
Since we changed what it does, renaming it to userfault_event_fd.
Peter Xu [Thu, 8 Feb 2018 10:31:05 +0000 (18:31 +0800)]
migration: better error handling with QEMUFile
If the postcopy down due to some reason, we can always see this on dst:
qemu-system-x86_64: RP: Received invalid message 0x0000 length 0x0000
However in most cases that's not the real issue. The problem is that
qemu_get_be16() has no way to show whether the returned data is valid or
not, and we are _always_ assuming it is valid. That's possibly not wise.
The best approach to solve this would be: refactoring QEMUFile interface
to allow the APIs to return error if there is. However it needs quite a
bit of work and testing. For now, let's explicitly check the validity
first before using the data in all places for qemu_get_*().
This patch tries to fix most of the cases I can see. Only if we are with
this, can we make sure we are processing the valid data, and also can we
make sure we can capture the channel down events correctly.
The boot block used in the migration test is currently only
shipped as a hex (with the source in the git commit message of ea0c6d62),
change this to actually include the source.
A script is added to rebuild the header but the expectation is that
the generated hex is shipped as well as the .s, so that
there's no requirement to have just the right assembler etc.
Greg Kurz [Wed, 7 Feb 2018 15:41:43 +0000 (16:41 +0100)]
migration: improve documentation of postcopy-ram
This capability must have the same value on both source and destination,
otherwise migration fails (commit 875fcd013ab6 "migration: incoming
postcopy advise sanity checks").
Let's write it down in various places where postcopy-ram is documented.
Ross Lagerwall [Tue, 6 Feb 2018 16:30:39 +0000 (16:30 +0000)]
migration/xen: Check return value of qemu_fclose
QEMUFile uses buffered IO so when writing small amounts (such as the Xen
device state file), the actual write call and any errors that may occur
only happen as part of qemu_fclose(). Therefore, report IO errors when
saving the device state under Xen by checking the return value of
qemu_fclose().
Pavel Dovgalyuk [Tue, 6 Feb 2018 12:44:31 +0000 (15:44 +0300)]
m68k: implement movep instruction
This patch implements movep instruction. It moves data between a data register
and alternate bytes within the address space starting at the location
specified and incrementing by two.
It was designed for the original 68000 and used in firmwares for
interfacing the 8-bit peripherals through the 16-bit data bus.
Without this patch opcode for this instruction is recognized as some bitop.
We still use hacks like qmp("") to wait for an event, even though we
have qmp_eventwait() since commit 8fe941f, and qmp_eventwait_ref()
since commit 7ffe312. Both commits neglected to convert all the
existing hacks. Make up what they missed.
Bonus: gets rid of empty format strings. A step towards compile-time
format string checking without triggering -Wformat-zero-length.
Peter Maydell [Tue, 13 Feb 2018 19:57:46 +0000 (19:57 +0000)]
Merge remote-tracking branch 'remotes/kevin/tags/for-upstream' into staging
Block layer patches
# gpg: Signature made Tue 13 Feb 2018 17:03:11 GMT
# gpg: using RSA key 7F09B272C88F2FD6
# gpg: Good signature from "Kevin Wolf <[email protected]>"
# Primary key fingerprint: DC3D EB15 9A9A F95D 3D74 56FE 7F09 B272 C88F 2FD6
* remotes/kevin/tags/for-upstream: (55 commits)
iotests: Add l2-cache-entry-size to iotest 137
iotests: Test downgrading an image using a small L2 slice size
iotests: Test valid values of l2-cache-entry-size
qcow2: Allow configuring the L2 slice size
qcow2: Rename l2_table in count_cow_clusters()
qcow2: Rename l2_table in count_contiguous_clusters_unallocated()
qcow2: Rename l2_table in count_contiguous_clusters()
qcow2: Rename l2_table in qcow2_alloc_compressed_cluster_offset()
qcow2: Update qcow2_truncate() to support L2 slices
qcow2: Update expand_zero_clusters_in_l1() to support L2 slices
qcow2: Prepare expand_zero_clusters_in_l1() for adding L2 slice support
qcow2: Read refcount before L2 table in expand_zero_clusters_in_l1()
qcow2: Update qcow2_update_snapshot_refcount() to support L2 slices
qcow2: Prepare qcow2_update_snapshot_refcount() for adding L2 slice support
qcow2: Update zero_single_l2() to support L2 slices
qcow2: Update discard_single_l2() to support L2 slices
qcow2: Update handle_alloc() to support L2 slices
qcow2: Update handle_copied() to support L2 slices
qcow2: Update qcow2_alloc_cluster_link_l2() to support L2 slices
qcow2: Update qcow2_get_cluster_offset() to support L2 slices
...
Peter Maydell [Tue, 13 Feb 2018 18:24:07 +0000 (18:24 +0000)]
Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging
* CAN bus (will be under network maintainner)
* scsi-block opblockers (myself)
* Dirty log bitmap cleanup (myself)
* SDHCI improvements and tests (Philippe)
* HAX support for larger guest sizese (Yu Ning)
* remotes/bonzini/tags/for-upstream: (48 commits)
travis: use libgcc-4.8-dev (libgcc-6-dev is not available on Ubuntu 14.04)
memory: unify loops to sync dirty log bitmap
memory: hide memory_region_sync_dirty_bitmap behind DirtyBitmapSnapshot
memory: remove memory_region_test_and_clear_dirty
g364fb: switch to using DirtyBitmapSnapshot
sdhci: add Spec v4.2 register definitions
sdhci: add a check_capab_v3() qtest
sdhci: check Spec v3 capabilities qtest
hw/arm/xilinx_zynqmp: enable the UHS-I mode
hw/arm/xilinx_zynqmp: fix the capabilities/spec version to match the datasheet
hw/arm/fsl-imx6: implement SDHCI Spec. v3
hw/arm/bcm2835_peripherals: change maximum block size to 1kB
hw/arm/bcm2835_peripherals: implement SDHCI Spec v3
sdhci: implement CMD/DAT[] fields in the Present State register
sdhci: implement UHS-I voltage switch
sdbus: add trace events
sdhci: implement the Host Control 2 register (tuning sequence)
sdhci: rename the hostctl1 register
sdhci: add support for v3 capabilities
hw/arm/xilinx_zynq: fix the capabilities register to match the datasheet
...
Peter Maydell [Tue, 13 Feb 2018 16:33:31 +0000 (16:33 +0000)]
Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into staging
virtio,vhost,pci,pc: features, fixes and cleanups
- new stats in virtio balloon
- virtio eventfd rework for boot speedup
- vhost memory rework for boot speedup
- fixes and cleanups all over the place
Signed-off-by: Michael S. Tsirkin <[email protected]>
# gpg: Signature made Tue 13 Feb 2018 16:29:55 GMT
# gpg: using RSA key 281F0DB8D28D5469
# gpg: Good signature from "Michael S. Tsirkin <[email protected]>"
# gpg: aka "Michael S. Tsirkin <[email protected]>"
# Primary key fingerprint: 0270 606B 6F3C DF3D 0B17 0970 C350 3912 AFBE 8E67
# Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA 8A0D 281F 0DB8 D28D 5469
* remotes/mst/tags/for_upstream: (22 commits)
virtio-balloon: include statistics of disk/file caches
acpi-test: update FADT
lpc: drop pcie host dependency
tests: acpi: fix FADT not being compared to reference table
hw/pci-bridge: fix pcie root port's IO hints capability
libvhost-user: Support across-memory-boundary access
libvhost-user: Fix resource leak
virtio-balloon: unref the memory region before continuing
pci: removed the is_express field since a uniform interface was inserted
virtio-blk: enable multiple vectors when using multiple I/O queues
pci/bus: let it has higher migration priority
pci-bridge/i82801b11: clear bridge registers on platform reset
vhost: Move log_dirty check
vhost: Merge and delete unused callbacks
vhost: Clean out old vhost_set_memory and friends
vhost: Regenerate region list from changed sections list
vhost: Merge sections added to temporary list
vhost: Simplify ring verification checks
vhost: Build temporary section list and deref after commit
virtio: improve virtio devices initialization time
...
projects / qemu.git / log