The EL0+UMA check is unique to DAIF. While SPSel had avoided the
check by nature of already checking EL >= 1, the other post v8.0
extensions to MSR (imm) allow EL0 and do not require UMA. Avoid
the unconditional write to pc and use raise_exception_ra to unwind.
target/arm: Fix PC test for LDM (exception return)
Found by inspection: Rn is the base register against which the
load began; I is the register within the mask being processed.
The exception return should of course be processed from the loaded PC.
Peter Maydell [Tue, 5 Mar 2019 09:33:20 +0000 (09:33 +0000)]
Merge remote-tracking branch 'remotes/jasowang/tags/net-pull-request' into staging
# gpg: Signature made Tue 05 Mar 2019 07:06:28 GMT
# gpg: using RSA key EF04965B398D6211
# gpg: Good signature from "Jason Wang (Jason Wang on RedHat) <[email protected]>" [marginal]
# gpg: WARNING: This key is not certified with sufficiently trusted signatures!
# gpg: It is not certain that the signature belongs to the owner.
# Primary key fingerprint: 215D 46F4 8246 689E C77F 3562 EF04 965B 398D 6211
* remotes/jasowang/tags/net-pull-request:
tests: Add a test for qemu self announcements
hmp: Add hmp_announce_self
qmp: Add announce-self command
virtio-net: Allow qemu_announce_self to trigger virtio announcements
net: Add a network device specific self-announcement ability
migration: Switch to using announce timer
virtio-net: Switch to using announce timer
migration: Add announce parameters
net: Introduce announce timer
net: netmap: improve netmap_receive_iov()
net: netmap: simplify netmap_receive()
net: netmap: small improvements netmap_send()
net/colo-compare.c: Remove duplicated code
Add an HMP command to trigger self annocements.
Unlike the QMP command (which takes a set of parameters), the HMP
command reuses the set of parameters used for migration.
virtio-net: Allow qemu_announce_self to trigger virtio announcements
Expose the virtio-net self announcement capability and allow
qemu_announce_self() to call it.
These announces are caused by something external (i.e. the
announce-self command); they won't trigger if the migration
counter is triggering announces at the same time.
Switch the announcements to using the new announce timer.
Move the code that does it to announce.c rather than savevm
because it really has nothing to do with the actual migration.
Migration starts the announce from bh's and so they're all
in the main thread/bql, and so there's never any racing with
the timers themselves.
Switch virtio's self announcement to use the AnnounceTimer.
It keeps it's own AnnounceTimer (per device), and starts running it
using a migration post-load and a virtual clock; that way the
announce happens once the guest is actually running.
The timer uses the migration parameters to set the timing of
the repeats.
Based on earlier patches by myself and
Vladislav Yasevich <[email protected]>
Changes:
- Save CPU cycles by computing the return value while scanning the
input iovec, rather than calling iov_size() at the end.
- Remove check for s->tx != NULL, because it cannot happen.
- Cache ring->tail in a local variable and use it to check for
space in the TX ring. The use of nm_ring_empty() was invalid,
because nobody is updating ring->cur and ring->head at that point.
- In case we run out of netmap slots in the middle of a packet,
move the wake-up point by advancing ring->cur, but do not
expose the incomplete packet (i.e., by updating also ring->head).
This change improves the handling of incomplete multi-slot packets
(e.g. with the NS_MOREFRAG set), by advancing ring->head only on
complete packets. The ring->cur pointer is advanced in any case in
order to acknowledge the kernel and move the wake-up point (thus
avoiding repeated wake-ups).
Also don't be verbose when incomplete packets are found.
Peter Maydell [Mon, 4 Mar 2019 16:50:40 +0000 (16:50 +0000)]
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-cocoa-20190304' into staging
cocoa tree:
* Support OSX Mojave by ensuring that we always make Cocoa UI
function calls from the main thread, never from any other QEMU
thread. This was previously mostly harmless, but on Mojave
it will cause OSX to terminate the QEMU process.
* remotes/pmaydell/tags/pull-cocoa-20190304:
ui/cocoa: Perform UI operations only on the main thread
ui/cocoa: Subclass NSApplication so we can implement sendEvent
ui/cocoa: Don't call NSApp sendEvent directly from handleEvent
ui/cocoa: Move console/device menu creation code up in file
ui/cocoa: Factor out initial menu creation
ui/cocoa: Use the pixman image directly in switchSurface
ui/cocoa: Ensure we have the iothread lock when calling into QEMU
Peter Maydell [Mon, 25 Feb 2019 10:24:33 +0000 (10:24 +0000)]
ui/cocoa: Perform UI operations only on the main thread
The OSX Mojave release is more picky about enforcing the Cocoa API
restriction that only the main thread may perform UI calls. To
accommodate this we need to restructure the Cocoa code:
* the special OSX main() creates a second thread and uses
that to call the vl.c qemu_main(); the original main
thread goes into the OSX event loop
* the refresh, switch and update callbacks asynchronously
tell the main thread to do the necessary work
* the refresh callback no longer does the "get events from the
UI event queue and handle them" loop, since we now use
the stock OSX event loop. Instead our NSApplication sendEvent
method will either deal with them or pass them on to OSX
All these things have to be changed in one commit, to avoid
breaking bisection.
Note that since we use dispatch_get_main_queue(), this bumps
our minimum version requirement to OSX 10.10 Yosemite (released
in 2014, unsupported by Apple since 2017).
Peter Maydell [Mon, 25 Feb 2019 10:24:32 +0000 (10:24 +0000)]
ui/cocoa: Subclass NSApplication so we can implement sendEvent
When we switch away from our custom event handling, we still want to
be able to have first go at any events our application receives,
because in full-screen mode we want to send key events to the guest,
even if they would be menu item activation events. There are several
ways we could do that, but one simple approach is to subclass
NSApplication so we can implement a custom sendEvent method.
Do that, but for the moment have our sendEvent just invoke the
superclass method.
Peter Maydell [Mon, 25 Feb 2019 10:24:31 +0000 (10:24 +0000)]
ui/cocoa: Don't call NSApp sendEvent directly from handleEvent
Currently the handleEvent method will directly call the NSApp
sendEvent method for any events that we want to let OSX deal
with. When we rearrange the event handling code, the way that
we say "let OSX have this event" is going to change. Prepare
for that by refactoring so that handleEvent returns a flag
indicating whether it consumed the event.
Peter Maydell [Mon, 25 Feb 2019 10:24:30 +0000 (10:24 +0000)]
ui/cocoa: Move console/device menu creation code up in file
Move the console/device menu creation code functions
further up in the source file, next to the code which
creates the initial menus. We're going to want to
change the location we call these functions from in
the next patch.
This commit is a pure code move with no other changes.
Peter Maydell [Mon, 25 Feb 2019 10:24:29 +0000 (10:24 +0000)]
ui/cocoa: Factor out initial menu creation
Factor out the long code sequence in main() which creates
the initial set of menus. This will make later patches
which move initialization code around a bit clearer.
Peter Maydell [Mon, 25 Feb 2019 10:24:28 +0000 (10:24 +0000)]
ui/cocoa: Use the pixman image directly in switchSurface
Currently the switchSurface method takes a DisplaySurface. We want
to change our DisplayChangeListener's dpy_gfx_switch callback
to do this work asynchronously on a different thread. The caller
of the switch callback will free the old DisplaySurface
immediately the callback returns, so to ensure that the
other thread doesn't access freed data we need to switch
to using the underlying pixman image instead. The pixman
image is reference counted, so we will be able to take
a reference to it to avoid it vanishing too early.
In this commit we only change the switchSurface method
to take a pixman image, and keep the flow of control
synchronous for now.
Peter Maydell [Mon, 25 Feb 2019 10:24:27 +0000 (10:24 +0000)]
ui/cocoa: Ensure we have the iothread lock when calling into QEMU
The Cocoa UI should run on the main thread; this is enforced
in OSX Mojave. In order to be able to run on the main thread,
we need to make sure we hold the iothread lock whenever we
call into various QEMU UI midlayer functions.
Peter Maydell [Mon, 4 Mar 2019 15:56:07 +0000 (15:56 +0000)]
Merge remote-tracking branch 'remotes/stefanberger/tags/pull-tpm-2019-02-25-1' into staging
Merge tpm 2029/02/25 v1
# gpg: Signature made Mon 25 Feb 2019 15:05:12 GMT
# gpg: using RSA key 75AD65802A0B4211
# gpg: Good signature from "Stefan Berger <[email protected]>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: B818 B9CA DF90 89C2 D5CE C66B 75AD 6580 2A0B 4211
* remotes/stefanberger/tags/pull-tpm-2019-02-25-1:
tpm_tis: convert tpm_tis_show_buffer() to use trace event
tpm_tis: fix loop that cancels any seizure by a lower locality
* remotes/cohuck/tags/s390x-20190304: (27 commits)
s390x: Add floating-point extension facility to "qemu" cpu model
s390x/tcg: Handle all rounding modes overwritten by BFP instructions
s390x/tcg: Implement rounding mode and XxC for LOAD ROUNDED
s390x/tcg: Implement XxC and checks for most FP instructions
s390x/tcg: Prepare for IEEE-inexact-exception control (XxC)
s390x/tcg: Refactor saving/restoring the bfp rounding mode
s390x/tcg: Check for exceptions in SET BFP ROUNDING MODE
s390x/tcg: Handle SET FPC AND LOAD FPC 3-bit BFP rounding modes
s390x/tcg: Fix simulated-IEEE exceptions
s390x/tcg: Refactor SET FPC AND SIGNAL handling
s390x/tcg: Hide IEEE underflows in some scenarios
s390x/tcg: Fix parts of IEEE exception handling
s390x/tcg: Factor out conversion of softfloat exceptions
s390x/tcg: Fix rounding from float128 to uint64_t/uint32_t
s390x/tcg: Fix TEST DATA CLASS instructions
s390x/tcg: Implement LOAD COUNT TO BLOCK BOUNDARY
s390x/tcg: Implement LOAD LENGTHENED short HFP to long HFP
s390x/tcg: Factor out gen_addi_and_wrap_i64() from get_address()
s390x/tcg: Factor out vec_full_reg_offset()
s390x/tcg: Clarify terminology in vec_reg_offset()
...
Peter Maydell [Mon, 4 Mar 2019 11:04:31 +0000 (11:04 +0000)]
Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into staging
pci, pc, virtio: fixes, cleanups, tests
Lots of work on tests: BiosTablesTest UEFI app,
vhost-user testing for non-Linux hosts.
Misc cleanups and fixes all over the place
Signed-off-by: Michael S. Tsirkin <[email protected]>
# gpg: Signature made Fri 22 Feb 2019 15:51:40 GMT
# gpg: using RSA key 281F0DB8D28D5469
# gpg: Good signature from "Michael S. Tsirkin <[email protected]>" [full]
# gpg: aka "Michael S. Tsirkin <[email protected]>" [full]
# Primary key fingerprint: 0270 606B 6F3C DF3D 0B17 0970 C350 3912 AFBE 8E67
# Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA 8A0D 281F 0DB8 D28D 5469
* remotes/mst/tags/for_upstream: (26 commits)
pci: Sanity test minimum downstream LNKSTA
hw/smbios: fix offset of type 3 sku field
pci: Move NVIDIA vendor id to the rest of ids
virtio-balloon: Safely handle BALLOON_PAGE_SIZE < host page size
virtio-balloon: Use ram_block_discard_range() instead of raw madvise()
virtio-balloon: Rework ballon_page() interface
virtio-balloon: Corrections to address verification
virtio-balloon: Remove unnecessary MADV_WILLNEED on deflate
i386/kvm: ignore masked irqs when update msi routes
contrib/vhost-user-blk: fix the compilation issue
Revert "contrib/vhost-user-blk: fix the compilation issue"
pc-dimm: use same mechanism for [get|set]_addr
tests/data: introduce "uefi-boot-images" with the "bios-tables-test" ISOs
tests/uefi-test-tools: add build scripts
tests: introduce "uefi-test-tools" with the BiosTablesTest UEFI app
roms: build the EfiRom utility from the roms/edk2 submodule
roms: add the edk2 project as a git submodule
vhost-user-test: create a temporary directory per TestServer
vhost-user-test: small changes to init_hugepagefs
vhost-user-test: create a main loop per TestServer
...
s390x: Add floating-point extension facility to "qemu" cpu model
The floating-point extension facility implemented certain changes to
BFP, HFP and DFP instructions.
As we don't implement HFP/DFP, we can ignore those completely. Related
to BFP, the changes include
- SET BFP ROUNDING MODE (SRNMB) instruction
- BFP-rounding-mode field in the FPC register is changed to 3 bits
- CONVERT FROM LOGICAL instructions
- CONVERT TO LOGICAL instructions
- Changes (rounding mode + XxC) added to
-- CONVERT TO FIXED
-- CONVERT FROM FIXED
-- LOAD FP INTEGER
-- LOAD ROUNDED
-- DIVIDE TO INTEGER
For TCG, we don't implement DIVIDE TO INTEGER, and it is harder to
implement, so skip that. Also, as we don't implement PFPO, we can skip
changes to that as well. The other parts are now implemented, we can
indicate the facility.
z14 PoP mentions that "The floating-point extension facility is installed
in the z/Architecture architectural mode. When bit 37 is one, bit 42 is
also one.", meaning that the DFP (decimal-floating-point) facility also
has to be indicated. We can ignore that for now.
s390x/tcg: Implement XxC and checks for most FP instructions
With the floating-point extension facility
- CONVERT FROM LOGICAL
- CONVERT TO LOGICAL
- CONVERT TO FIXED
- CONVERT FROM FIXED
- LOAD FP INTEGER
have both, a rounding mode specification and the inexact-exception control
(XxC). Other instructions will be handled separatly.
Check for valid rounding modes and forward also the XxC (via m4). To avoid
a lot of boilerplate code and changes to the helpers, combine both, the
m3 and m4 field in a combined 32 bit TCG variable. Perform checks at
a central place, taking in account if the m3 or m4 field was ignore
before the floating-point extension facility was introduced.
s390x/tcg: Prepare for IEEE-inexact-exception control (XxC)
Some instructions allow to suppress IEEE inexact exceptions.
z14 PoP, 9-23, "Suppression of Certain IEEE Exceptions"
IEEE-inexact-exception control (XxC): Bit 1 of
the M4 field is the XxC bit. If XxC is zero, recogni-
tion of IEEE-inexact exception is not suppressed;
if XxC is one, recognition of IEEE-inexact excep-
tion is suppressed.
Especially, handling for overflow/unerflow remains as is, inexact is
reported along
z14 PoP, 9-23, "Suppression of Certain IEEE Exceptions"
For example, the IEEE-inexact-exception control (XxC)
has no effect on the DXC; that is, the DXC for IEEE-
overflow or IEEE-underflow exceptions along with the
detail for exact, inexact and truncated, or inexact and
incremented, is reported according to the actual con-
dition.
Follow up patches will wire it correctly up for the applicable
instructions.
s390x/tcg: Check for exceptions in SET BFP ROUNDING MODE
Let's split handling of BFP/DFP rounding mode configuration. Also,
let's not reuse the sfpc handler, use a separate handler so we can
properly check for specification exceptions for SRNMB.
s390x/tcg: Handle SET FPC AND LOAD FPC 3-bit BFP rounding modes
We already forward the 3 bits correctly in the translation functions. We
also have to handle them properly and check for specification
exceptions.
Setting an invalid rounding mode (BFP only, all DFP rounding modes)
results in a specification exception. Setting unassigned bits in the
fpc, results in a specification exception.
This fixes LOAD FPC (AND SIGNAL), SET FPC (AND SIGNAL). Also for,
SET BFP ROUNDING MODE, 3-bit rounding mode is now explicitly checked.
Note: TCG_CALL_NO_WG is required for sfpc handler, as we now inject
exceptions.
We won't be modeling abscence of the "floating-point extension facility"
for now, not necessary as most take the facility for granted without
checking.
z14 PoP, 9-23, "LOAD FPC"
When the floating-point extension facility is
installed, bits 29-31 of the second operand must
specify a valid BFP rounding mode and bits 6-7,
14-15, 24, and 28 must be zero; otherwise, a
specification exception is recognized.
IEEE underflows are not reported when the mask bit is off and we don't
also have an inexact exception.
z14 PoP, 9-20, "IEEE Underflow":
An IEEE-underflow exception is recognized for an
IEEE target when the tininess condition exists and
either: (1) the IEEE-underflow mask bit in the FPC
register is zero and the result value is inexact, or (2)
the IEEE-underflow mask bit in the FPC register is
one.
Many things are wrong and some parts cannot be fixed yet. Fix what we
can fix easily and add two FIXMEs:
The fpc flags are not updated in case an exception is actually injected.
Inexact exceptions have to be handled separately, as they are the only
exceptions that can coexist with underflows and overflows.
I reread the horribly complicated chapters in the PoP at least 5 times
and hope I got it right.
s390x/tcg: Factor out conversion of softfloat exceptions
We want to reuse that function in vector instruction context. While at it,
cleanup the code, using defines for magic values and avoiding the
handcrafted bit conversion.
Let's detect normal and denormal ("subnormal") numbers reliably. Also
test for quiet NaN's. As only one class is possible, test common cases
first.
While at it, use a better check to test for the mask bits in the data
class mask. The data class mask has 12 bits, whereby bit 0 is the
leftmost bit and bit 11 the rightmost bit. In the PoP an easy to read
table with the numbers is provided for the VECTOR FP TEST DATA CLASS
IMMEDIATE instruction, the table for TEST DATA CLASS is more confusing
as it is based on 64 bit values.
Factor the checks out into separate functions, as they will also be
needed for floating point vector instructions. We can use a makro to
generate the functions.
Use a new CC helper to calculate the CC lazily if needed. While the
PoP mentions that "A 32-bit unsigned binary integer" is placed into the
first operand, there is no word telling that the other 32 bits (high
part) are left untouched. Maybe the other 32-bit are unpredictable.
So store 64 bit for now.
s390x/tcg: Implement LOAD LENGTHENED short HFP to long HFP
Nice trick to load a 32 bit value into vector element 0 (32 bit element
size) from memory, zeroing out element1. The short HFP to long HFP
conversion really only is a shift.
Tony Krowiak [Mon, 18 Feb 2019 19:49:56 +0000 (14:49 -0500)]
s390x/vfio-ap: Implement hot plug/unplug of vfio-ap device
Introduces hot plug/unplug support for the vfio-ap device.
To hot plug a vfio-ap device using the QEMU device_add command:
(qemu) device_add vfio-ap,sysfsdev=$path-to-mdev
Where $path-to-mdev is the absolute path to the mediated matrix device
to which AP resources to be used by the guest have been assigned.
A vfio-ap device can be hot plugged only if:
1. A vfio-ap device has not been attached to the virtual machine's ap-bus
via the QEMU command line or a prior hot plug action.
2. The guest was started with the CPU model feature for AP enabled
(e.g., -cpu host,ap=on)
To hot unplug a vfio-ap device using the QEMU device_del command:
(qemu) device_del vfio-ap,sysfsdev=$path-to-mdev
Where $path-to-mdev is the absolute path to the mediated matrix device
specified when the vfio-ap device was attached to the virtual machine's
ap-bus.
A vfio-ap device can be hot unplugged only if:
1. A vfio-ap device has been attached to the virtual machine's ap-bus
via the QEMU command line or a prior hot plug action.
2. The guest was started with the CPU model feature for AP enabled
(e.g., -cpu host,ap=on)
Please note that a hot plug handler is not necessary for the vfio-ap device
because the AP matrix configuration for the guest is performed by the
kernel device driver when the vfio-ap device is realized. The vfio-ap device
represents a VFIO mediated device created in the host sysfs for use by a guest.
The mdev device is configured with an AP matrix (i.e., adapters and domains) via
its sysfs attribute interfaces prior to starting the guest or plugging a vfio-ap
device in. When the device is realized, a file descriptor is opened on the mdev
device which results in a callback to the vfio_ap kernel device driver. The
device driver then configures the AP matrix in the guest's SIE state description
from the AP matrix assigned via the mdev device's sysfs interfaces. The AP
devices will be created for the guest when the AP bus running on the guest
subsequently performs its periodic scan for AP devices.
The qdev_simple_device_unplug_cb() callback function is used for the same
reaons; namely, the vfio_ap kernel device driver will perform the AP resource
de-configuration for the guest when the vfio-ap device is unplugged. When the
vfio-ap device is unrealized, the mdev device file descriptor is closed which
results in a callback to the vfio_ap kernel device driver. The device driver
then clears the AP matrix configuration in the guest's SIE state description
and resets all of the affected queues. The AP devices created for the guest
will be removed when the AP bus running on the guest subsequently performs
its periodic scan and finds there are no longer any AP resources assigned to the
guest.
If we have vector registers and the designation is not zero, we have
to try to write the vector registers. If the designation is zero or
if storing fails, we must not indicate validity. s390_build_validity_mcic()
automatically already sets validity if the vector instruction facility
is installed.
As long as we don't support the guarded-storage facility, the alignment
and size of the area is always 1024 bytes.
s390x: Use cpu_to_be64 in SIGP STORE ADDITIONAL STATUS
As we will support vector instructions soon, and vector registers are
stored in 64bit host chunks, let's use cpu_to_be64. Same applies to the
guarded storage control block.
Peter Maydell [Fri, 1 Mar 2019 11:20:49 +0000 (11:20 +0000)]
Merge remote-tracking branch 'remotes/cminyard/tags/i2c-for-release-20190228' into staging
This has been out there long enough, I need to get this in.
This was changed a little bit since my post on Feb 20 (to which
there were no comments) due to changes I had to work around:
Change b296b664abc73253 "smbus: Add a helper to generate SPD EEPROM
data" added a function to include/hw/i2c/smbus.h, which I had to move to
include/hw/smbus_eeprom.h.
There were some changes to hw/i2c/Makefile.objs that I had to fix up.
Beyond that, no changes.
Thanks,
-corey
# gpg: Signature made Thu 28 Feb 2019 18:05:49 GMT
# gpg: using RSA key FD0D5CE67CE0F59A6688268661F38C90919BFF81
# gpg: Good signature from "Corey Minyard <[email protected]>" [unknown]
# gpg: aka "Corey Minyard <[email protected]>" [unknown]
# gpg: aka "Corey Minyard <[email protected]>" [unknown]
# gpg: aka "Corey Minyard <[email protected]>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: FD0D 5CE6 7CE0 F59A 6688 2686 61F3 8C90 919B FF81
* remotes/cminyard/tags/i2c-for-release-20190228:
i2c: Verify that the count passed in to smbus_eeprom_init() is valid
i2c:smbus_eeprom: Add a reset function to smbus_eeprom
i2c:smbus_eeprom: Add vmstate handling to the smbus eeprom
i2c:smbus_eeprom: Add a size constant for the smbus_eeprom size
i2c:smbus_eeprom: Add normal type name and cast to smbus_eeprom.c
i2c:smbus_slave: Add an SMBus vmstate structure
i2c:pm_smbus: Fix state transfer
migration: Add a VMSTATE_BOOL_TEST() macro
i2c:pm_smbus: Fix pm_smbus handling of I2C block read
boards.h: Ignore migration for SMBus devices on older machines
i2c:smbus: Make white space in switch statements consistent
i2c:smbus_eeprom: Get rid of the quick command
i2c:smbus: Simplify read handling
i2c:smbus: Simplify write operation
i2c:smbus: Correct the working of quick commands
i2c: Don't check return value from i2c_recv()
arm:i2c: Don't mask return from i2c_recv()
i2c: have I2C receive operation return uint8_t
i2c: Split smbus into parts
* remotes/huth-gitlab/tags/pull-request-2019-02-28:
hw/m68k/mcf5208: Support loading of bios images
tests/test-qga: Reenable guest-agent qtest
MAINTAINERS: Clean up the RISC-V TCG backend section
MAINTAINERS: Add some missing entries for the sun4m machine
MAINTAINERS: Add maintainer to the TCG/i386 subsystem
MAINTAINERS: Add maintainers to the Linux subsystem
MAINTAINERS: Orphanize the 'GDB stub' subsystem
MAINTAINERS: Add maintainer to the POSIX subsystem
MAINTAINERS: Add an entry for the Dino machine
MAINTAINERS: Add missing test entries to the Cryptography section
MAINTAINERS: Add missing entries for the QObject section
MAINTAINERS: Add missing entries for the PC machines
MAINTAINERS: Add missing entries for the sun4u machines
Peter Maydell [Thu, 28 Feb 2019 17:35:42 +0000 (17:35 +0000)]
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20190228-1' into staging
target-arm queue:
* add MHU and dual-core support to Musca boards
* refactor some VFP insns to be gated by ID registers
* Revert "arm: Allow system registers for KVM guests to be changed by QEMU code"
* Implement ARMv8.2-FHM extension
* Advertise JSCVT via HWCAP for linux-user
* remotes/pmaydell/tags/pull-target-arm-20190228-1:
linux-user: Enable HWCAP_ASIMDFHM, HWCAP_JSCVT
target/arm: Enable ARMv8.2-FHM for -cpu max
target/arm: Implement VFMAL and VFMSL for aarch32
target/arm: Implement FMLAL and FMLSL for aarch64
target/arm: Add helpers for FMLAL
Revert "arm: Allow system registers for KVM guests to be changed by QEMU code"
target/arm: Gate "miscellaneous FP" insns by ID register field
target/arm: Use MVFR1 feature bits to gate A32/T32 FP16 instructions
hw/arm/armsse: Unify init-svtor and cpuwait handling
hw/arm/iotkit-sysctl: Implement CPUWAIT and INITSVTOR*
hw/arm/iotkit-sysctl: Add SSE-200 registers
hw/misc/iotkit-sysctl: Correct typo in INITSVTOR0 register name
target/arm/arm-powerctl: Add new arm_set_cpu_on_and_reset()
target/arm/cpu: Allow init-svtor property to be set after realize
hw/arm/armsse: Wire up the MHUs
hw/misc/armsse-mhu.c: Model the SSE-200 Message Handling Unit
While in the neighbourhood free 'driver' and 'filename' as soon as they are
added to the QDicts. Freeing after the 'done' label doesn't make that much
sense as, if the error path jumps to that label, the values would be NULL
anyway.
This patch also makes that more obvious by taking the error path if
'params' is NULL and then asserting that both driver and filename are
non-NULL in the normal path.
* remotes/kraxel/tags/audio-20190228-pull-request:
audio/sdlaudio: Simplify the sdl_callback function
audio/sdlaudio: Remove the semaphore code
audio: don't build alsa and sdl by default on linux
audio: Do not check for audio_calloc failure
audio: Use g_strdup_printf instead of manual building a string
Peter Maydell [Thu, 28 Feb 2019 12:59:49 +0000 (12:59 +0000)]
Merge remote-tracking branch 'remotes/amarkovic/tags/mips-queue-feb-27-2019' into staging
MIPS queue for February 27th, 2019
# gpg: Signature made Wed 27 Feb 2019 13:27:36 GMT
# gpg: using RSA key D4972A8967F75A65
# gpg: Good signature from "Aleksandar Markovic <[email protected]>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 8526 FBF1 5DA3 811F 4A01 DD75 D497 2A89 67F7 5A65
* remotes/amarkovic/tags/mips-queue-feb-27-2019:
target/mips: Preparing for adding MMI instructions
tests/tcg: target/mips: Add tests for MSA integer max/min instructions
tests/tcg: target/mips: Add wrappers for MSA integer max/min instructions
qemu-doc: Add section on MIPS' Boston board
qemu-doc: Add section on MIPS' Fulong 2E board
qemu-doc: Move section on MIPS' mipssim pseudo board
disas: nanoMIPS: Fix a function misnomer
tests/tcg: target/mips: Add tests for MSA integer compare instructions
Max Filippov [Mon, 18 Feb 2019 14:58:23 +0000 (06:58 -0800)]
tests/tcg/xtensa: conditionalize and expand SR tests
Make tests for specific special registers conditional on the presence of
the options that add these registers and test that the registers are not
accessible otherwise.
Make timer/CCOUNT tests conditional on the presence of timer option and
number of configured timers. Don't use hard coded interrupt levels for
timers, use configured values.
Max Filippov [Mon, 18 Feb 2019 14:50:10 +0000 (06:50 -0800)]
tests/tcg/xtensa: conditionalize interrupt tests
Make interrupt tests conditional on the presence of interrupt option and
on the presence of level-1 and high level software interrupts. Don't use
hard-coded interrupt level for the high level interrupt tests, choose
high level software IRQ and use its configured level.
Make debug tests conditional on the presence of the debug option in the
config and tests that depend on the presence/number of instruction or
data breakpoint registers on the corresponding definitions. Use
configured debug interrupt level instead of the hardcoded value to set
up IRQ handler and access debug EPC register.
Max Filippov [Mon, 18 Feb 2019 14:18:13 +0000 (06:18 -0800)]
tests/tcg/xtensa: fix endianness issues in test_b
Use bbci.l/bbsi.l instead of bbci/bbsi, as they are assembly macros that
accept little-endian bit number and produce correct immediate for both
little and big endian configurations. Choose value loaded into register
for bbc/bbs opcodes based on configuration endianness.
Max Filippov [Mon, 18 Feb 2019 16:20:35 +0000 (08:20 -0800)]
tests/tcg/xtensa: support configs with LITBASE
Configurations with LITBASE register may use absolute literals by
default. Pass --no-absolute-literals option to assembler to use
PC-relative literals instead.
Max Filippov [Mon, 18 Feb 2019 14:04:51 +0000 (06:04 -0800)]
tests/tcg/xtensa: support configurations w/o vecbase
Configurations w/o vecbase may have vectors not grouped together and not
in fixed order. They may not always be grouped into single output
sections by assigning next offset to dot, as it may sometimes move dot
backwards and sometimes they may even belong to different memory region.
Don't group vectors into single output section. Instead put each vector
into its own section ant put it at its default virtual address.
Reserve 4KBytes from the default vectors base and put rest of the code
and data starting from there. Mark vectors sections as executable,
otherwise their contents is discarded. There may be as little as 16
bytes reserved for some vectors, load handler address into a0 and use
ret.n to jump there to make vector code fit into this 16 byte space.
Max Filippov [Mon, 18 Feb 2019 09:42:15 +0000 (01:42 -0800)]
tests/tcg/xtensa: indicate failed tests
When test suite with multiple tests fails it's not obvious which test
failed. Pring "failed" in every invocation of test_fail. Do printing
when DEBUG preprocessor macro is defined.
Max Filippov [Thu, 14 Feb 2019 01:36:30 +0000 (17:36 -0800)]
target/xtensa: prioritize load/store in FLIX bundles
Load/store opcodes may raise MMU exceptions. Normally exceptions should
be checked in priority order before any actual operations, but since MMU
exceptions are tightly coupled with actual memory access, there's
currently no way to do it.
Approximate this behavior by executing all load, then all store, and
then all other opcodes in the FLIX bundles. Use opcode dependency
mechanism to express ordering. Mark load/store opcodes with
XTENSA_OP_{LOAD,STORE} flags. Newer libisa has classifier functions that
can tell whether opcode is a load or store, but this information is not
available in the existing overlays.
Currently topologic opcode sorting stops at the first detected
dependency loop. Introduce struct opcode_arg_copy that describes
temporary register copy. Scan remaining opcodes searching for
dependencies that can be broken, break them by introducing temporary
register copies and record them in an array. In case of success
create local temporaries and initialize them with current register
values. Share single temporary copy between all register users. Delete
temporaries after translation.
Max Filippov [Thu, 14 Feb 2019 21:27:50 +0000 (13:27 -0800)]
target/xtensa: reorganize access to boolean registers
libisa represents boolean registers b0..b16 as a BR register file and as
BR4 and BR8 register groups. Add these register files and use
OpcodeArg::{in,out} parameters to access boolean registers in
translators.
projects / qemu.git / log