Pawan Gupta [Tue, 19 Nov 2019 07:23:27 +0000 (23:23 -0800)]
target/i386: Export TAA_NO bit to guests
TSX Async Abort (TAA) is a side channel attack on internal buffers in
some Intel processors similar to Microachitectural Data Sampling (MDS).
Some future Intel processors will use the ARCH_CAP_TAA_NO bit in the
IA32_ARCH_CAPABILITIES MSR to report that they are not vulnerable to
TAA. Make this bit available to guests.
Sergio Lopez [Tue, 12 Nov 2019 16:34:23 +0000 (17:34 +0100)]
microvm: fix memory leak in microvm_fix_kernel_cmdline
In microvm_fix_kernel_cmdline(), fw_cfg_modify_string() is duplicating
cmdline instead of taking ownership of it. Free it afterwards to avoid
leaking it.
scripts: Detect git worktrees for get_maintainer.pl --git
Recent git versions support worktrees where .git is not a directory but
a file with a path to the .git repository; however the get_maintainer.pl
script only recognises the .git directory, let's fix it.
Peter Maydell [Fri, 15 Nov 2019 11:22:33 +0000 (11:22 +0000)]
Merge remote-tracking branch 'remotes/palmer/tags/riscv-for-master-4.2-rc2' into staging
RISC-V Fixes for 4.2-rc2
This contains a handful of patches that I'd like to target for 4.2:
* OpenSBI upgrade to 0.5
* Increase in the flash size of the virt board.
* A non-functional cleanup.
* A cleanup to our MIP handling that avoids atomics.
This passes "make check" and boots OpenEmbedded for me.
# gpg: Signature made Thu 14 Nov 2019 18:39:27 GMT
# gpg: using RSA key 00CE76D1834960DFCE886DF8EF4CA1502CCBAB41
# gpg: issuer "[email protected]"
# gpg: Good signature from "Palmer Dabbelt <[email protected]>" [unknown]
# gpg: aka "Palmer Dabbelt <[email protected]>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 00CE 76D1 8349 60DF CE88 6DF8 EF4C A150 2CCB AB41
* remotes/palmer/tags/riscv-for-master-4.2-rc2:
riscv/virt: Increase flash size
opensbi: Upgrade from v0.4 to v0.5
target/riscv: Remove atomic accesses to MIP CSR
remove unnecessary ifdef TARGET_RISCV64
Coreboot developers have requested that they have at least 32MB of flash
to load binaries. We currently have 32MB of flash, but it is split in
two to allow loading two flash binaries. Let's increase the flash size
from 32MB to 64MB to ensure we have a single region that is 32MB.
No QEMU release has include flash in the RISC-V virt machine, so this
isn't a breaking change.
Alistair Francis [Fri, 25 Oct 2019 23:15:45 +0000 (16:15 -0700)]
opensbi: Upgrade from v0.4 to v0.5
This release has:
Lot of critical fixes
Hypervisor extension support
SBI v0.2 base extension support
Debug prints support
Handle traps when doing unpriv load/store
Allow compiling without FP support
Use git describe to generate boot-time banner
Andes AE350 platform support
ShortLog:
Anup Patel (14):
platform: sifive/fu540: Move FDT further up
lib: Allow compiling without FP support
lib: Introduce sbi_dprintf() API
lib: Use sbi_dprintf() for invalid CSRs
lib: Handle traps when doing unpriv load/store in get_insn()
lib: Delegate supervisor ecall to HS-mode when H extension available
lib: Extend sbi_hart_switch_mode() to support hypervisor extension
lib: Extend sbi_trap_redirect() for hypervisor extension
lib: Redirect WFI trapped from VS/VU mode to HS-mode
include: Extend get_insn() to read instruction from VS/VU mode
lib: Emulate HTIMEDELTA CSR for platforms not having TIME CSR
Makefile: Minor fix in OPENSBI_VERSION_GIT
lib: Fix coldboot race condition observed on emulators/simulators
include: Bump-up version to 0.5
Atish Patra (16):
lib: Provide an atomic exchange function unsigned long
lib: Fix race conditions in tlb fifo access.
platform: Remove the ipi_sync method from all platforms.
lib: Fix timer for 32 bit
lib: Support atomic swap instructions
lib: Upgrade to full flush if size is at least threshold
docs: Update the fu540 platform guide as per U-Boot documents.
lib: Change tlb range flush threshold to 4k page instead of 1G
lib: provide a platform specific tlb range flush threshold
lib: Fix tlb flush range limit value
Test: Move test payload related code out of interface header
lib: Align error codes as per SBI specification.
lib: Rename existing SBI implementation as 0.1.
lib: Remove redundant variable assignment
lib: Implement SBI v0.2
lib: Provide a platform hook to implement vendor specific SBI extensions.
Bin Meng (6):
platform: sifive: fu540: Use standard value string for cpu node status
README: Document 32-bit / 64-bit images build
treewide: Use conventional names for 32-bit and 64-bit
platform: sifive: fu540: Expand FDT size before any patching
firmware: Use macro instead of magic number for boot status
docs: platform: Update descriptions for qemu/sifive_u support
Damien Le Moal (4):
kendryte/k210: Use sifive UART driver
kendryte/k210: remove sysctl code
README: Update license information
kendryte/k210: remove unused file
Georg Kotheimer (1):
utils: Use cpu_to_fdt32() when writing to fdt
Jacob Garber (4):
lib: Use bitwise & instead of boolean &&
lib: Use correct type for return value
lib: Prevent unintended sign extensions
lib: Correct null pointer check
Lukas Auer (1):
firmware: do not use relocated _boot_status before it is valid
Nylon Chen (3):
firmware: Fix the loop condition of _wait_relocate_copy_done section
platform: Add Andes AE350 initial support
scripts: Add AE350 to platform list in the binary archive script
Palmer Dabbelt (1):
Include `git describe` in OpenSBI
Zong Li (1):
Write MSIP by using memory-mapped control register
Instead of relying on atomics to access the MIP register let's update
our helper function to instead just lock the IO mutex thread before
writing. This follows the same concept as used in PPC for handling
interrupts
Gerd Hoffmann [Wed, 6 Nov 2019 12:13:48 +0000 (13:13 +0100)]
seabios: update to pre-1.13 snapshot
seabios 1.13 will be released later this month. This patch updates the
seabios submodule and binaries in qemu to a snapshot of git master.
That will increase the test coverage of the upcoming seabios release and
will also make the number of changes smaller when we update to the final
1.13 release during qemu code freeze for 4.2.
v3: add ahci bugfix
v2: build binaries with gcc 4.8.5 instead of gcc 8.3.1 (rhel7).
David Woodhouse (2):
csm: Sanitise alignment constraint in Legacy16GetTableAddress
csm: Fix boot priority translation
Denis Plotnikov (1):
virtio: extend virtio queue size to 256
Gerd Hoffmann (21):
vga: move modelist from bochsvga.c to new svgamodes.c
vga: make memcpy_high() public
vga: add atiext driver
vga: add ati bios tables
vbe: add edid support.
ati: add edid support.
bochsvga: add edid support.
bochsdisplay: add edid support.
bochsdisplay: parse resolution from edid.
add get_keystroke_full() helper
bootmenu: add support for more than 9 entries
optionrom: disallow int19 redirect for pnp roms.
ati-vga: make less verbose
ati-vga: fix ati_read()
ati-vga: make i2c register and bits configurable
ati-vga: try vga ddc first
ati-vga: add rage128 edid support
bochsdisplay: add copyright and license to bochsdisplay.c
ramfb: add copyright and license to ramfb.c
cp437: add license to cp437.c
ahci: zero-initialize port struct
Joseph Pacheco-Corwin (1):
bootsplash: Added support for 16/24/32bpp in one function
Kevin O'Connor (10):
output: Avoid thunking to 16bit mode in printf() if no vgabios
docs: Update mailing list archive links
docs: Fix cut-and-paste error in Mailinglist.md archive link
usb-ehci: Clear pipe token on pipe reallocate
pciinit: Use %pP shorthand for printing device ids in intel_igd_setup()
virtio-pci: Use %pP format in dprintf() calls
Makefile: Build with -Wno-address-of-packed-member
svgamodes: Add copyright notice to vgasrc/svgamodes.c
docs: Add developer-certificate-of-origin
docs: Note release date for v1.12.1
Liran Alon (1):
pvscsi: ring_desc do not have to be page aligned
Sam Eiderman (6):
smbios: Add missing zero byte to Type 0
geometry: Read LCHS from fw_cfg
boot: Reorder functions in boot.c
geometry: Add boot_lchs_find_*() utility functions
config: Add toggle for bootdevice information
geometry: Apply LCHS values for boot devices
Stefan Berger (2):
tcgbios: Use table to convert hash to buffer size
tcgbios: Implement TPM 2.0 menu item to activate and deactivate PCR banks
Stefano Garzarella (1):
qemu: avoid debug prints if debugcon is not enabled
Stephen Douthit (1):
tpm: Check for TPM related ACPI tables before attempting hw probe
Uwe Kleine-König (3):
cbvga: reuse svga modes definitions from svgamodes.c
Add additional resolutions for 16:9 displays: 1600x900 and 2560x1440
Remove dos line endings introduced in the last two commits
Peter Maydell [Tue, 12 Nov 2019 14:51:00 +0000 (14:51 +0000)]
Merge remote-tracking branch 'remotes/stsquad/tags/pull-testing-and-tcg-121119-1' into staging
Testing and plugins for rc1
- add plugin API versioning
- tests/vm add netbsd autoinstall
- disable ipmi-bt-test for non-Linux
- single-thread make check
# gpg: Signature made Tue 12 Nov 2019 14:34:30 GMT
# gpg: using RSA key 6685AE99E75167BCAFC8DF35FBD0DB095A9E2A44
# gpg: Good signature from "Alex Bennée (Master Work Key) <[email protected]>" [full]
# Primary key fingerprint: 6685 AE99 E751 67BC AFC8 DF35 FBD0 DB09 5A9E 2A44
* remotes/stsquad/tags/pull-testing-and-tcg-121119-1:
tcg plugins: expose an API version concept
.travis.yml: don't run make check with multiple jobs
tests/vm: support sites with sha512 checksums
tests: only run ipmi-bt-test if CONFIG_LINUX
tests/vm: update netbsd to version 8.1
tests/vm: use console_consume for netbsd
tests/vm: add console_consume helper
tests/vm: netbsd autoinstall, using serial console
Alex Bennée [Mon, 4 Nov 2019 13:18:36 +0000 (13:18 +0000)]
tcg plugins: expose an API version concept
This is a very simple versioning API which allows the plugin
infrastructure to check the API a plugin was built against. We also
expose a min/cur API version to the plugin via the info block in case
it wants to avoid using old deprecated APIs in the future.
Alex Bennée [Thu, 7 Nov 2019 10:47:03 +0000 (10:47 +0000)]
.travis.yml: don't run make check with multiple jobs
Let's challenge the convention that doing more at a time helps. It
certainly doesn't tell you unambiguously where in the test cycle you
were before the test hangs and exceeds the job time limit.
Alex Bennée [Fri, 1 Nov 2019 13:36:22 +0000 (13:36 +0000)]
tests: only run ipmi-bt-test if CONFIG_LINUX
This test has been unstable on NetBSD for awhile. It seems the
mechanism used to listen to a random port is a Linux-ism (although a
received wisdom Linux-ism rather than a well documented one). As
working around would add more hard to test complexity to the test I've
gone for the easier option of making it CONFIG_LINUX only.
Gerd Hoffmann [Thu, 31 Oct 2019 08:53:03 +0000 (09:53 +0100)]
tests/vm: netbsd autoinstall, using serial console
Instead of fetching the prebuilt image from patchew download the install
iso and prepare the image locally. Install to disk, using the serial
console. Create qemu user, configure ssh login. Install packages
needed for qemu builds.
* remotes/vivier2/tags/trivial-branch-pull-request:
ivshmem-server: Terminate also on SIGINT
ivshmem-server: Clean up shmem on shutdown
numa: Add missing \n to error message
qom: Fix error message in object_class_property_add()
Makefile: install bios-microvm like other binary blobs
* remotes/huth-gitlab/tags/pull-request-2019-11-12:
configure: Check bzip2 is available
configure: Only decompress EDK2 blobs for X86/ARM targets
tests/migration: Print some debug on bad status
MAINTAINERS: slirp: Remove myself as maintainer
cpu-plug-test: fix leaks
qtest: fix qtest_qmp_device_add leak
Jan Kiszka [Mon, 5 Aug 2019 05:54:52 +0000 (07:54 +0200)]
ivshmem-server: Clean up shmem on shutdown
So far, the server leaves the posix shared memory object behind when
terminating, requiring the user to explicitly remove it in order to
start a new instance.
Greg Kurz [Wed, 6 Nov 2019 12:46:40 +0000 (13:46 +0100)]
numa: Add missing \n to error message
If memory allocation fails when using -mem-path, QEMU is supposed to print
out a message to indicate that fallback to anonymous RAM is deprecated. This
is done with error_printf() which does output buffering. As a consequence,
the message is only printed at the next flush, eg. when quiting QEMU, and
it also lacks a trailing newline:
qemu-system-ppc64: unable to map backing store for guest RAM: Cannot allocate memory
qemu-system-ppc64: warning: falling back to regular RAM allocation
QEMU 4.1.50 monitor - type 'help' for more information
(qemu) q
This is deprecated. Make sure that -mem-path specified path has sufficient resources to allocate -m specified RAM amountgreg@boss02:~/Work/qemu/qemu-spapr$
Greg Kurz [Mon, 4 Nov 2019 13:23:55 +0000 (14:23 +0100)]
qom: Fix error message in object_class_property_add()
The error message in object_class_property_add() was copied from
object_property_add() in commit 16bf7f522a2ff. Clarify that it is
about a class, not an object.
While here, have the format string in both functions to fit in a
single line for better grep-ability, despite the checkpatch warning.
Bruce Rogers [Sat, 2 Nov 2019 11:43:46 +0000 (12:43 +0100)]
Makefile: install bios-microvm like other binary blobs
Commit 0d5fae3e52e introduced bios-microvm.bin but forgot to add
it to the list of blobs being installed.
Add it to the list of BLOBS that get installed.
Peter Maydell [Fri, 25 Oct 2019 15:58:48 +0000 (16:58 +0100)]
tcg/LICENSE: Remove out of date claim about TCG subdirectory licensing
Since 2008 the tcg/LICENSE file has not changed: it claims that
everything under tcg/ is BSD-licensed.
This is not true and hasn't been true for years: in 2013 we
accepted the tcg/aarch64 target code under a GPLv2-or-later
license statement. We also have generic vector optimisation
code under the LGPL2.1-or-later, and the TCI backend is
GPLv2-or-later. Further, many of the files are not BSD
licensed but MIT licensed.
We don't really consider the tcg subdirectory to be a distinct part
of QEMU anyway.
Remove the LICENSE file, since claiming false information
about the license of the code is confusing.
Update the main project LICENSE file also to be clearer about
the licenses used by TCG.
Peter Maydell [Fri, 25 Oct 2019 15:58:47 +0000 (16:58 +0100)]
tcg/ppc/tcg-target.opc.h: Add copyright/license
Add the copyright/license boilerplate for tcg/i386/tcg-target.opc.h.
This file has had only two commits, 4b06c216826b7e4 and d9897efa1fd3174ec, both by a Linaro engineer.
The license is MIT, since that's what the rest of tcg/ppc/ is.
Peter Maydell [Fri, 25 Oct 2019 15:58:46 +0000 (16:58 +0100)]
tcg/i386/tcg-target.opc.h: Add copyright/license
Add the copyright/license boilerplate for tcg/i386/tcg-target.opc.h.
This file has had only one commit, 770c2fc7bb70804a, by
a Linaro engineer.
The license is MIT, since that's what the rest of tcg/i386/ is.
Add the copyright/license boilerplate for target/aarch64/tcg-target.opc.h.
This file has only had two commits: 14e4c1e2355473ccb29
and 79525dfd08262d8, both by the same Linaro engineer.
The license is GPL-2-or-later, since that's what the
rest of tcg/aarch64 uses.
Peter Maydell [Mon, 11 Nov 2019 13:58:47 +0000 (13:58 +0000)]
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20191111' into staging
target-arm queue:
* Remove old unassigned_access CPU hook API
* Remove old ptimer_init_with_bh() API
* hw/arm/boot: Set NSACR.{CP11, CP10} in dummy SMC setup routine
* remotes/pmaydell/tags/pull-target-arm-20191111:
hw/arm/boot: Set NSACR.{CP11, CP10} in dummy SMC setup routine
Remove unassigned_access CPU hook
ptimer: Remove old ptimer_init_with_bh() API
hw/arm/boot: Set NSACR.{CP11, CP10} in dummy SMC setup routine
The boot.c code usually puts the CPU into NS mode directly when it is
booting a kernel. Since fc1120a7f5f2d4b6 this has included a
requirement to set NSACR to give NS state access to the FPU; we fixed
that for the usual code path in ece628fcf6. However, it is also
possible for a board model to request an alternative mode of booting,
where its 'board_setup' code hook runs in Secure state and is
responsible for doing the S->NS transition after it has done whatever
work it must do in Secure state. In this situation the board_setup
code now also needs to update NSACR.
This affects all boards which set info->secure_board_setup, which is
currently the 'raspi' and 'highbank' families. They both use the
common arm_write_secure_board_setup_dummy_smc().
Set the NSACR CP11 and CP10 bits in the code written by that
function, to allow FPU access in Non-Secure state when using dummy
SMC setup routine. Otherwise an AArch32 kernel booted on the
highbank or raspi boards will UNDEF as soon as it tries to use the
FPU.
Update the comment describing secure_board_setup to note the new
requirements on users of it.
This fixes a kernel panic when booting raspbian on raspi2.
Peter Maydell [Mon, 11 Nov 2019 13:44:16 +0000 (13:44 +0000)]
Remove unassigned_access CPU hook
All targets have now migrated away from the old unassigned_access
hook to the new do_transaction_failed hook. This means we can remove
the core-code infrastructure for that hook and the code that calls it.
Peter Maydell [Mon, 11 Nov 2019 13:44:16 +0000 (13:44 +0000)]
ptimer: Remove old ptimer_init_with_bh() API
Now all the users of ptimers have converted to the transaction-based
API, we can remove ptimer_init_with_bh() and all the code paths
that are used only by bottom-half based ptimers, and tidy up the
documentation comments to consider the transaction-based API the
only possibility.
The code changes result from:
* s->bh no longer exists
* s->callback is now always non-NULL
configure: Only decompress EDK2 blobs for X86/ARM targets
The EDK2 firmware blobs only target the X86/ARM architectures.
Define the DECOMPRESS_EDK2_BLOBS variable and only decompress
the blobs when the variable exists.
We're seeing occasional asserts in 'wait_for_migraiton_fail', that
I can't reliably reproduce, and where the cores don't have any useful
state. Print the 'status' out, so we can see which unexpected state
we're ending up in.
Laurent Vivier [Wed, 6 Nov 2019 11:23:41 +0000 (12:23 +0100)]
dp8393x: fix dp8393x_receive()
RXpkt.in_use is always 16 bit wide, but when the bus access mode is 32bit
and the endianness is big, we must access the second word and not the
first. This patch adjusts the offset according to the size and endianness.
Peter Maydell [Thu, 7 Nov 2019 14:45:36 +0000 (14:45 +0000)]
Merge remote-tracking branch 'remotes/marcel/tags/rdma-pull-request' into staging
RDMA queue
* better memory registration performance
# gpg: Signature made Wed 06 Nov 2019 14:37:47 GMT
# gpg: using RSA key 36D4C0F0CF2FE46D
# gpg: Good signature from "Marcel Apfelbaum <[email protected]>" [marginal]
# gpg: aka "Marcel Apfelbaum <[email protected]>" [marginal]
# gpg: aka "Marcel Apfelbaum <[email protected]>" [marginal]
# gpg: WARNING: This key is not certified with sufficiently trusted signatures!
# gpg: It is not certain that the signature belongs to the owner.
# Primary key fingerprint: B1C6 3A57 F92E 08F2 640F 31F5 36D4 C0F0 CF2F E46D
* remotes/marcel/tags/rdma-pull-request:
hw/rdma: Utilize ibv_reg_mr_iova for memory registration
configure: Check if we can use ibv_reg_mr_iova
Tuguoyi [Fri, 1 Nov 2019 07:37:35 +0000 (07:37 +0000)]
qcow2-bitmap: Fix uint64_t left-shift overflow
There are two issues in In check_constraints_on_bitmap(),
1) The sanity check on the granularity will cause uint64_t
integer left-shift overflow when cluster_size is 2M and the
granularity is BIGGER than 32K.
2) The way to calculate image size that the maximum bitmap
supported can map to is a bit incorrect.
This patch fix it by add a helper function to calculate the
number of bytes needed by a normal bitmap in image and compare
it to the maximum bitmap bytes supported by qemu.
Peter Maydell [Thu, 7 Nov 2019 11:56:18 +0000 (11:56 +0000)]
Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into staging
virtio, pci: fixes
A couple of bugfixes.
Signed-off-by: Michael S. Tsirkin <[email protected]>
# gpg: Signature made Wed 06 Nov 2019 12:00:19 GMT
# gpg: using RSA key 281F0DB8D28D5469
# gpg: Good signature from "Michael S. Tsirkin <[email protected]>" [full]
# gpg: aka "Michael S. Tsirkin <[email protected]>" [full]
# Primary key fingerprint: 0270 606B 6F3C DF3D 0B17 0970 C350 3912 AFBE 8E67
# Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA 8A0D 281F 0DB8 D28D 5469
* remotes/mst/tags/for_upstream:
virtio: notify virtqueue via host notifier when available
hw/i386: AMD-Vi IVRS DMA alias support
pci: Use PCI aliases when determining device IOMMU address space
* remotes/vivier2/tags/linux-user-for-4.2-pull-request:
linux-user/alpha: Set r20 secondary return value
linux-user/sparc: Fix cpu_clone_regs_*
linux-user: Introduce cpu_clone_regs_parent
linux-user: Rename cpu_clone_regs to cpu_clone_regs_child
linux-user/sparc64: Fix target_signal_frame
linux-user/sparc: Fix WREG usage in setup_frame
linux-user/sparc: Use WREG_SP constant in sparc/signal.c
linux-user/sparc: Begin using WREG constants in sparc/signal.c
linux-user/sparc: Use WREG constants in sparc/target_cpu.h
target/sparc: Define an enumeration for accessing env->regwptr
tests/tcg/multiarch/linux-test: Fix error check for shmat
scripts/qemu-binfmt-conf: Update for sparc64
linux-user: Support for NETLINK socket options
Peter Maydell [Wed, 6 Nov 2019 17:52:14 +0000 (17:52 +0000)]
Merge remote-tracking branch 'remotes/philmd-gitlab/tags/mips-next-20191105' into staging
The i440FX northbridge is only used by the PC machine, while the
PIIX southbridge is also used by the Malta MIPS machine.
Split the PIIX3 southbridge from i440FX northbridge.
# gpg: Signature made Tue 05 Nov 2019 22:48:12 GMT
# gpg: using RSA key 89C1E78F601EE86C867495CBA2A3FD6EDEADC0DE
# gpg: Good signature from "Philippe Mathieu-Daudé (Phil) <[email protected]>" [marginal]
# gpg: WARNING: This key is not certified with sufficiently trusted signatures!
# gpg: It is not certain that the signature belongs to the owner.
# Primary key fingerprint: 89C1 E78F 601E E86C 8674 95CB A2A3 FD6E DEAD C0DE
* remotes/philmd-gitlab/tags/mips-next-20191105: (21 commits)
hw/pci-host/i440fx: Remove the last PIIX3 traces
hw/pci-host: Rename incorrectly named 'piix' as 'i440fx'
hw/pci-host/piix: Extract PIIX3 functions to hw/isa/piix3.c
hw/pci-host/piix: Fix code style issues
hw/pci-host/piix: Move i440FX declarations to hw/pci-host/i440fx.h
hw/pci-host/piix: Define and use the PIIX IRQ Route Control Registers
hw/pci-host/piix: Move RCR_IOPORT register definition
hw/pci-host/piix: Extract piix3_create()
hw/i386: Remove obsolete LoadStateHandler::load_state_old handlers
hw/isa/piix4: Move piix4_create() to hw/isa/piix4.c
hw/mips/mips_malta: Extract the PIIX4 creation code as piix4_create()
hw/mips/mips_malta: Create IDE hard drive array dynamically
piix4: Add a MC146818 RTC Controller as specified in datasheet
piix4: Add an i8254 PIT Controller as specified in datasheet
piix4: Add an i8257 DMA Controller as specified in datasheet
piix4: Rename PIIX4 object to piix4-isa
Revert "irq: introduce qemu_irq_proxy()"
piix4: Add an i8259 Interrupt Controller as specified in datasheet
piix4: Add the Reset Control Register
MAINTAINERS: Keep PIIX4 South Bridge separate from PC Chipsets
...
Peter Maydell [Wed, 6 Nov 2019 13:36:42 +0000 (13:36 +0000)]
Merge remote-tracking branch 'remotes/stefanha/tags/block-pull-request' into staging
Pull request
Let's get the image fuzzer Python 3 changes merged in QEMU 4.2.
# gpg: Signature made Tue 05 Nov 2019 15:43:16 GMT
# gpg: using RSA key 8695A8BFD3F97CDAAC35775A9CA4ABB381AB73C8
# gpg: Good signature from "Stefan Hajnoczi <[email protected]>" [full]
# gpg: aka "Stefan Hajnoczi <[email protected]>" [full]
# Primary key fingerprint: 8695 A8BF D3F9 7CDA AC35 775A 9CA4 ABB3 81AB 73C8
* remotes/stefanha/tags/block-pull-request:
image-fuzzer: Use OSerror.strerror instead of tuple subscript
image-fuzzer: Use errors parameter of subprocess.Popen()
image-fuzzer: Run using python3
image-fuzzer: Encode file name and file format to bytes
image-fuzzer: Use bytes constant for field values
image-fuzzer: Return bytes objects on string fuzzing functions
image-fuzzer: Use %r for all fiels at Field.__repr__()
image-fuzzer: Use io.StringIO
image-fuzzer: Explicitly use integer division operator
image-fuzzer: Write bytes instead of string to image file
image-fuzzer: Open image files in binary mode
We failed to set the secondary return value in %o1
we failed to advance the PC past the syscall,
we failed to adjust regwptr into the new structure,
we stored the stack pointer into the wrong register.
We will need a target-specific hook for adjusting registers
in the parent during clone. Add an empty inline function for
each target, and invoke it from the proper places.
linux-user: Rename cpu_clone_regs to cpu_clone_regs_child
We will need a target-specific hook for adjusting registers
in the parent during clone. To avoid confusion, rename the
one we have to make it clear it affects the child.
At the same time, pass in the flags from the clone syscall.
We will need them for correct behaviour for Sparc.
linux-user/sparc: Use WREG_SP constant in sparc/signal.c
s/UREG_FP/WREG_SP/g
This is non-obvious because the UREG_FP constant is fact wrong.
However, the previous search-and-replace patch made it clear that
UREG_FP expands to WREG_O6, and we can see from the enumeration in
target/sparc/cpu.h that WREG_O6 is in fact WREG_SP, the stack pointer.
linux-user/sparc: Use WREG constants in sparc/target_cpu.h
This fixes a naming bug wherein we used "UREG_FP" to access the
stack pointer. OTOH, the "UREG_FP" constant was also defined
incorrectly such that it *did* reference the stack pointer.
Note that the kernel legitimately uses the name "FP", because it
utilizes the rolled stack window in processing the system call.
Gerd Hoffmann [Tue, 15 Oct 2019 06:44:26 +0000 (08:44 +0200)]
usb-host: add option to allow all resets.
Commit 65f14ab98da1 ("usb-host: skip reset for untouched devices")
filters out multiple usb device resets in a row. While this improves
the situation for usb some devices it doesn't work for others :-(
So go add a config option to make the behavior configurable.
Peter Maydell [Wed, 6 Nov 2019 11:56:40 +0000 (11:56 +0000)]
Merge remote-tracking branch 'remotes/mdroth/tags/qga-pull-2019-11-04-tag' into staging
qemu-ga patch queue for hard-freeze
* fix handling of Chinese network device names in
guest-network-get-interfaces
* add missing blacklist entries for guest-get-memory-block-info for
w32/non-linux builds
* remotes/mdroth/tags/qga-pull-2019-11-04-tag:
qga: Add "guest-get-memory-block-info" to blacklist
qga-win: network-get-interfaces command name field bug fix
Stefan Hajnoczi [Tue, 5 Nov 2019 14:09:46 +0000 (15:09 +0100)]
virtio: notify virtqueue via host notifier when available
Host notifiers are used in several cases:
1. Traditional ioeventfd where virtqueue notifications are handled in
the main loop thread.
2. IOThreads (aio_handle_output) where virtqueue notifications are
handled in an IOThread AioContext.
3. vhost where virtqueue notifications are handled by kernel vhost or
a vhost-user device backend.
Most virtqueue notifications from the guest use the ioeventfd mechanism,
but there are corner cases where QEMU code calls virtio_queue_notify().
This currently honors the host notifier for the IOThreads
aio_handle_output case, but not for the vhost case. The result is that
vhost does not receive virtqueue notifications from QEMU when
virtio_queue_notify() is called.
This patch extends virtio_queue_notify() to set the host notifier
whenever it is enabled instead of calling the vq->(aio_)handle_output()
function directly. We track the host notifier state for each virtqueue
separately since some devices may use it only for certain virtqueues.
This fixes the vhost case although it does add a trip through the
eventfd for the traditional ioeventfd case. I don't think it's worth
adding a fast path for the traditional ioeventfd case because calling
virtio_queue_notify() is rare when ioeventfd is enabled.
Yuval Shaia [Sun, 18 Aug 2019 13:21:07 +0000 (16:21 +0300)]
hw/rdma: Utilize ibv_reg_mr_iova for memory registration
The virtual address that is provided by the guest in post_send and
post_recv operations is related to the guest address space. This address
space is unknown to the HCA resides on host so extra step in these
operations is needed to adjust the address to host virtual address.
This step, which is done in data-path affects performances.
An enhanced verion of MR registration introduced here
https://patchwork.kernel.org/patch/11044467/ can be used so that the
guest virtual address space for this MR is known to the HCA in host.
The PIIX3 is not tied to the i440FX and can even be used without it.
Move its creation to the machine code (pc_piix.c).
We have now removed the last trace of southbridge code in the i440FX
northbridge.
hw/pci-host: Rename incorrectly named 'piix' as 'i440fx'
We moved all the PIIX3 southbridge code out of hw/pci-host/piix.c,
it now only contains i440FX northbridge code.
Rename it to match the chipset modelled.
hw/pci-host/piix: Define and use the PIIX IRQ Route Control Registers
The IRQ Route Control registers definitions belong to the PIIX
chipset. We were only defining the 'A' register. Define the other
B, C and D registers, and use them.
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