Warner Losh [Fri, 23 Apr 2021 15:05:57 +0000 (09:05 -0600)]
bsd-user: whitespace changes
Fix various whitespace-only issues from checkpatch:
keyword space (
no space before ( on function calls
spaces around operators
suspect indentations (including one functions reindented)
extra spaces around unary operators
Warner Losh [Fri, 23 Apr 2021 16:41:11 +0000 (10:41 -0600)]
bsd-user: style tweak: move extern to header file
extern char **environ has no standard home, so move the declaration from the .c
file to a handy .h file. Since this is a standard, old-school UNIX interface
dating from the 5th edition, it's not quite the same issue that the rule is
supposed to protect against, though.
Peter Maydell [Tue, 11 May 2021 12:03:44 +0000 (13:03 +0100)]
Merge remote-tracking branch 'remotes/dgilbert-gitlab/tags/pull-virtiofs-20210506' into staging
virtiofsd pull 2021-05-06
A pile of cleanups:
Use of glib allocators from Mahmoud
Virtio spec compliance and printf cleanup from me.
Sugar to turn on xattr when defining xattr mapping from Carlos
an assert cleanup from Greg
Signed-off-by: Dr. David Alan Gilbert <[email protected]>
# gpg: Signature made Thu 06 May 2021 19:54:18 BST
# gpg: using RSA key 45F5C71B4A0CB7FB977A9FA90516331EBC5BFDE7
# gpg: Good signature from "Dr. David Alan Gilbert (RH2) <[email protected]>" [full]
# Primary key fingerprint: 45F5 C71B 4A0C B7FB 977A 9FA9 0516 331E BC5B FDE7
* remotes/dgilbert-gitlab/tags/pull-virtiofs-20210506:
virtiofsd/fuse_virtio.c: Changed allocations of locals to GLib
virtiofsd/passthrough_ll.c: Changed local allocations to GLib functions
virtiofsd: Changed allocations of fv_VuDev & its internals to GLib functions
virtiofsd: Changed allocation of lo_map_elems to GLib's functions
virtiofsd: Changed allocations of fuse_session to GLib's functions
virtiofsd: Changed allocations of iovec to GLib's functions
virtiofsd: Changed allocations of fuse_req to GLib functions
virtiofsd: Don't assume header layout
virtiofs: Fixup printf args
virtiofsd: Add help for -o xattr-mapping
virtiofsd: Allow use "-o xattrmap" without "-o xattr"
virtiofsd: Fix side-effect in assert()
Peter Maydell [Mon, 10 May 2021 16:28:11 +0000 (17:28 +0100)]
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20210510-1' into staging
target-arm queue:
* docs: fix link in sbsa description
* linux-user/aarch64: Enable hwcap for RND, BTI, and MTE
* target/arm: Fix tlbbits calculation in tlbi_aa64_vae2is_write()
* target/arm: Split neon and vfp translation to their own
compilation units
* target/arm: Make WFI a NOP for userspace emulators
* hw/sd/omap_mmc: Use device_cold_reset() instead of
device_legacy_reset()
* include: More fixes for 'extern "C"' block use
* hw/arm/imx25_pdk: Fix error message for invalid RAM size
* hw/arm/mps2-tz: Implement AN524 memory remapping via machine property
* hw/arm/xlnx: Fix PHY address for xilinx-zynq-a9
* remotes/pmaydell/tags/pull-target-arm-20210510-1: (26 commits)
hw/arm/xlnx: Fix PHY address for xilinx-zynq-a9
hw/arm/mps2-tz: Implement AN524 memory remapping via machine property
hw/misc/mps2-scc: Support using CFG0 bit 0 for remapping
hw/misc/mps2-scc: Add "QEMU interface" comment
hw/arm/imx25_pdk: Fix error message for invalid RAM size
include/disas/dis-asm.h: Handle being included outside 'extern "C"'
include/qemu/bswap.h: Handle being included outside extern "C" block
osdep: Make os-win32.h and os-posix.h handle 'extern "C"' themselves
hw/sd/omap_mmc: Use device_cold_reset() instead of device_legacy_reset()
target/arm: Make WFI a NOP for userspace emulators
target/arm: Make translate-neon.c.inc its own compilation unit
target/arm: Make functions used by translate-neon global
target/arm: Move NeonGenThreeOpEnvFn typedef to translate.h
target/arm: Delete unused typedef
target/arm: Move vfp_reg_ptr() to translate-neon.c.inc
target/arm: Make translate-vfp.c.inc its own compilation unit
target/arm: Make functions used by translate-vfp global
target/arm: Move vfp_{load, store}_reg{32, 64} to translate-vfp.c.inc
target/arm: Move gen_aa32 functions to translate-a32.h
target/arm: Split m-nocp trans functions into their own file
...
Guenter Roeck [Tue, 4 May 2021 12:41:40 +0000 (05:41 -0700)]
hw/arm/xlnx: Fix PHY address for xilinx-zynq-a9
Commit dfc388797cc4 ("hw/arm: xlnx: Set all boards' GEM 'phy-addr'
property value to 23") configured the PHY address for xilinx-zynq-a9
to 23. When trying to boot xilinx-zynq-a9 with zynq-zc702.dtb or
zynq-zc706.dtb, this results in the following error message when
trying to use the Ethernet interface.
macb e000b000.ethernet eth0: Could not attach PHY (-19)
The devicetree files for ZC702 and ZC706 configure PHY address 7. The
documentation for the ZC702 and ZC706 evaluation boards suggest that the
PHY address is 7, not 23. Other boards use PHY address 0, 1, 3, or 7.
I was unable to find a documentation or a devicetree file suggesting
or using PHY address 23. The Ethernet interface starts working with
zynq-zc702.dtb and zynq-zc706.dtb when setting the PHY address to 7,
so let's use it.
Peter Maydell [Tue, 4 May 2021 12:09:12 +0000 (13:09 +0100)]
hw/arm/mps2-tz: Implement AN524 memory remapping via machine property
The AN524 FPGA image supports two memory maps, which differ in where
the QSPI and BRAM are. In the default map, the BRAM is at
0x0000_0000, and the QSPI at 0x2800_0000. In the second map, they
are the other way around.
In hardware, the initial mapping can be selected by the user by
writing either "REMAP: BRAM" (the default) or "REMAP: QSPI" in the
board configuration file. The board config file is acted on by the
"Motherboard Configuration Controller", which is an entirely separate
microcontroller on the dev board but outside the FPGA.
The guest can also dynamically change the mapping via the SCC
CFG_REG0 register.
Implement this functionality for QEMU, using a machine property
"remap" with valid values "BRAM" and "QSPI" to allow the user to set
the initial mapping, in the same way they can on the FPGA, and
wiring up the bit from the SCC register to also switch the mapping.
Peter Maydell [Tue, 4 May 2021 12:09:11 +0000 (13:09 +0100)]
hw/misc/mps2-scc: Support using CFG0 bit 0 for remapping
On some boards, SCC config register CFG0 bit 0 controls whether
parts of the board memory map are remapped. Support this with:
* a device property scc-cfg0 so the board can specify the
initial value of the CFG0 register
* an outbound GPIO line which tracks bit 0 and which the board
can wire up to provide the remapping
hw/arm/imx25_pdk: Fix error message for invalid RAM size
The i.MX25 PDK board has 2 banks for SDRAM, each can
address up to 256 MiB. So the total RAM usable for this
board is 512M. When we ask for more we get a misleading
error message:
$ qemu-system-arm -M imx25-pdk -m 513M
qemu-system-arm: Invalid RAM size, should be 128 MiB
Update the error message to better match the reality:
$ qemu-system-arm -M imx25-pdk -m 513M
qemu-system-arm: RAM size more than 512 MiB is not supported
Peter Maydell [Fri, 16 Apr 2021 13:55:43 +0000 (14:55 +0100)]
include/disas/dis-asm.h: Handle being included outside 'extern "C"'
Make dis-asm.h handle being included outside an 'extern "C"' block;
this allows us to remove the 'extern "C"' blocks that our two C++
files that include it are using.
Peter Maydell [Fri, 16 Apr 2021 13:55:42 +0000 (14:55 +0100)]
include/qemu/bswap.h: Handle being included outside extern "C" block
Make bswap.h handle being included outside an 'extern "C"' block:
all system headers are included first, then all declarations are
put inside an 'extern "C"' block.
This requires a little rearrangement as currently we have an ifdef
ladder that has some system includes and some local declarations
or definitions, and we need to separate those out.
We want to do this because dis-asm.h includes bswap.h, dis-asm.h
may need to be included from C++ files, and system headers should
not be included within 'extern "C"' blocks.
Peter Maydell [Fri, 16 Apr 2021 13:55:41 +0000 (14:55 +0100)]
osdep: Make os-win32.h and os-posix.h handle 'extern "C"' themselves
Both os-win32.h and os-posix.h include system header files. Instead
of having osdep.h include them inside its 'extern "C"' block, make
these headers handle that themselves, so that we don't include the
system headers inside 'extern "C"'.
This doesn't fix any current problems, but it's conceptually the
right way to handle system headers.
Peter Maydell [Fri, 30 Apr 2021 22:23:48 +0000 (23:23 +0100)]
hw/sd/omap_mmc: Use device_cold_reset() instead of device_legacy_reset()
The omap_mmc_reset() function resets its SD card via
device_legacy_reset(). We know that the SD card does not have a qbus
of its own, so the new device_cold_reset() function (which resets
both the device and its child buses) is equivalent here to
device_legacy_reset() and we can just switch to the new API.
Peter Maydell [Fri, 30 Apr 2021 16:22:12 +0000 (17:22 +0100)]
target/arm: Make WFI a NOP for userspace emulators
The WFI insn is not system-mode only, though it doesn't usually make
a huge amount of sense for userspace code to execute it. Currently
if you try it in qemu-arm then the helper function will raise an
EXCP_HLT exception, which is not covered by the switch in cpu_loop()
and results in an abort:
Make the WFI helper function return immediately in the usermode
emulator. This turns WFI into a NOP, which is OK because:
* architecturally "WFI is a NOP" is a permitted implementation
* aarch64 Linux kernels use the SCTLR_EL1.nTWI bit to trap
userspace WFI and NOP it (though aarch32 kernels currently
just let WFI do whatever it would do)
We could in theory make the translate.c code special case user-mode
emulation and NOP the insn entirely rather than making the helper
do nothing, but because no real world code will be trying to
execute WFI we don't care about efficiency and the helper provides
a single place where we can make the change rather than having
to touch multiple places in translate.c and translate-a64.c.
Peter Maydell [Fri, 30 Apr 2021 13:27:33 +0000 (14:27 +0100)]
target/arm: Move vfp_{load, store}_reg{32, 64} to translate-vfp.c.inc
The functions vfp_load_reg32(), vfp_load_reg64(), vfp_store_reg32()
and vfp_store_reg64() are used only in translate-vfp.c.inc. Move
them to that file.
Peter Maydell [Fri, 30 Apr 2021 13:27:30 +0000 (14:27 +0100)]
target/arm: Make functions used by m-nocp global
We want to split out the .c.inc files which are currently included
into translate.c so they are separate compilation units. To do this
we need to make some functions which are currently file-local to
translate.c have global scope; create a translate-a32.h paralleling
the existing translate-a64.h as a place for these declarations to
live, so that code moved into the new compilation units can call
them.
The functions made global here are those required by the
m-nocp.decode functions, except that I have converted the whole
family of {read,write}_neon_element* and also both the load_cpu and
store_cpu functions for consistency, even though m-nocp only wants a
few functions from each.
Peter Maydell [Fri, 30 Apr 2021 13:27:29 +0000 (14:27 +0100)]
target/arm: Share unallocated_encoding() and gen_exception_insn()
The unallocated_encoding() function is the same in both
translate-a64.c and translate.c; make the translate.c function global
and drop the translate-a64.c version. To do this we need to also
share gen_exception_insn(), which currently exists in two slightly
different versions for A32 and A64: merge those into a single
function that can work for both.
This will be useful for splitting up translate.c, which will require
unallocated_encoding() to no longer be file-local. It's also
hopefully less confusing to have only one version of the function
rather than two.
Peter Maydell [Fri, 30 Apr 2021 13:27:28 +0000 (14:27 +0100)]
target/arm: Move constant expanders to translate.h
Some of the constant expanders defined in translate.c are generically
useful and will be used by the separate C files for VFP and Neon once
they are created; move the expander definitions to translate.h.
Peter Maydell [Mon, 10 May 2021 11:34:05 +0000 (12:34 +0100)]
Merge remote-tracking branch 'remotes/mcayland/tags/qemu-sparc-20210505' into staging
qemu-sparc queue
# gpg: Signature made Wed 05 May 2021 08:29:13 BST
# gpg: using RSA key CC621AB98E82200D915CC9C45BC2C56FAE0F321F
# gpg: issuer "[email protected]"
# gpg: Good signature from "Mark Cave-Ayland <[email protected]>" [full]
# Primary key fingerprint: CC62 1AB9 8E82 200D 915C C9C4 5BC2 C56F AE0F 321F
* remotes/mcayland/tags/qemu-sparc-20210505:
hw/sparc*: Move cpu_check_irqs() to target/sparc/
hw/sparc64: Fix code style for checkpatch.pl
hw/sparc64: Remove unused "hw/char/serial.h" header
hw/sparc: Allow building without the leon3 machine
hw/sparc/sun4m: Move each sun4m_hwdef definition in its class_init
hw/sparc/sun4m: Fix code style for checkpatch.pl
hw/sparc/sun4m: Register machine types in sun4m_machine_types[]
hw/sparc/sun4m: Factor out sun4m_machine_class_init()
hw/sparc/sun4m: Introduce Sun4mMachineClass
hw/sparc/sun4m: Have sun4m machines inherit new TYPE_SUN4M_MACHINE
virtiofsd/passthrough_ll.c: Changed local allocations to GLib functions
Changed the allocations of some local variables to GLib's allocation
functions, such as g_try_malloc0(), and annotated those variables
as g_autofree. Subsequently, I was able to remove the calls to free().
virtiofsd: Changed allocations of fv_VuDev & its internals to GLib functions
Changed the allocations of fv_VuDev structs, VuDev structs, and
fv_QueueInfo strcuts from using calloc()/realloc() & free() to using
the equivalent functions from GLib.
In instances, removed the pair of allocation and assertion for
non-NULL checking with a GLib function that aborts on error.
Removed NULL-checking for fv_VuDev struct allocation and used
a GLib function that crashes on error; namely, g_new0(). This
is because allocating one struct should not be a problem on an
healthy system. Also following the pattern of aborting-on-null
behaviour that is taken with allocating VuDev structs and
fv_QueueInfo structs.
virtiofsd: Changed allocations of iovec to GLib's functions
Replaced the calls to malloc()/calloc() and their respective
calls to free() of iovec structs with GLib's allocation and
deallocation functions and used g_autofree when appropriate.
Replaced the allocation of in_sg_cpy to g_new() instead of a call
to calloc() and a null-checking assertion. Not g_new0()
because the buffer is immediately overwritten using memcpy.
virtiofsd incorrectly assumed a fixed set of header layout in the virt
queue; assuming that the fuse and write headers were conveniently
separated from the data; the spec doesn't allow us to take that
convenience, so fix it up to deal with it the hard way.
2796 /* fchdir should not fail here */
=>2797 FCHDIR_NOFAIL(lo->proc_self_fd);
2798 ret = getxattr(procname, name, value, size);
2799 FCHDIR_NOFAIL(lo->root.fd);
* remotes/bonzini-gitlab/tags/for-upstream:
glib-compat: accept G_TEST_SLOW environment variable
gitlab-ci: use --meson=internal for CFI jobs
configure: handle meson options that have changed type
configure: reindent meson invocation
slirp: add configure option to disable smbd
ratelimit: protect with a mutex
Add NVMM Accelerator: add maintainers for NetBSD/NVMM
Add NVMM accelerator: acceleration enlightenments
Add NVMM accelerator: x86 CPU support
Add NVMM accelerator: configure and build logic
oslib-win32: do not rely on macro to get redefined function name
Peter Maydell [Wed, 5 May 2021 19:29:14 +0000 (20:29 +0100)]
Merge remote-tracking branch 'remotes/dg-gitlab/tags/ppc-for-6.1-20210504' into staging
ppc patch queue 2021-05-04
Here's the first ppc pull request for qemu-6.1. It has a wide variety
of stuff accumulated during the 6.0 freeze. Highlights are:
* Multi-phase reset cleanups for PAPR
* Preliminary cleanups towards allowing !CONFIG_TCG for the ppc target
* Cleanup of AIL logic and extension to POWER10
* Further improvements to handling of hot unplug failures on PAPR
* Allow much larger numbers of CPU on pseries
* Support for the H_SCM_HEALTH hypercall
* Add support for the Pegasos II board
* Substantial cleanup to hflag handling
* Assorted minor fixes and cleanups
* remotes/dg-gitlab/tags/ppc-for-6.1-20210504: (46 commits)
hw/ppc/pnv_psi: Use device_cold_reset() instead of device_legacy_reset()
hw/ppc/spapr_vio: Reset TCE table object with device_cold_reset()
hw/intc/spapr_xive: Use device_cold_reset() instead of device_legacy_reset()
target/ppc: removed VSCR from SPR registration
target/ppc: Reduce the size of ppc_spr_t
target/ppc: Clean up _spr_register et al
target/ppc: Add POWER10 exception model
target/ppc: rework AIL logic in interrupt delivery
target/ppc: move opcode table logic to translate.c
target/ppc: code motion from translate_init.c.inc to gdbstub.c
spapr_drc.c: handle hotunplug errors in drc_unisolate_logical()
spapr.h: increase FDT_MAX_SIZE
spapr.c: do not use MachineClass::max_cpus to limit CPUs
ppc: Rename current DAWR macros and variables
target/ppc: POWER10 supports scv
target/ppc: Fix POWER9 radix guest HV interrupt AIL behaviour
docs/system: ppc: Add documentation for ppce500 machine
roms/u-boot: Bump ppce500 u-boot to v2021.04 to fix broken pci support
roms/Makefile: Update ppce500 u-boot build directory name
ppc/spapr: Add support for implement support for H_SCM_HEALTH
...
Gerd Hoffmann [Mon, 3 May 2021 13:29:15 +0000 (15:29 +0200)]
usb: limit combined packets to 1 MiB (CVE-2021-3527)
usb-host and usb-redirect try to batch bulk transfers by combining many
small usb packets into a single, large transfer request, to reduce the
overhead and improve performance.
This patch adds a size limit of 1 MiB for those combined packets to
restrict the host resources the guest can bind that way.
* remotes/vivier2/tags/trivial-branch-for-6.1-pull-request: (23 commits)
hw/rx/rx-gdbsim: Do not accept invalid memory size
docs: More precisely describe memory-backend-*::id's user
scripts: fix generation update-binfmts templates
docs/system: Document the removal of "compat" property for POWER CPUs
mc146818rtc: put it into the 'misc' category
Do not include exec/address-spaces.h if it's not really necessary
Do not include cpu.h if it's not really necessary
Do not include hw/boards.h if it's not really necessary
Do not include sysemu/sysemu.h if it's not really necessary
hw: Do not include qemu/log.h if it is not necessary
hw: Do not include hw/irq.h if it is not necessary
hw: Do not include hw/sysbus.h if it is not necessary
hw: Remove superfluous includes of hw/hw.h
ui: Fix memory leak in qemu_xkeymap_mapping_table()
hw/usb: Constify VMStateDescription
hw/display/qxl: Constify VMStateDescription
hw/arm: Constify VMStateDescription
vmstate: Constify some VMStateDescriptions
Fix typo in CFI build documentation
hw/pcmcia: Do not register PCMCIA type if not required
...
Since cpu_check_irqs() doesn't reference to anything outside
of CPUSPARCState, it better belongs to the architectural code
in target/, rather than the hardware specific code in hw/.
Note: while we moved the trace events, we don't rename them.
Remark: this allows us to build the leon3 machine stand alone,
fixing this link failure (because cpu_check_irqs is defined in
hw/sparc/sun4m.c which is only built when CONFIG_SUN4M is selected):
/usr/bin/ld: target_sparc_win_helper.c.o: in function `cpu_put_psr':
target/sparc/win_helper.c:91: undefined reference to `cpu_check_irqs'
hw/sparc: Allow building without the leon3 machine
When building without the leon3 machine, we get this link failure:
/usr/bin/ld: target_sparc_int32_helper.c.o: in function `leon3_irq_manager':
target/sparc/int32_helper.c:172: undefined reference to `leon3_irq_ack'
This is because the leon3_irq_ack() is declared in hw/sparc/leon3.c,
which is only build when CONFIG_LEON3 is selected.
Fix by moving the leon3_cache_control_int() / leon3_irq_manager()
(which are specific to the leon3 machine) to hw/sparc/leon3.c.
Move the trace events along (but don't rename them).
leon3_irq_ack() is now locally used, declare it static to reduce
its scope.
Peter Maydell [Tue, 4 May 2021 16:05:53 +0000 (17:05 +0100)]
Merge remote-tracking branch 'remotes/legoater/tags/pull-aspeed-20210503' into staging
Aspeed patches :
* Fixes for the DMA space
* New model for ASPEED's Hash and Crypto Engine (Joel and Klaus)
* Acceptance tests (Joel)
* A fix for the XDMA model
* Some extra features for the SMC controller.
* Two new boards : rainier-bmc and quanta-q7l1-bmc (Patrick)
# gpg: Signature made Mon 03 May 2021 06:23:36 BST
# gpg: using RSA key A0F66548F04895EBFE6B0B6051A343C7CFFBECA1
# gpg: Good signature from "Cédric Le Goater <[email protected]>" [undefined]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: A0F6 6548 F048 95EB FE6B 0B60 51A3 43C7 CFFB ECA1
* remotes/legoater/tags/pull-aspeed-20210503:
aspeed: Add support for the quanta-q7l1-bmc board
hw/block: m25p80: Add support for mt25ql02g and mt25qu02g
aspeed: Add support for the rainier-bmc board
aspeed: Deprecate the swift-bmc machine
tests/qtest: Rename m25p80 test in aspeed_smc test
aspeed/smc: Add extra controls to request DMA
aspeed/smc: Add a 'features' attribute to the object class
hw/misc/aspeed_xdma: Add AST2600 support
tests/acceptance: Test ast2600 machine
tests/acceptance: Test ast2400 and ast2500 machines
tests/qtest: Add test for Aspeed HACE
aspeed: Integrate HACE
hw: Model ASPEED's Hash and Crypto Engine
hw/arm/aspeed: Do not sysbus-map mmio flash region directly, use alias
aspeed/i2c: Rename DMA address space
aspeed/i2c: Fix DMA address mask
aspeed/smc: Remove unused "sdram-base" property
aspeed/smc: Use the RAM memory region for DMAs
Paolo Bonzini [Tue, 16 Mar 2021 07:27:40 +0000 (08:27 +0100)]
configure: handle meson options that have changed type
Usually Meson uses pre-serialized information in meson-private to
speed up re-runs. This is not possible for version changes, where
Meson instead rebuilds the serialized information using cmd_line.txt.
In some cases cmd_line.txt can contain stale information, since it
is not rebuild except when "meson setup" is invoked. Update it in
the configure script to allow upgrading our Meson version.
Paolo Bonzini [Tue, 13 Apr 2021 08:20:32 +0000 (10:20 +0200)]
ratelimit: protect with a mutex
Right now, rate limiting is protected by the AioContext mutex, which is
taken for example both by the block jobs and by qmp_block_job_set_speed
(via find_block_job).
We would like to remove the dependency of block layer code on the
AioContext mutex, since most drivers and the core I/O code are already
not relying on it. However, there is no existing lock that can easily
be taken by both ratelimit_set_speed and ratelimit_calculate_delay,
especially because the latter might run in coroutine context (and
therefore under a CoMutex) but the former will not.
Since concurrent calls to ratelimit_calculate_delay are not possible,
one idea could be to use a seqlock to get a snapshot of slice_ns and
slice_quota. But for now keep it simple, and just add a mutex to the
RateLimit struct; block jobs are generally not performance critical to
the point of optimizing the clock cycles spent in synchronization.
This also requires the introduction of init/destroy functions, so
add them to the two users of ratelimit.h.
Paolo Bonzini [Wed, 14 Apr 2021 14:09:26 +0000 (16:09 +0200)]
oslib-win32: do not rely on macro to get redefined function name
On Windows with glib <2.50, g_poll is redefined to use the variant
defined in util/oslib-win32.c. Use the same name in the declaration
and definition for ease of grepping.
Peter Maydell [Tue, 4 May 2021 09:58:55 +0000 (10:58 +0100)]
Merge remote-tracking branch 'remotes/bsdimp/tags/pull-bsd-user-20210430' into staging
bsd-user: start to cleanup the mess
A number of small cleanups to get started. All the checkpatch.pl warnings for
bsdload.c have been fixed, as well as a warning from qemu.h (though more remain
and this patch series fails the format check still). I've also fixed a
compile-time warning about a missing break.
# gpg: Signature made Fri 30 Apr 2021 16:40:08 BST
# gpg: using RSA key 2035F894B00AA3CF7CCDE1B76C1CD1287DB01100
# gpg: Good signature from "Warner Losh <[email protected]>" [unknown]
# gpg: aka "Warner Losh <[email protected]>" [unknown]
# gpg: aka "Warner Losh <[email protected]>" [unknown]
# gpg: aka "Warner Losh <[email protected]>" [unknown]
# gpg: aka "Warner Losh <[email protected]>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 2035 F894 B00A A3CF 7CCD E1B7 6C1C D128 7DB0 1100
* remotes/bsdimp/tags/pull-bsd-user-20210430:
bsd-user: style tweak: Put {} around all if/else/for statements
bsd-user: put back a break; that had gone missing...
bsd-user: style tweak: return is not a function, eliminate ()
bsd-user: style tweak: keyword space (
bsd-user: whitespace changes
hw/usb: Do not build USB subsystem if not required
If the Kconfig 'USB' value is not selected, it is pointless to
build the USB core components. Add a stub for the HMP commands
and usbdevice_create() which is called by usb_device_add in
softmmu/vl.c.
Peter Maydell [Mon, 3 May 2021 15:18:49 +0000 (16:18 +0100)]
hw/ppc/pnv_psi: Use device_cold_reset() instead of device_legacy_reset()
The pnv_psi.c code uses device_legacy_reset() for two purposes:
* to reset itself from its qemu_register_reset() handler
* to reset a XiveSource object it has
Neither it nor the XiveSource have any qbuses, so the new
device_cold_reset() function (which resets both the device and its
child buses) is equivalent here to device_legacy_reset() and we can
just switch to the new API.
Peter Maydell [Mon, 3 May 2021 15:18:48 +0000 (16:18 +0100)]
hw/ppc/spapr_vio: Reset TCE table object with device_cold_reset()
The spapr_vio_quiesce_one() function resets the TCE table object
(TYPE_SPAPR_TCE_TABLE) via device_legacy_reset(). We know that
objects of that type do not have a qbus of their own, so the new
device_cold_reset() function (which resets both the device and its
child buses) is equivalent here to device_legacy_reset() and we can
just switch to the new API.
Peter Maydell [Mon, 3 May 2021 15:18:47 +0000 (16:18 +0100)]
hw/intc/spapr_xive: Use device_cold_reset() instead of device_legacy_reset()
The h_int_reset() function resets the XIVE interrupt controller via
device_legacy_reset(). We know that the interrupt controller does
not have a qbus of its own, so the new device_cold_reset() function
(which resets both the device and its child buses) is equivalent here
to device_legacy_reset() and we can just switch to the new API.
Since vscr is not an spr, its initialization was removed from the
spr registration functions, and moved to the relevant init_procs.
We may look into adding vscr to the reset path instead of the init
path (as suggested by David Gibson), but this looked like a good
enough solution for now.
target/ppc: move opcode table logic to translate.c
code motion to remove opcode callback table from
translate_init.c.inc to translate.c in preparation to remove
the #include <translate_init.c.inc> from translate.c. Also created
destroy_ppc_opcodes and removed that logic from ppc_cpu_unrealize
projects / qemu.git / log