The gvec expanders perform a modulo on the shift count. If the target
requires alternate behaviour, then it cannot use the generic gvec
expanders anyway, and will have to have its own custom code.
Allow the backend to expand dup from memory directly, instead of
forcing the value into a temp first. This is especially important
if integer/vector register moves do not exist.
Note that officially tcg_out_dupm_vec is allowed to fail.
If it did, we could fix this up relatively easily:
VECE == 32/64:
Load the value into a vector register, then dup.
Both of these must work.
VECE == 8/16:
If the value happens to be at an offset such that an aligned
load would place the desired value in the least significant
end of the register, go ahead and load w/garbage in high bits.
Load the value w/INDEX_op_ld{8,16}_i32.
Attempt a move directly to vector reg, which may fail.
Store the value into the backing store for OTS.
Load the value into the vector reg w/TCG_TYPE_I32, which must work.
Duplicate from the vector reg into itself, which must work.
All of which is well and good, except that all supported
hosts can support dupm for all vece, so all of the failure
paths would be dead code and untestable.
tcg: Promote tcg_out_{dup,dupi}_vec to backend interface
The i386 backend already has these functions, and the aarch64 backend
could easily split out one. Nothing is done with these functions yet,
but this will aid register allocation of INDEX_op_dup_vec in a later patch.
Adjust the aarch64 tcg_out_dupi_vec signature to match the new interface.
tcg: Support cross-class moves without instruction support
PowerPC Altivec does not support direct moves between vector registers
and general registers. So when tcg_out_mov fails, we can use the
backing memory for the temporary to perform the move.
The only fixed_reg is cpu_env, and it should not be modified
during any TB. Therefore code that tries to special-case moves
into a fixed_reg is dead. Remove it.
tcg: Specify optional vector requirements with a list
Replace the single opcode in .opc with a null-terminated
array in .opt_opc. We still require that all opcodes be
used with the same .vece.
Validate the contents of this list with CONFIG_DEBUG_TCG.
All tcg_gen_*_vec functions will check any list active
during .fniv expansion. Swap the active list in and out
as we expand other opcodes, or take control away from the
front-end function.
tcg: Allow add_vec, sub_vec, neg_vec, not_vec to be expanded
PowerPC Altivec does not support add and subtract of 64-bit elements.
Prepare for that configuration by not assuming the operation is
universally supported.
* remotes/huth-gitlab/tags/pull-request-2019-05-13: (29 commits)
hw/arm: Remove hard-enablement of the remaining PCI devices
hw/arm: Express dependencies of the musca machines with Kconfig
hw/arm: Express dependencies of the xlnx-versal-virt machine with Kconfig
hw/arm: Express dependencies of the ZynqMP zcu102 machine with Kconfig
hw/arm: Express dependencies of the microbit / nrf51 machine with Kconfig
hw/arm: Express dependencies of the remaining IMX boards with Kconfig
hw/arm: Express dependencies of the MSF2 / EMCRAFT_SF2 machine with Kconfig
hw/arm: Express dependencies of sabrelite with Kconfig
hw/arm: Express dependencies of canon-a1100 with Kconfig
hw/arm: Express dependencies of the raspi machines with Kconfig
hw/arm: Express dependencies of the MPS2 boards with Kconfig
hw/arm: Express dependencies of allwinner / cubieboard with Kconfig
hw/arm: Express dependencies of netduino / stm32f2xx with Kconfig
hw/arm: Express dependencies of the virt machine with Kconfig
hw/arm: Express dependencies of the aspeed boards with Kconfig
hw/arm: Express dependencies of collie with Kconfig
hw/arm: Express dependencies of xilinx-zynq with Kconfig
hw/arm: Express dependencies of the PXA2xx machines with Kconfig
hw/arm: Express dependencies of realview, versatile and vexpress with Kconfig
hw/arm: Express dependencies of stellaris with Kconfig
...
Peter Maydell [Mon, 13 May 2019 12:55:13 +0000 (13:55 +0100)]
Merge remote-tracking branch 'remotes/armbru/tags/pull-misc-2019-05-13' into staging
Miscellaneous patches for 2019-05-13
# gpg: Signature made Mon 13 May 2019 08:04:02 BST
# gpg: using RSA key 3870B400EB918653
# gpg: Good signature from "Markus Armbruster <[email protected]>" [full]
# gpg: aka "Markus Armbruster <[email protected]>" [full]
# Primary key fingerprint: 354B C8B3 D7EB 2A6B 6867 4E5F 3870 B400 EB91 8653
* remotes/armbru/tags/pull-misc-2019-05-13:
Clean up decorations and whitespace around header guards
Normalize header guard symbol definition.
Clean up ill-advised or unusual header guards
Clean up header guards that don't match their file name
target/xtensa: Clean up core-isa.h header guards
linux-user/nios2 linux-user/riscv: Clean up header guards
authz: Normalize #include "authz/trace.h" to "trace.h"
Use #include "..." for our own headers, <...> for others
Clean up includes
Peter Maydell [Mon, 13 May 2019 09:45:15 +0000 (10:45 +0100)]
Merge remote-tracking branch 'remotes/stsquad/tags/pull-demacro-softmmu-100519-1' into staging
Demacrofy the SoftMMU
- the demacro itself
- refactor TLB_RECHECK and fix bug
- move unaligned handler out
# gpg: Signature made Fri 10 May 2019 20:34:14 BST
# gpg: using RSA key 6685AE99E75167BCAFC8DF35FBD0DB095A9E2A44
# gpg: Good signature from "Alex Bennée (Master Work Key) <[email protected]>" [full]
# Primary key fingerprint: 6685 AE99 E751 67BC AFC8 DF35 FBD0 DB09 5A9E 2A44
* remotes/stsquad/tags/pull-demacro-softmmu-100519-1:
cputlb: Do unaligned store recursion to outermost function
cputlb: Do unaligned load recursion to outermost function
cputlb: Drop attribute flatten
cputlb: Move TLB_RECHECK handling into load/store_helper
accel/tcg: demacro cputlb
Thomas Huth [Fri, 8 Feb 2019 05:39:48 +0000 (06:39 +0100)]
hw/arm: Express dependencies of collie with Kconfig
Add Kconfig dependencies for the Strongarm collie machine.
This patch is based on earlier work by Ákos Kovács (i.e.
his "hw/arm/Kconfig: Add ARM Kconfig" patch).
Thomas Huth [Thu, 7 Feb 2019 19:26:34 +0000 (20:26 +0100)]
hw/arm: Express dependencies of xilinx-zynq with Kconfig
Add Kconfig dependencies for the xilinx-zynq-a9 board.
This patch is based on earlier work by Ákos Kovács (i.e.
his "hw/arm/Kconfig: Add ARM Kconfig" patch).
Thomas Huth [Fri, 8 Feb 2019 11:35:26 +0000 (12:35 +0100)]
hw/arm: Express dependencies of the PXA2xx machines with Kconfig
Add Kconfig dependencies for the PXA2xx machines (akita, borzoi,
connex and verdex gumstix, tosa, mainstone, spitz, terrier and z2).
This patch is based on earlier work by Ákos Kovács (i.e.
his "hw/arm/Kconfig: Add ARM Kconfig" patch).
Thomas Huth [Thu, 7 Feb 2019 16:12:14 +0000 (17:12 +0100)]
hw/arm: Express dependencies of the OMAP machines with Kconfig
Add Kconfig dependencies for the OMAP machines (cheetah, n800, n810,
sx1 and sx1-v1).
This patch is slightly based on earlier work by Ákos Kovács (i.e.
his "hw/arm/Kconfig: Add ARM Kconfig" patch).
Thomas Huth [Thu, 7 Feb 2019 15:51:56 +0000 (16:51 +0100)]
hw/arm: Express dependencies of the fsl-imx31 machine with Kconfig
Add Kconfig dependencies for the fsl-imx31 / kzm machine.
This patch is slightly based on earlier work by Ákos Kovács (i.e.
his "hw/arm/Kconfig: Add ARM Kconfig" patch).
Thomas Huth [Thu, 7 Feb 2019 09:35:22 +0000 (10:35 +0100)]
hw/arm: Express dependencies of the highbank machines with Kconfig
Add Kconfig dependencies for the highbank machine (and the midway
machine).
This patch is slightly based on earlier work by Ákos Kovács (i.e.
his "hw/arm/Kconfig: Add ARM Kconfig" patch).
Thomas Huth [Thu, 7 Feb 2019 09:28:01 +0000 (10:28 +0100)]
hw/arm: Express dependencies of the exynos machines with Kconfig
Add Kconfig dependencies for the Exynos-related boards (nuri and
smdkc210).
This patch is slightly based on earlier work by Ákos Kovács (i.e.
his "hw/arm/Kconfig: Add ARM Kconfig" patch).
Thomas Huth [Fri, 22 Feb 2019 14:48:11 +0000 (15:48 +0100)]
hw/ide/ahci: Add a Kconfig switch for the AHCI-ICH9 device
Some of our machines (like the ARM cubieboard) use CONFIG_AHCI for an AHCI
sysbus device, but do not use CONFIG_PCI since they do not feature a PCI
bus. With CONFIG_AHCI but without CONFIG_PCI, currently linking fails:
../hw/ide/ich.o: In function `pci_ich9_ahci_realize':
hw/ide/ich.c:124: undefined reference to `pci_allocate_irq'
hw/ide/ich.c:126: undefined reference to `pci_register_bar'
hw/ide/ich.c:128: undefined reference to `pci_register_bar'
hw/ide/ich.c:131: undefined reference to `pci_add_capability'
hw/ide/ich.c:147: undefined reference to `msi_init'
../hw/ide/ich.o: In function `pci_ich9_uninit':
hw/ide/ich.c:158: undefined reference to `msi_uninit'
../hw/ide/ich.o:(.data.rel+0x50): undefined reference to `vmstate_pci_device'
We must only compile ich.c if CONFIG_PCI is available, too, so introduce a
new config switch for this device.
Thomas Huth [Fri, 10 May 2019 08:11:59 +0000 (10:11 +0200)]
Makefile: Fix inclusion of the config-devices.mak.d Kconfig dependencies
The Makefile tries to include device Kconfig dependencies via
-include $(SUBDIR_DEVICES_MAK_DEP)
and thus expects files that match *-softmmu/config-devices.mak.d ...
however, the minikconf script currently generates files a la
"*-softmmu-config.devices.mak.d" instead, so the dependency files
simply got ignored so far. For example, after a "touch hw/arm/Kconfig",
the arm-softmmu/config-devices.mak file is currently not re-generated.
Fix it by putting the dependency files in the *-softmmu folders now.
Thomas Huth [Tue, 19 Feb 2019 16:00:10 +0000 (17:00 +0100)]
hw/pci/pci-stub: Add msi_enabled() and msi_notify() to the pci stubs
Some machines have an AHCI adapter, but no PCI. To be able to
compile hw/ide/ahci.c without CONFIG_PCI, we still need the two
functions msi_enabled() and msi_notify() for linking.
This is required for the new Kconfig-like build system, if a user
wants to compile a QEMU binary with just one machine that has AHCI,
but no PCI, like the ARM "cubieboard" for example.
scripts/clean-header-guards.pl warns these headers use reserved
identifier _XTENSA_CORE_CONFIGURATION_H as header guard symbol. It
additionally warns the guard doesn't match the file name.
Reuse of the same guard symbol in multiple headers is okay as long as
they cannot be included together.
Since we can avoid guard symbol reuse easily, do so: use the guard
symbol scripts/clean-header-guards.pl picks, less the TARGET_ prefix.
linux-user/nios2 linux-user/riscv: Clean up header guards
Reuse of the same guard symbol in multiple headers is okay as long as
they cannot be included together. scripts/clean-header-guards.pl
can't tell, so it warns.
Since we can avoid guard symbol reuse easily, do so: use guard symbol
${target^^}_${fname^^} for linux-user/$target/$fname, just like we did
in commit a9c94277f0..3500385697.
We're in the process of spinning out slirp/. tests/fp/platform.h is
has to include qemu/osdep.h because tests/fp/berkeley-softfloat-3/ and
tests/fp/berkeley-testfloat-3/ don't. tests/uefi-test-tools/ is guest
software. The remaining reverts are the same as in commit b7d89466dde.
cputlb: Move TLB_RECHECK handling into load/store_helper
Having this in io_readx/io_writex meant that we forgot to
re-compute index after tlb_fill. It also means we can use
the normal aligned memory load path. It also fixes a bug
in that we had cached a use of index across a tlb_fill.
Alex Bennée [Fri, 15 Feb 2019 14:31:13 +0000 (14:31 +0000)]
accel/tcg: demacro cputlb
Instead of expanding a series of macros to generate the load/store
helpers we move stuff into common functions and rely on the compiler
to eliminate the dead code for each variant.
Peter Maydell [Fri, 10 May 2019 17:44:59 +0000 (18:44 +0100)]
Merge remote-tracking branch 'remotes/kevin/tags/for-upstream' into staging
Block layer patches:
- block: Remove bdrv_read() and bdrv_write()
- qemu-img: Allow rebase with no input base
- blockjob: Fix coroutine thread after AioContext change
- MAINTAINERS updates for pflash, curl and gluster
# gpg: Signature made Fri 10 May 2019 16:39:54 BST
# gpg: using RSA key 7F09B272C88F2FD6
# gpg: Good signature from "Kevin Wolf <[email protected]>" [full]
# Primary key fingerprint: DC3D EB15 9A9A F95D 3D74 56FE 7F09 B272 C88F 2FD6
* remotes/kevin/tags/for-upstream:
iotests: Add test for rebase without input base
qemu-img: Use zero writes after source backing EOF
qemu-img: Allow rebase with no input base
qcow2: Remove BDRVQcow2State.cluster_sectors
block: Remove bdrv_read() and bdrv_write()
vvfat: Replace bdrv_{read,write}() with bdrv_{pread,pwrite}()
vdi: Replace bdrv_{read,write}() with bdrv_{pread,pwrite}()
qcow2: Replace bdrv_write() with bdrv_pwrite()
qemu-img: Use IEC binary prefixes for size constants
test-block-iothread: Job coroutine thread after AioContext switch
blockjob: Fix coroutine thread after AioContext change
qemu-iotests: Fix cleanup for 192
MAINTAINERS: Add an entry for the Parallel NOR Flash devices
MAINTAINERS: Downgrade status of block sections without "M:" to "Odd Fixes"
block: remove bs from lists before closing
Alberto Garcia [Wed, 1 May 2019 18:13:57 +0000 (21:13 +0300)]
vvfat: Replace bdrv_{read,write}() with bdrv_{pread,pwrite}()
There's only a couple of bdrv_read() and bdrv_write() calls left in
the vvfat code, and they can be trivially replaced with the byte-based
bdrv_pread() and bdrv_pwrite().
Alberto Garcia [Wed, 1 May 2019 18:13:56 +0000 (21:13 +0300)]
vdi: Replace bdrv_{read,write}() with bdrv_{pread,pwrite}()
There's only a couple of bdrv_read() and bdrv_write() calls left in
the vdi code, and they can be trivially replaced with the byte-based
bdrv_pread() and bdrv_pwrite().
Kevin Wolf [Fri, 3 May 2019 17:17:43 +0000 (19:17 +0200)]
blockjob: Fix coroutine thread after AioContext change
Commit 463e0be10 ('blockjob: add AioContext attached callback') tried to
make block jobs robust against AioContext changes of their main node,
but it never made sure that the job coroutine actually runs in the new
thread.
Instead of waking up the job coroutine in whatever thread it ran before,
let's always pass the AioContext where it should be running now.
Kevin Wolf [Wed, 8 May 2019 12:00:44 +0000 (14:00 +0200)]
qemu-iotests: Fix cleanup for 192
Test case 192 calls _launch_qemu, so it also needs to _cleanup_qemu when
it's done, otherwise the QMP FIFOs stay around in scratch/. It also
creates a temporary NBD socket that needs to be removed as well at the
end of the test case.
Thomas Huth [Mon, 6 May 2019 06:18:54 +0000 (08:18 +0200)]
MAINTAINERS: Downgrade status of block sections without "M:" to "Odd Fixes"
Fixes might still get picked up via the qemu-block mailing list,
so the status is not "Orphan" yet.
Also add the gluster mailing list as suggested by Niels here:
Peter Maydell [Fri, 10 May 2019 13:49:36 +0000 (14:49 +0100)]
Merge remote-tracking branch 'remotes/stefanha/tags/block-pull-request' into staging
Pull request
# gpg: Signature made Fri 10 May 2019 14:02:22 BST
# gpg: using RSA key 8695A8BFD3F97CDAAC35775A9CA4ABB381AB73C8
# gpg: Good signature from "Stefan Hajnoczi <[email protected]>" [full]
# gpg: aka "Stefan Hajnoczi <[email protected]>" [full]
# Primary key fingerprint: 8695 A8BF D3F9 7CDA AC35 775A 9CA4 ABB3 81AB 73C8
* remotes/stefanha/tags/block-pull-request:
docs: add Security chapter to the documentation
docs: add Secure Coding Practices to developer docs
aio-posix: ensure poll mode is left when aio_notify is called
block/io.c: fix for the allocation failure
block: Add coroutine_fn to bdrv_check_co_entry
util/readline: Add braces to fix checkpatch errors
util: readline: replace tab indent by four spaces to fix checkpatch errors
util/readline: add a space to fix errors by checkpatch tool
Add a new virtio-input device, which connects to a vhost-user
backend.
Instead of reading configuration directly from an input device /
evdev (like virtio-input-host), it reads it over vhost-user protocol
with {SET,GET}_CONFIG messages. The vhost-user-backend handles the
queues & events setup.
Create a vhost-user-backend object that holds a connection to a
vhost-user backend (or "slave" process) and can be referenced from
virtio devices that support it. See later patches for input & gpu
usage.
Note: a previous iteration of this object made it user-creatable, and
allowed managed sub-process spawning, but that has been dropped for
now.
/home/elmarco/src/qemu/contrib/libvhost-user/libvhost-user.c: In function ‘vu_set_mem_table_exec_postcopy’:
/home/elmarco/src/qemu/contrib/libvhost-user/libvhost-user.c:546:31: warning: taking address of packed member of ‘struct VhostUserMsg’ may result in an unaligned pointer value [-Waddress-of-packed-member]
546 | VhostUserMemory *memory = &vmsg->payload.memory;
| ^~~~~~~~~~~~~~~~~~~~~
/home/elmarco/src/qemu/contrib/libvhost-user/libvhost-user.c: In function ‘vu_set_mem_table_exec’:
/home/elmarco/src/qemu/contrib/libvhost-user/libvhost-user.c:688:31: warning: taking address of packed member of ‘struct VhostUserMsg’ may result in an unaligned pointer value [-Waddress-of-packed-member]
688 | VhostUserMemory *memory = &vmsg->payload.memory;
| ^~~~~~~~~~~~~~~~~~~~~
/home/elmarco/src/qemu/contrib/libvhost-user/libvhost-user.c: In function ‘vu_set_vring_addr_exec’:
/home/elmarco/src/qemu/contrib/libvhost-user/libvhost-user.c:817:36: warning: taking address of packed member of ‘struct VhostUserMsg’ may result in an unaligned pointer value [-Waddress-of-packed-member]
817 | struct vhost_vring_addr *vra = &vmsg->payload.addr;
| ^~~~~~~~~~~~~~~~~~~
Alex Bennée [Thu, 2 May 2019 09:27:28 +0000 (10:27 +0100)]
linux-user: fix GPROF build failure
When linux-user/exit was introduced we failed to move the gprof
include at the same time. The CI didn't notice because it only builds
system emulation. Fix it for those that still find gprof useful.
Alex Bennée [Thu, 2 May 2019 14:58:46 +0000 (15:58 +0100)]
linux-user: avoid treading on gprof's SIGPROF signals
The guest tends to get confused when it receives signals it doesn't
know about. Given the gprof magic has also set up it's own handler we
would do well to avoid stomping on it as well.
Some PT_LOAD segments may be completely zeroed out and their p_filesize
is zero, in that case the loader should just allocate a page that's at
least p_memsz bytes large (plus eventual alignment padding).
Calling zero_bss does this job for us, all we have to do is make sure we
don't try to mmap a zero-length page.
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