* remotes/bonzini/tags/for-upstream: (34 commits)
avoid TABs in files that only contain a few
remove space-tab sequences
scripts: add script to convert multiline comments into 4-line format
hw/watchdog/wdt_i6300esb: remove a unnecessary comment
checkpatch: warn about qemu/queue.h head structs that are not typedef-ed
qemu/queue.h: simplify reverse access to QTAILQ
qemu/queue.h: reimplement QTAILQ without pointer-to-pointers
qemu/queue.h: remove Q_TAILQ_{HEAD,ENTRY}
qemu/queue.h: typedef QTAILQ heads
qemu/queue.h: leave head structs anonymous unless necessary
vfio: make vfio_address_spaces static
qemu/queue.h: do not access tqe_prev directly
test: replace gtester with a TAP driver
test: execute g_test_run when tests are skipped
qga: drop < Vista compatibility
build-sys: build with Vista API by default
build-sys: move windows defines in osdep.h header
build-sys: don't include windows.h, osdep.h does it
scsi: esp: Defer command completion until previous interrupts have been handled
esp-pci: Fix status register write erase control
...
Paolo Bonzini [Thu, 13 Dec 2018 22:37:37 +0000 (23:37 +0100)]
avoid TABs in files that only contain a few
Most files that have TABs only contain a handful of them. Change
them to spaces so that we don't confuse people.
disas, standard-headers, linux-headers and libdecnumber are imported
from other projects and probably should be exempted from the check.
Outside those, after this patch the following files still contain both
8-space and TAB sequences at the beginning of the line. Many of them
have a majority of TABs, or were initially committed with all tabs.
Paolo Bonzini [Fri, 14 Dec 2018 09:33:22 +0000 (10:33 +0100)]
scripts: add script to convert multiline comments into 4-line format
Since we're adding checkpatch rules to enforce 4-line multiline comment
format, i.e. with lone /* and */, this script can be run on existing
code so that the comment style does not become inconsistent within a
file.
The alternative to awk-in-a-shell-script could be Perl, which also
supports -i directly, but a2p seems to have bitrotten and I didn't quite
feel like writing this twice...
Peng Hao [Sat, 8 Dec 2018 07:18:31 +0000 (15:18 +0800)]
hw/watchdog/wdt_i6300esb: remove a unnecessary comment
The registered memory region of i6300esb is not suitable for coalesced
mmio, because a write for the region may trigger an immediate action
and can't be delayed.
Paolo Bonzini [Thu, 6 Dec 2018 11:01:53 +0000 (12:01 +0100)]
qemu/queue.h: reimplement QTAILQ without pointer-to-pointers
QTAILQ is a doubly linked list, with a pointer-to-pointer to the last
element from the head, and the previous element from each node.
But if you squint enough, QTAILQ becomes a combination of a singly-linked
forwards list, and another singly-linked list which goes backwards and
is circular. This is the idea that lets QTAILQ implement reverse
iteration: only, because the backwards list points inside the node,
accessing the previous element needs to go two steps back and one
forwards.
What this patch does is implement it in these terms, without actually
changing the in-memory layout at all. The coexistence of the two lists
is realized by making QTAILQ_HEAD and QTAILQ_ENTRY unions of the forwards
pointer and a generic QTailQLink node. Thq QTailQLink can walk the list in
both directions; the union is needed so that the forwards pointer can
have the correct type, as a sort of poor man's template. While there
are other ways to get the same layout without a union, this one has
the advantage of simpler operation in the debugger, because the fields
tqh_first and tqe_next still exist as before the patch. Those fields are
also used by scripts/qemugdb/mtree.py, so it's a good idea to preserve them.
The advantage of the new representation is that the two-back-one-forward
dance done by backwards accesses can be done all while operating on
QTailQLinks. No casting to the head struct is needed anymore because,
even though the QTailQLink's forward pointer is a void *, we can use
typeof to recover the correct type. This patch only changes the
implementation, not the interface. The next patch will remove the head
struct name from the backwards visit macros.
Paolo Bonzini [Thu, 6 Dec 2018 10:56:15 +0000 (11:56 +0100)]
qemu/queue.h: typedef QTAILQ heads
This will be needed when we change the QTAILQ head and elem structs
to unions. However, it is also consistent with the usage elsewhere
in QEMU for other list head structs (see for example FsMountList).
Note that most QTAILQs only need their name in order to do backwards
walks. Those do not break with the struct->union change, and anyway
the change will also remove the need to name heads when doing backwards
walks, so those are not touched here.
Paolo Bonzini [Thu, 6 Dec 2018 10:58:10 +0000 (11:58 +0100)]
qemu/queue.h: leave head structs anonymous unless necessary
Most list head structs need not be given a name. In most cases the
name is given just in case one is going to use QTAILQ_LAST, QTAILQ_PREV
or reverse iteration, but this does not apply to lists of other kinds,
and even for QTAILQ in practice this is only rarely needed. In addition,
we will soon reimplement those macros completely so that they do not
need a name for the head struct. So clean up everything, not giving a
name except in the rare case where it is necessary.
Paolo Bonzini [Thu, 29 Nov 2018 17:45:31 +0000 (18:45 +0100)]
test: replace gtester with a TAP driver
gtester is deprecated by upstream glib (see for example the announcement
at https://blog.gtk.org/2018/07/11/news-from-glib-2-58/) and it does
not support tests that call g_test_skip in some glib stable releases.
glib suggests instead using Automake's TAP support, which gtest itself
supports since version 2.38 (QEMU's minimum requirement is 2.40).
We do not support Automake, but we can use Automake's code to beautify
the TAP output. I chose to use the Perl copy rather than the shell/awk
one, with some changes so that it can accept TAP through stdin, in order
to reuse Perl's TAP parsing package. This also avoids duplicating the
parser between tap-driver.pl and tap-merge.pl.
# gpg: Signature made Thu 10 Jan 2019 14:28:23 GMT
# gpg: using RSA key 2807936F984DC5A6
# gpg: Good signature from "Eduardo Habkost <[email protected]>"
# Primary key fingerprint: 5A32 2FD5 ABC4 D3DB ACCF D1AA 2807 936F 984D C5A6
* remotes/ehabkost/tags/machine-next-pull-request:
qom: Don't keep error value between object_property_parse() calls
qdev: fix -device scsi-hd,help regression
machine: Use shorter format for GlobalProperty arrays
machine: Eliminate unnecessary stringify() usage
spapr: Eliminate SPAPR_PCI_2_7_MMIO_WIN_SIZE macro
memory-device: rewrite address assignment using ranges
range: add some more functions
Mention that QMP 'cpu-add' will be deprecated
Update that HMP 'cpu-add' is deprecated in 4.0
qemu-deprecated.texi: Rename the HMP section
Paolo Bonzini [Thu, 29 Nov 2018 17:45:30 +0000 (18:45 +0100)]
test: execute g_test_run when tests are skipped
Sometimes a test's main() function recognizes that the environment
does not support the test, and therefore exits. In this case, we
still should run g_test_run() so that a TAP harness will print the
test plan ("1..0") and the test will be marked as skipped.
Building QGA for XP seems possible so far: the dependency on
libqemuutil.a implies building qemu-thread-win32.c, which requires
Vista API since commit 12f8def0 (v2.9). But qemu-thread isn't being
used in QGA, the resulting binary may still work on XP. XP is no
longer supported for the past 4.5y, it's time to drop support for it.
Both qemu & qga build with Vista API by default already, by defining
_WIN32_WINNT 0x0600. Set it globally in osdep.h instead.
This replaces WINVER by _WIN32_WINNT in osdep.h. WINVER doesn't seem
to be really useful these days.
(see also https://blogs.msdn.microsoft.com/oldnewthing/20070411-00/?p=27283)
Guenter Roeck [Thu, 29 Nov 2018 17:17:42 +0000 (09:17 -0800)]
scsi: esp: Defer command completion until previous interrupts have been handled
The guest OS reads RSTAT, RSEQ, and RINTR, and expects those registers
to reflect a consistent state. However, it is possible that the registers
can change after RSTAT was read, but before RINTR is read, when
esp_command_complete() is called.
The guest OS would then try to handle INTR_BS combined with an old
value of RSTAT. This sometimes resulted in lost events, spurious
interrupts, guest OS confusion, and stalled SCSI operations.
A typical guest error log (observed with various versions of Linux)
looks as follows.
Guenter Roeck [Wed, 28 Nov 2018 21:56:10 +0000 (13:56 -0800)]
esp-pci: Fix status register write erase control
Per AM53C974 datasheet, definition of "SCSI Bus and Control (SBAC)"
register:
Bit 24 'STATUS' Write Erase Control
This bit controls the Write Erase feature on bits 3:1 and bit 6 of the DMA
Status Register ((B)+54h). When this bit is programmed to '1', the state
of bits 3:1 are preserved when read. Bits 3:1 are only cleared when a '1'
is written to the corresponding bit location. For example, to clear bit 1,
the value of '0000_0010b' should be written to the register. When the DMA
Status Preserve bit is '0', bits 3:1 are cleared when read.
The status register is currently defined to bit 12, not bit 24.
Also, its implementation is reversed: The status is auto-cleared if
the bit is set to 1, and must be cleared explicitly when the bit is
set to 0. This results in spurious interrupts reported by the Linux
kernel, and in some cases even results in stalled SCSI operations.
Set SBAC_STATUS to bit 24 and reverse the logic to fix the problem.
Stefan Hajnoczi [Thu, 15 Feb 2018 11:15:26 +0000 (11:15 +0000)]
block/iscsi: cancel libiscsi task when ABORT TASK TMF completes
The libiscsi iscsi_task_mgmt_async() API documentation says:
abort_task will also cancel the scsi task. The callback for the scsi
task will be invoked with SCSI_STATUS_CANCELLED
The libiscsi implementation does not fulfil this promise. The task's
callback is not invoked and its struct iscsi_pdu remains in the internal
list (effectively leaked).
This patch invokes the libiscsi iscsi_scsi_cancel_task() API to force
the task's callback to be invoked with SCSI_STATUS_CANCELLED when the
ABORT TASK TMF completes and the task's callback hasn't been invoked
yet.
Stefan Hajnoczi [Sat, 3 Feb 2018 06:16:21 +0000 (07:16 +0100)]
block/iscsi: fix ioctl cancel use-after-free
iscsi_aio_cancel() does not increment the request's reference count,
causing a use-after-free when ABORT TASK finishes after the request has
already completed.
There are some additional issues with iscsi_aio_cancel():
1. Several ABORT TASKs may be sent for the same task if
iscsi_aio_cancel() is invoked multiple times. It's better to avoid
this just in case the command identifier is reused.
2. The iscsilun->mutex protection is missing in iscsi_aio_cancel().
Stefan Hajnoczi [Sat, 3 Feb 2018 06:16:20 +0000 (07:16 +0100)]
block/iscsi: take iscsilun->mutex in iscsi_timed_check_events()
Commit d045c466d9e62b4321fadf586d024d54ddfd8bd4 ("iscsi: do not use
aio_context_acquire/release") introduced iscsilun->mutex but appears to
have overlooked iscsi_timed_check_events() when introducing the mutex.
iscsi_service() and iscsi_set_events() must be called with
iscsilun->mutex held.
iscsi_timed_check_events() is invoked from the AioContext and does not
take the mutex.
Stefan Hajnoczi [Sat, 3 Feb 2018 06:16:19 +0000 (07:16 +0100)]
block/iscsi: drop unused IscsiAIOCB->buf field
The IscsiAIOCB->buf field has not been used since commit e49ab19fcaa617ad6cdfe1ac401327326b6a2552 ("block/iscsi: bump libiscsi
requirement to 1.9.0"). It used to be a linear buffer for old libiscsi
versions that didn't support scatter-gather. The minimum libiscsi
version supports scatter-gather so we don't linearize buffers anymore.
Intel HAXM supports now 32-bit and 64-bit Linux hosts. This patch includes
the corresponding userland changes.
Since the Darwin userland backend is POSIX-compliant, the hax-darwin.{c,h}
files have been renamed to hax-posix.{c,h}. This prefix is consistent with
the naming used in the rest of QEMU.
Paolo Bonzini [Wed, 28 Nov 2018 16:28:45 +0000 (17:28 +0100)]
memory: update coalesced_range on transaction_commit
The e1000 driver calls memory_region_add_coalescing but
kvm_coalesce_mmio_region is never called for those regions. The bug
dates back to the introduction of the memory region API; to fix it,
delete and re-add coalesced MMIO ranges when building the FlatViews.
Because coalesced MMIO regions apply to all address spaces, the
has_coalesced_range flag has to be changed into an int.
Fixes: 093bc2cd885e ("Hierarchical memory region API") Reported-by: Atsushi Nemoto <[email protected]> Signed-off-by: Paolo Bonzini <[email protected]>
Store whether the FlatRange has had any coalesced I/O ranges applied,
and if not avoid calling coalesced_io_del. This is useful in preparation
for the next patch, which will call coalesced_io_del when rendering
memory regions.
Paolo Bonzini [Wed, 28 Nov 2018 09:42:06 +0000 (10:42 +0100)]
memory: extract flat_range_coalesced_io_{del,add}
Extract two new functions from memory_region_update_coalesced_range_as.
To avoid duplication in the creation of the MemoryRegionSection, use
MEMORY_LISTENER_UPDATE_REGION instead of MEMORY_LISTENER_CALL
to invoke the listener callback.
Paolo Bonzini [Thu, 29 Nov 2018 08:52:58 +0000 (09:52 +0100)]
checkpatch: colorize output to terminal
Add optional colors to make seeing message types a bit easier.
The default is to show them on a tty.
Inspired by Linux commits 57230297116fa ("checkpatch: colorize output
to terminal") and 737c0767758b ("checkpatch: change format of --color
argument to --color[=WHEN]").
Paolo Bonzini [Thu, 29 Nov 2018 08:35:47 +0000 (09:35 +0100)]
checkpatch: improve handling of multiple patches or files
Similar to how patchew output looks like for multiple patches,
say what file or patch is being tested _before_ emitting errors.
This is clearer to a human that scans the output from top to
bottom.
In addition, provide a truncated commit hash and subject instead of
the full hash, and process the commits first-to-last rather than
last-to-first.
Thomas Huth [Fri, 5 Oct 2018 14:13:12 +0000 (16:13 +0200)]
accel: Improve selection of the default accelerator
When compiling with "--disable-tcg", we currently still use "tcg"
as default accelerator. "kvm" should be used in this case instead.
Also, some downstream distros provide QEMU binaries which have "kvm"
in their names (e.g. "qemu-kvm" on RHEL or "kvm" on Ubuntu) that use
KVM by default - and some users might want to do something similar
with upstream binaries, too. Accomodate them by using "kvm:tcg" as
default when we detect such a binary name.
Roman Bolshakov [Wed, 21 Nov 2018 20:37:21 +0000 (23:37 +0300)]
roms: seabios: Rename CROSS_COMPILE to CROSS_PREFIX
SeaBIOS introduced CROSS_PREFIX in 2013 but it's not set in roms
Makefile.
With the change it's possible to cross-compile SeaBIOS on macOS,
if acpica/iasl is installed:
cd roms
export PATH=/path/to/cross/x86_64-unknown-linux-gnu/bin:$PATH
make bios system=unknown-linux-gnu
* remotes/kraxel/tags/ui-20190110-pull-request:
spice: Remove unused include
keymaps: drop support for include files
keymaps: remove common include
keymaps: drop nl-be map
keymaps: remove modifiers include
ui/console: Remove qemu_create_display_surface_guestmem()
configure: bump spice-server required version to 0.12.5
egl-headless: add egl_create_context
* remotes/vivier2/tags/trivial-patches-pull-request:
ioapic: use TYPE_FOO MACRO than constant string
trivial: Don't include isa.h if it is not really necessary
hw/audio/marvell: Don't include unnecessary i2c.h header file
qom: Include qemu/fprintf-fn.h in cpu.h
hw/core: fix whitespace in a sentence
typedefs: (Re-)sort entries alphabetically
Eduardo Habkost [Thu, 10 Jan 2019 02:02:57 +0000 (00:02 -0200)]
qom: Don't keep error value between object_property_parse() calls
When handling errp==NULL at object_apply_global_props(), we are
leaving the old error value in `err` after printing a warning.
This makes QEMU crash if two global properties generate warnings:
Peter Maydell [Thu, 10 Jan 2019 14:13:56 +0000 (14:13 +0000)]
Merge remote-tracking branch 'remotes/famz/tags/staging-pull-request' into staging
Block/testing patches
v2: Fix URL.
Drop BSD patch.
# gpg: Signature made Wed 09 Jan 2019 01:51:47 GMT
# gpg: using RSA key CA35624C6A9171C6
# gpg: Good signature from "Fam Zheng <[email protected]>"
# Primary key fingerprint: 5003 7CB7 9706 0F76 F021 AD56 CA35 624C 6A91 71C6
* remotes/famz/tags/staging-pull-request:
docker: Use a stable snapshot for Debian Sid
block/nvme: optimize the performance of nvme driver based on vfio-pci
Gerd Hoffmann [Tue, 11 Dec 2018 07:26:49 +0000 (08:26 +0100)]
usb-audio: ignore usb packages with wrong size
usb packets with no payload (zero length) seem to happen in practice for
whatever reason. Add a check and skip the packet then, otherwise we'll
trigger an assert.
Peter Maydell [Tue, 8 Jan 2019 18:49:00 +0000 (18:49 +0000)]
linux-user: make pwrite64/pread64(fd, NULL, 0, offset) return 0
Linux returns success if pwrite64() or pread64() are called with a
zero length NULL buffer, but QEMU was returning -TARGET_EFAULT.
This is the same bug that we fixed in commit 58cfa6c2e6eb51b23cc9
for the write syscall, and long before that in 38d840e6790c29f59
for the read syscall.
The qemu_create_display_surface_guestmem() function was added in
commit a77549b3ffcc24c32ee4e but apparently never used. Remove it.
(The API of this function is in any case awkward as a generic
function: it assumes that a physical address uniquely identifies
a piece of memory in the system, which is mostly but not
always true.)
configure: bump spice-server required version to 0.12.5
Looking at chardev/spice.c code, I realize compilation was broken for
a while with spice-server < 0.12.3. Let's bump required version
to 0.12.5, released May 19 2014, instead of adding more #ifdef.
(this patch combines changes from an early version and some of
Frediano "[PATCH 2/2] spice: Bump required spice-server version to
0.12.6")
According to repology, all the distros that are build target platforms
for QEMU include it:
Note that a previous version of this patch was bumping version to
0.12.6. Unfortunately, Debian Jessie (oldstable) is stuck with spice
server 0.12.5, and QEMU should keep building until after 2y of current
stable (Stretch), which will be around June 17th 2019. Qemu 4.1
should thus be free of bumping to spice-server 0.12.6 during 4.1
development cycle.
Gerd Hoffmann [Thu, 29 Nov 2018 12:35:02 +0000 (13:35 +0100)]
egl-headless: add egl_create_context
We must set the correct context (via eglMakeCurrent) before
calling qemu_egl_create_context, so we need a thin wrapper and can't
hook qemu_egl_create_context directly as ->dpy_gl_ctx_create callback.
Since commit ea9ce8934, device_post_init() applies globals directly
from machines and accelerator classes.
There are cases, such as -device scsi-hd,help, where the machine is
setup but there in no accelerator.
Let's skip accelerator globals in this case.
Fixes SEGV:
#0 0x0000555558ea04ff in object_get_class (obj=0x0) at /home/elmarco/src/qemu/build/../qom/object.c:857
#1 0x000055555854c797 in object_apply_compat_props (obj=0x616000078980) at /home/elmarco/src/qemu/build/../hw/core/qdev.c:978
#2 0x000055555854c797 in object_apply_compat_props (obj=0x616000078980) at /home/elmarco/src/qemu/build/../hw/core/qdev.c:973
#3 0x000055555854c959 in device_post_init (obj=0x616000078980) at /home/elmarco/src/qemu/build/../hw/core/qdev.c:989
#4 0x0000555558e9e250 in object_post_init_with_type (ti=<optimized out>, obj=0x616000078980) at /home/elmarco/src/qemu/build/../qom/object.c:365
#5 0x0000555558e9e250 in object_initialize_with_type (data=0x616000078980, size=616, type=<optimized out>) at /home/elmarco/src/qemu/build/../qom/object.c:425
#6 0x0000555558e9e571 in object_new_with_type (type=0x613000031900) at /home/elmarco/src/qemu/build/../qom/object.c:588
#7 0x000055555830c048 in qmp_device_list_properties (typename=typename@entry=0x60200000c2d0 "scsi-hd", errp=errp@entry=0x7fffffffc540) at /home/elmarco/src/qemu/qmp.c:519
#8 0x00005555582c4027 in qdev_device_help (opts=<optimized out>) at /home/elmarco/src/qemu/qdev-monitor.c:283
#9 0x0000555559378fa2 in qemu_opts_foreach (list=<optimized out>, func=func@entry=0x5555582cfca0 <device_help_func>, opaque=opaque@entry=0x0, errp=errp@entry=0x0) at /home/elmarco/src/qemu/util/qemu-option.c:1171
Eduardo Habkost [Mon, 7 Jan 2019 19:30:20 +0000 (17:30 -0200)]
machine: Use shorter format for GlobalProperty arrays
Instead of verbose arrays with 4 lines for each entry, make each
entry take only one line. This makes long arrays that couldn't
fit in the screen become short and readable.
Eduardo Habkost [Mon, 7 Jan 2019 19:30:19 +0000 (17:30 -0200)]
machine: Eliminate unnecessary stringify() usage
stringify() is useful when we need to use macros in compat_props
(like when we set virtio-baloon-pci.class=PCI_CLASS_MEMORY_RAM at
pc_i440fx_1_0_machine_options()), but it is pointless when we are
already providing a number literal.
Replace stringify() with string literals when appropriate.
Add some more functions that will be used in memory-device context.
range_init(): Init using lower bound and size, check for validity
range_init_nofail(): Init using lower bound and size, validity asserted
range_size(): Extract the size of a range
range_overlaps_range(): Check for overlaps of two ranges
range_contains_range(): Check if one range is contained in the other
Peter Maydell [Wed, 9 Jan 2019 16:08:31 +0000 (16:08 +0000)]
Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-4.0-20190109' into staging
ppc patch queue 2019-01-09
Second main pull request for qemu-4.0. Highlights are:
* Final parts of XIVE support for pseries (without KVM)
* Preliminary work for PHB hotplug
* Starting to use TCG vector operations
This includes some changes in the PCI core, which Michael Tsirkin
requested come through this tree, since they're primarily of interest
for ppc.
* remotes/dgibson/tags/ppc-for-4.0-20190109: (29 commits)
spapr: enable XIVE MMIOs at reset
spapr: introduce a new sPAPR IRQ backend supporting XIVE and XICS
ppc/xics: allow ICSState to have an offset 0
spapr: move the qemu_irq array under the machine
pnv/psi: move the ICSState qemu_irq array under the PSI device model
ppc: export the XICS and XIVE set_irq handlers
spapr: return from post_load method when RTC import fails
ppc: replace the 'Object *intc' by a 'ICPState *icp' pointer under the CPU
ppc/xive: introduce a XiveTCTX pointer under PowerPCCPU
spapr: modify the prototype of the cpu_intc_create() method
spapr/xive: simplify the sPAPR IRQ qirq method for XIVE
spapr_pci: Define SPAPR_MAX_PHBS in hw/pci-host/spapr.h
pci: allow cleanup/unregistration of PCI root buses
spapr: move spapr_create_phb() to core machine code
MAINTAINERS: add qemu_vga.ndrv file entry for Mac machines
MAINTAINERS: Add some missing ppc-related files
target/ppc: replace AVR* macros with Vsr* macros
target/ppc: move FP and VMX registers into aligned vsr register array
target/ppc: merge ppc_vsr_t and ppc_avr_t union types
target/ppc: switch FPR, VMX and VSX helpers to access data directly from cpu_env
...
Eric Blake [Thu, 15 Nov 2018 21:17:51 +0000 (15:17 -0600)]
typedefs: (Re-)sort entries alphabetically
Since the last time we sorted things (2988cbeaf), we've had a
few relapses that were inserted out of order. Also, we had more
entries that were sorted case-insensitively than not, so let's
document that convention and stick to it.
The Debian Sid repository is not garanteed to be stable, as his
'unstable' name suggest :)
To allow quick testing, Debian maintainers might push packages
various time a day. Sometime package dependencies might break,
which is annoying when using this repository for stable development
(which is not recommended, but Sid provides edge packages we use
for testing).
Debian provides repositories snapshots which are suitable for our
use. Pick a recent date that works. When required, update to newer
releases will be easy.
This fixes current issues with this image:
$ make docker-image-debian-sid
[...]
The following packages have unmet dependencies:
build-essential : Depends: dpkg-dev (>= 1.17.11) but it is not going to be installed
git : Depends: perl but it is not going to be installed
Depends: liberror-perl but it is not going to be installed
pkg-config : Depends: libdpkg-perl but it is not going to be installed
texinfo : Depends: perl (>= 5.26.2-6) but it is not going to be installed
Depends: libtext-unidecode-perl but it is not going to be installed
Depends: libxml-libxml-perl but it is not going to be installed
E: Unable to correct problems, you have held broken packages.
spapr: introduce a new sPAPR IRQ backend supporting XIVE and XICS
The 'dual' sPAPR IRQ backend supports both interrupt mode, XIVE
exploitation mode and the legacy compatibility mode (XICS). both modes
are not supported at the same time.
The machine starts with the legacy mode and a new interrupt mode can
then be negotiated by the CAS process. In this case, the new mode is
activated after a reset to take into account the required changes in
the machine. These impact the device tree layout, the interrupt
presenter object and the exposed MMIO regions in the case of XIVE.
commit 15ed653fa49a ("ppc/xics: An ICS with offset 0 is assumed to be
uninitialized") introduced an extra check on the ICS offset which is
not strictly necessary.
Revert the change to be able to map the XICS IRQ number space on the
XIVE IRQ number space.
The qemu_irq array is now allocated at the machine level using a sPAPR
IRQ set_irq handler depending on the chosen interrupt mode. The use of
this handler is slightly inefficient today but it will become necessary
when the 'dual' interrupt mode is introduced.
pnv/psi: move the ICSState qemu_irq array under the PSI device model
Future changes of the ICSState object will remove the qemu_irq array
from under the interrupt controller model. Prepare ground for the PSI
interrupt sources and introduce a new one directly under the PSI
device model.
To support the 'dual' interrupt mode, XICS and XIVE, we plan to move
the qemu_irq array of each interrupt controller under the machine and
do the allocation under the sPAPR IRQ init method.
spapr: modify the prototype of the cpu_intc_create() method
Today, the interrupt presenter is linked to a CPU using the
cpu_intc_create() method of the sPAPR IRQ backend. The resulting
object is assigned to the PowerPCCPU 'intc' pointer whatever the
interrupt mode, XICS or XIVE.
To support the 'dual' interrupt mode, we will need to distinguish
between the two presenter objects and for that, we plan to introduce a
second interrupt presenter object pointer under the PowerPCCPU. The
modifications below move the assignment of the presenter object under
the cpu_intc_create() method to prepare ground for the future changes.
spapr/xive: simplify the sPAPR IRQ qirq method for XIVE
The qirq routines of the XiveSource and the sPAPRXive model are only
used under the sPAPR IRQ backend. Simplify the overall call stack and
gather all the code under spapr_qirq_xive(). It will ease future
changes.
Michael Roth [Fri, 21 Dec 2018 00:35:30 +0000 (01:35 +0100)]
pci: allow cleanup/unregistration of PCI root buses
This adds cleanup counterparts to pci_register_root_bus(),
pci_root_bus_new(), and pci_bus_irqs().
These cleanup routines are needed in the case of hotpluggable
PCIHostBridge implementations. Currently we can rely on the
object_unparent()'ing of the PCIHostState recursively unparenting
and cleaning up it's child buses, but we need explicit calls
to also:
1) remove the PCIHostState from pci_host_bridges global list.
otherwise, we risk accessing freed memory when we access
the list later
2) clean up memory allocated in pci_bus_irqs()
Both are handled outside the context of any particular bus or
host bridge's init/realize functions, making it difficult to
avoid the need for explicit cleanup functions without remodeling
how PCIHostBridges are created. So keep it simple and just add
them for now.
Thomas Huth [Wed, 2 Jan 2019 15:57:56 +0000 (16:57 +0100)]
MAINTAINERS: Add some missing ppc-related files
hw/gpio/mpc8xxx.c is only used by the e500 machine, so add it there.
And the hw/input/adb* files are specific to the Mac machines, so
they should be assigned to these categories.
target/ppc: move FP and VMX registers into aligned vsr register array
The VSX register array is a block of 64 128-bit registers where the first 32
registers consist of the existing 64-bit FP registers extended to 128-bit
using new VSR registers, and the last 32 registers are the VMX 128-bit
registers as show below:
In order to allow for future conversion of VSX instructions to use TCG vector
operations, recreate the same layout using an aligned version of the existing
vsr register array.
Since the old fpr and avr register arrays are removed, the existing callers
must also be updated to use the correct offset in the vsr register array. This
also includes switching the relevant VMState fields over to using subarrays
to make sure that migration is preserved.
target/ppc: merge ppc_vsr_t and ppc_avr_t union types
Since the VSX registers are actually a superset of the VMX registers then they
can be represented by the same type. Merge ppc_avr_t into ppc_vsr_t and change
ppc_avr_t to be a simple typedef alias.
Note that due to a difference in the naming of the float32 member between
ppc_avr_t and ppc_vsr_t, references to the ppc_avr_t f member must be replaced
with f32 instead.
target/ppc: switch FPR, VMX and VSX helpers to access data directly from cpu_env
Instead of accessing the FPR, VMX and VSX registers through static arrays of
TCGv_i64 globals, remove them and change the helpers to load/store data directly
within cpu_env.
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