Klaus Jensen [Tue, 9 Jun 2020 19:03:32 +0000 (21:03 +0200)]
hw/block/nvme: add msix_qsize parameter
Decouple the requested maximum number of ioqpairs (param max_ioqpairs)
from the number of MSI-X interrupt vectors by introducing a new
msix_qsize parameter and initialize MSI-X with that. This allows
emulating a device that has fewer vectors than I/O queue pairs and also
allows more than 2048 queue pairs. To keep the device behaving as
previously, use a msix_qsize default of 65 (default max_ioqpairs + 1).
This decoupling was actually suggested by Maxim some time ago in a
slightly different context, so adding a Suggested-by.
Klaus Jensen [Tue, 9 Jun 2020 19:03:19 +0000 (21:03 +0200)]
hw/block/nvme: add max_ioqpairs device parameter
The num_queues device paramater has a slightly confusing meaning because
it accounts for the admin queue pair which is not really optional.
Secondly, it is really a maximum value of queues allowed.
Add a new max_ioqpairs parameter that only accounts for I/O queue pairs,
but keep num_queues for compatibility.
Klaus Jensen [Tue, 9 Jun 2020 19:03:18 +0000 (21:03 +0200)]
hw/block/nvme: fix pin-based interrupt behavior
First, since the device only supports MSI-X or pin-based interrupt, if
MSI-X is not enabled, it should not accept interrupt vectors different
from 0 when creating completion queues.
Secondly, the irq_status NvmeCtrl member is meant to be compared to the
INTMS register, so it should only be 32 bits wide. And it is really only
useful when used with multi-message MSI.
Third, since we do not force a 1-to-1 correspondence between cqid and
interrupt vector, the irq_status register should not have bits set
according to cqid, but according to the associated interrupt vector.
Fix these issues, but keep irq_status available so we can easily support
multi-message MSI down the line.
Since the 'num_queues' parameter already accounts for the admin queue,
this should in any case not need to be incremented by one. Also, the
size should be initialized to (0x1000).
This, with the default value of num_queues (64), we will set aside room
for 1 admin queue and 63 I/O queues (4 bytes per doorbell, 2 doorbells
per queue).
Eric Blake [Mon, 8 Jun 2020 19:08:21 +0000 (14:08 -0500)]
qcow2: Tweak comments on qcow2_get_persistent_dirty_bitmap_size
For now, we don't have persistent bitmaps in any other formats, but
that might not be true in the future. Make it obvious that our
incoming parameter is not necessarily a qcow2 image, and therefore is
limited to just the bdrv_dirty_bitmap_* API calls (rather than probing
into qcow2 internals).
Sergio Lopez [Wed, 3 Jun 2020 09:32:40 +0000 (11:32 +0200)]
virtio-blk: On restart, process queued requests in the proper context
On restart, we were scheduling a BH to process queued requests, which
would run before starting up the data plane, leading to those requests
being assigned and started on coroutines on the main context.
This could cause requests to be wrongly processed in parallel from
different threads (the main thread and the iothread managing the data
plane), potentially leading to multiple issues.
For example, stopping and resuming a VM multiple times while the guest
is generating I/O on a virtio_blk device can trigger a crash with a
stack tracing looking like this one:
<------>
Thread 2 (Thread 0x7ff736765700 (LWP 1062503)):
#0 0x00005567a13b99d6 in iov_memset
(iov=0x6563617073206f4e, iov_cnt=1717922848, offset=516096, fillc=0, bytes=7018105756081554803)
at util/iov.c:69
#1 0x00005567a13bab73 in qemu_iovec_memset
(qiov=0x7ff73ec99748, offset=516096, fillc=0, bytes=7018105756081554803) at util/iov.c:530
#2 0x00005567a12f411c in qemu_laio_process_completion (laiocb=0x7ff6512ee6c0) at block/linux-aio.c:86
#3 0x00005567a12f42ff in qemu_laio_process_completions (s=0x7ff7182e8420) at block/linux-aio.c:217
#4 0x00005567a12f480d in ioq_submit (s=0x7ff7182e8420) at block/linux-aio.c:323
#5 0x00005567a12f43d9 in qemu_laio_process_completions_and_submit (s=0x7ff7182e8420)
at block/linux-aio.c:236
#6 0x00005567a12f44c2 in qemu_laio_poll_cb (opaque=0x7ff7182e8430) at block/linux-aio.c:267
#7 0x00005567a13aed83 in run_poll_handlers_once (ctx=0x5567a2b58c70, timeout=0x7ff7367645f8)
at util/aio-posix.c:520
#8 0x00005567a13aee9f in run_poll_handlers (ctx=0x5567a2b58c70, max_ns=16000, timeout=0x7ff7367645f8)
at util/aio-posix.c:562
#9 0x00005567a13aefde in try_poll_mode (ctx=0x5567a2b58c70, timeout=0x7ff7367645f8)
at util/aio-posix.c:597
#10 0x00005567a13af115 in aio_poll (ctx=0x5567a2b58c70, blocking=true) at util/aio-posix.c:639
#11 0x00005567a109acca in iothread_run (opaque=0x5567a2b29760) at iothread.c:75
#12 0x00005567a13b2790 in qemu_thread_start (args=0x5567a2b694c0) at util/qemu-thread-posix.c:519
#13 0x00007ff73eedf2de in start_thread () at /lib64/libpthread.so.0
#14 0x00007ff73ec10e83 in clone () at /lib64/libc.so.6
Thread 1 (Thread 0x7ff743986f00 (LWP 1062500)):
#0 0x00005567a13b99d6 in iov_memset
(iov=0x6563617073206f4e, iov_cnt=1717922848, offset=516096, fillc=0, bytes=7018105756081554803)
at util/iov.c:69
#1 0x00005567a13bab73 in qemu_iovec_memset
(qiov=0x7ff73ec99748, offset=516096, fillc=0, bytes=7018105756081554803) at util/iov.c:530
#2 0x00005567a12f411c in qemu_laio_process_completion (laiocb=0x7ff6512ee6c0) at block/linux-aio.c:86
#3 0x00005567a12f42ff in qemu_laio_process_completions (s=0x7ff7182e8420) at block/linux-aio.c:217
#4 0x00005567a12f480d in ioq_submit (s=0x7ff7182e8420) at block/linux-aio.c:323
#5 0x00005567a12f4a2f in laio_do_submit (fd=19, laiocb=0x7ff5f4ff9ae0, offset=472363008, type=2)
at block/linux-aio.c:375
#6 0x00005567a12f4af2 in laio_co_submit
(bs=0x5567a2b8c460, s=0x7ff7182e8420, fd=19, offset=472363008, qiov=0x7ff5f4ff9ca0, type=2)
at block/linux-aio.c:394
#7 0x00005567a12f1803 in raw_co_prw
(bs=0x5567a2b8c460, offset=472363008, bytes=20480, qiov=0x7ff5f4ff9ca0, type=2)
at block/file-posix.c:1892
#8 0x00005567a12f1941 in raw_co_pwritev
(bs=0x5567a2b8c460, offset=472363008, bytes=20480, qiov=0x7ff5f4ff9ca0, flags=0)
at block/file-posix.c:1925
#9 0x00005567a12fe3e1 in bdrv_driver_pwritev
(bs=0x5567a2b8c460, offset=472363008, bytes=20480, qiov=0x7ff5f4ff9ca0, qiov_offset=0, flags=0)
at block/io.c:1183
#10 0x00005567a1300340 in bdrv_aligned_pwritev
(child=0x5567a2b5b070, req=0x7ff5f4ff9db0, offset=472363008, bytes=20480, align=512, qiov=0x7ff72c0425b8, qiov_offset=0, flags=0) at block/io.c:1980
#11 0x00005567a1300b29 in bdrv_co_pwritev_part
(child=0x5567a2b5b070, offset=472363008, bytes=20480, qiov=0x7ff72c0425b8, qiov_offset=0, flags=0)
at block/io.c:2137
#12 0x00005567a12baba1 in qcow2_co_pwritev_task
(bs=0x5567a2b92740, file_cluster_offset=472317952, offset=487305216, bytes=20480, qiov=0x7ff72c0425b8, qiov_offset=0, l2meta=0x0) at block/qcow2.c:2444
#13 0x00005567a12bacdb in qcow2_co_pwritev_task_entry (task=0x5567a2b48540) at block/qcow2.c:2475
#14 0x00005567a13167d8 in aio_task_co (opaque=0x5567a2b48540) at block/aio_task.c:45
#15 0x00005567a13cf00c in coroutine_trampoline (i0=738245600, i1=32759) at util/coroutine-ucontext.c:115
#16 0x00007ff73eb622e0 in __start_context () at /lib64/libc.so.6
#17 0x00007ff6626f1350 in ()
#18 0x0000000000000000 in ()
<------>
This is also known to cause crashes with this message (assertion
failed):
aio_co_schedule: Co-routine was already scheduled in 'aio_co_schedule'
Sergio Lopez [Wed, 3 Jun 2020 09:32:39 +0000 (11:32 +0200)]
virtio-blk: Refactor the code that processes queued requests
Move the code that processes queued requests from
virtio_blk_dma_restart_bh() to its own, non-static, function. This
will allow us to call it from the virtio_blk_data_plane_start() in a
future patch.
Pavel Dovgalyuk [Wed, 3 Jun 2020 10:22:02 +0000 (13:22 +0300)]
icount: make dma reads deterministic
Windows guest sometimes makes DMA requests with overlapping
target addresses. This leads to the following structure of iov for
the block driver:
addr size1
addr size2
addr size3
It means that three adjacent disk blocks should be read into the same
memory buffer. Windows does not expects anything from these bytes
(should it be data from the first block, or the last one, or some mix),
but uses them somehow. It leads to non-determinism of the guest execution,
because block driver does not preserve any order of reading.
This situation was discusses in the mailing list at least twice:
https://lists.gnu.org/archive/html/qemu-devel/2010-09/msg01996.html
https://lists.gnu.org/archive/html/qemu-devel/2020-02/msg05185.html
This patch makes such disk reads deterministic in icount mode.
It splits the whole request into several parts. Parts may overlap,
but SGs inside one part do not overlap.
Parts that are processed later overwrite the prior ones in case
of overlapping.
Examples for different SG part sequences:
1)
A1 1000
A2 1000
A1 1000
A3 1000
->
One request is split into two.
A1 1000
A2 1000
--
A1 1000
A3 1000
Peter Maydell [Tue, 16 Jun 2020 13:57:15 +0000 (14:57 +0100)]
Merge remote-tracking branch 'remotes/stsquad/tags/pull-testing-and-plugin-160620-2' into staging
Testing and plugin updates
- clear up dtc warnings
- add support for --enable-tsan builds
- re-enable shippable cross builds
- serialise cirrus check steps
- fix check-tcg plugin issues
- add lockstep plugin
# gpg: Signature made Tue 16 Jun 2020 14:50:09 BST
# gpg: using RSA key 6685AE99E75167BCAFC8DF35FBD0DB095A9E2A44
# gpg: Good signature from "Alex Bennée (Master Work Key) <[email protected]>" [full]
# Primary key fingerprint: 6685 AE99 E751 67BC AFC8 DF35 FBD0 DB09 5A9E 2A44
* remotes/stsquad/tags/pull-testing-and-plugin-160620-2: (21 commits)
plugins: new lockstep plugin for debugging TCG changes
tests/tcg: ensure -cpu max also used for plugin run
tests/tcg: build plugin list from contents of src directory
cirrus.yml: serialise make check
Revert ".shippable: temporaily disable some cross builds"
tests: Disable select tests under TSan, which hit TSan issue.
docs: Added details on TSan to testing.rst
util: Added tsan annotate for thread name.
include/qemu: Added tsan.h for annotations.
tests/docker: Added docker build support for TSan.
thread: add tsan annotations to QemuSpin
translate-all: call qemu_spin_destroy for PageDesc
tcg: call qemu_spin_destroy for tb->jmp_lock
qht: call qemu_spin_destroy for head buckets
cputlb: destroy CPUTLB with tlb_destroy
thread: add qemu_spin_destroy
cpu: convert queued work to a QSIMPLEQ
configure: add --enable-tsan flag + fiber annotations for coroutine-ucontext
Makefile: remove old compatibility gunks
Makefile: dtc: update, build the libfdt target
...
Alex Bennée [Wed, 10 Jun 2020 15:55:05 +0000 (16:55 +0100)]
plugins: new lockstep plugin for debugging TCG changes
When we make changes to the TCG we sometimes cause regressions that
are deep into the execution cycle of the guest. Debugging this often
requires comparing large volumes of trace information to figure out
where behaviour has diverged.
The lockstep plugin utilises a shared socket so two QEMU's running
with the plugin will write their current execution position and wait
to receive the position of their partner process. When execution
diverges the plugins output where they were and the previous few
blocks before unloading themselves and letting execution continue.
Originally I planned for this to be most useful with -icount but it
turns out you can get divergence pretty quickly due to asynchronous
qemu_cpu_kick_rr_cpus() events causing one side to eventually run into
a short block a few cycles before the other side. For this reason I've
added a bit of tracking and I think the divergence reporting could be
finessed to report only if we really start to diverge in execution.
Alex Bennée [Mon, 15 Jun 2020 14:19:22 +0000 (15:19 +0100)]
tests/tcg: ensure -cpu max also used for plugin run
The check-tcg plugins build was failing because some special case
tests that needed -cpu max failed because the plugin variant hadn't
carried across the QEMU_OPTS tweak.
Guests which globally set QEMU_OPTS=-cpu FOO where unaffected.
Alex Bennée [Mon, 15 Jun 2020 14:19:21 +0000 (15:19 +0100)]
tests/tcg: build plugin list from contents of src directory
If you jump back and forth between branches while developing plugins
you end up debugging failures caused by plugins left in the build
directory. Fix this by basing plugins on the source tree instead.
Robert Foley [Fri, 12 Jun 2020 19:02:34 +0000 (20:02 +0100)]
docs: Added details on TSan to testing.rst
Adds TSan details to testing.rst.
This includes background and reference details on TSan,
and details on how to build and test with TSan
both with and without docker.
Robert Foley [Fri, 12 Jun 2020 19:02:32 +0000 (20:02 +0100)]
include/qemu: Added tsan.h for annotations.
These annotations will allow us to give tsan
additional hints. For example, we can inform
tsan about reads/writes to ignore to silence certain
classes of warnings.
We can also annotate threads so that the proper thread
naming shows up in tsan warning results.
Robert Foley [Fri, 12 Jun 2020 19:02:31 +0000 (20:02 +0100)]
tests/docker: Added docker build support for TSan.
Added a new docker for ubuntu 20.04.
This docker has support for Thread Sanitizer
including one patch we need in one of the header files.
https://github.com/llvm/llvm-project/commit/a72dc86cd
This command will build with tsan enabled:
make docker-test-tsan-ubuntu2004 V=1
Also added the TSAN suppresion file to disable certain
cases of TSAN warnings.
Lingfeng Yang [Fri, 12 Jun 2020 19:02:23 +0000 (20:02 +0100)]
configure: add --enable-tsan flag + fiber annotations for coroutine-ucontext
We tried running QEMU under tsan in 2016, but tsan's lack of support for
longjmp-based fibers was a blocker:
https://groups.google.com/forum/#!topic/thread-sanitizer/se0YuzfWazw
Fortunately, thread sanitizer gained fiber support in early 2019:
https://reviews.llvm.org/D54889
This patch brings tsan support upstream by importing the patch that annotated
QEMU's coroutines as tsan fibers in Android's QEMU fork:
https://android-review.googlesource.com/c/platform/external/qemu/+/844675
Tested with '--enable-tsan --cc=clang-9 --cxx=clang++-9 --disable-werror'
configure flags.
Claudio Fontana [Fri, 12 Jun 2020 19:02:21 +0000 (20:02 +0100)]
Makefile: dtc: update, build the libfdt target
dtc submodule update, now call the libfdt target from the new
dtc Makefile, which has been changed to not require bison, flex, etc.
This removes warnings during the build.
scripts/ symlink and tests directory creation are not necessary,
and neither is calling the clean rule explicitly.
Peter Maydell [Tue, 16 Jun 2020 12:36:31 +0000 (13:36 +0100)]
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20200616' into staging
* hw: arm: Set vendor property for IMX SDHCI emulations
* sd: sdhci: Implement basic vendor specific register support
* hw/net/imx_fec: Convert debug fprintf() to trace events
* target/arm/cpu: adjust virtual time for all KVM arm cpus
* Implement configurable descriptor size in ftgmac100
* hw/misc/imx6ul_ccm: Implement non writable bits in CCM registers
* target/arm: More Neon decodetree conversion work
* remotes/armbru/tags/pull-qom-2020-06-15: (84 commits)
MAINTAINERS: Make section QOM cover hw/core/*bus.c as well
qdev: qdev_init_nofail() is now unused, drop
qdev: Convert bus-less devices to qdev_realize() with Coccinelle
qdev: Use qdev_realize() in qdev_device_add()
qdev: Make qdev_realize() support bus-less devices
s390x/event-facility: Simplify creation of SCLP event devices
microbit: Eliminate two local variables in microbit_init()
sysbus: sysbus_init_child_obj() is now unused, drop
sysbus: Convert qdev_set_parent_bus() use with Coccinelle, part 4
sysbus: Convert qdev_set_parent_bus() use with Coccinelle, part 3
sysbus: Convert qdev_set_parent_bus() use with Coccinelle, part 2
sysbus: Convert qdev_set_parent_bus() use with Coccinelle, part 1
qdev: Drop qdev_realize() support for null bus
sysbus: Convert to sysbus_realize() etc. with Coccinelle
sysbus: New sysbus_realize(), sysbus_realize_and_unref()
sysbus: Tidy up sysbus_init_child_obj()'s @childsize arg, part 2
hw/arm/armsse: Pass correct child size to sysbus_init_child_obj()
sysbus: Tidy up sysbus_init_child_obj()'s @childsize arg, part 1
microbit: Tidy up sysbus_init_child_obj() @child argument
sysbus: Drop useless OBJECT() in sysbus_init_child_obj() calls
...
fangying [Tue, 16 Jun 2020 09:32:29 +0000 (10:32 +0100)]
target/arm/cpu: adjust virtual time for all KVM arm cpus
Virtual time adjustment was implemented for virt-5.0 machine type,
but the cpu property was enabled only for host-passthrough and max
cpu model. Let's add it for any KVM arm cpu which has the generic
timer feature enabled.
Peter Maydell [Tue, 16 Jun 2020 09:32:28 +0000 (10:32 +0100)]
target/arm: Convert Neon VDUP (scalar) to decodetree
Convert the Neon VDUP (scalar) insn to decodetree. (Note that we
can't call this just "VDUP" as we used that already in vfp.decode for
the "VDUP (general purpose register" insn.)
Peter Maydell [Tue, 16 Jun 2020 09:32:28 +0000 (10:32 +0100)]
target/arm: Convert Neon VTBL, VTBX to decodetree
Convert the Neon VTBL, VTBX instructions to decodetree. The actual
implementation of the insn is copied across to the new trans function
unchanged except for renaming 'tmp5' to 'tmp4'.
Peter Maydell [Tue, 16 Jun 2020 09:32:28 +0000 (10:32 +0100)]
target/arm: Convert Neon VEXT to decodetree
Convert the Neon VEXT insn to decodetree. Rather than keeping the
old implementation which used fixed temporaries cpu_V0 and cpu_V1
and did the extraction with by-hand shift and logic ops, we use
the TCG extract2 insn.
We don't need to special case 0 or 8 immediates any more as the
optimizer is smart enough to throw away the dead code.
Peter Maydell [Tue, 16 Jun 2020 09:32:27 +0000 (10:32 +0100)]
target/arm: Convert Neon 2-reg-scalar float multiplies to decodetree
Convert the float versions of VMLA, VMLS and VMUL in the Neon
2-reg-scalar group to decodetree.
Signed-off-by: Peter Maydell <[email protected]>
---
As noted in the comment on the WRAP_FP_FN macro, we could have
had a do_2scalar_fp() function, but for 3 insns it seemed
simpler to just do the wrapping to get hold of the fpstatus ptr.
(These are the only fp insns in the group.) Reviewed-by: Richard Henderson <[email protected]>
Peter Maydell [Tue, 16 Jun 2020 09:32:27 +0000 (10:32 +0100)]
target/arm: Convert Neon 2-reg-scalar integer multiplies to decodetree
Convert the VMLA, VMLS and VMUL insns in the Neon "2 registers and a
scalar" group to decodetree. These are 32x32->32 operations where
one of the inputs is the scalar, followed by a possible accumulate
operation of the 32-bit result.
The refactoring removes some of the oddities of the old decoder:
* operands to the operation and accumulation were often
reversed (taking advantage of the fact that most of these ops
are commutative); the new code follows the pseudocode order
* the Q bit in the insn was in a local variable 'u'; in the
new code it is decoded into a->q
Peter Maydell [Tue, 16 Jun 2020 09:32:25 +0000 (10:32 +0100)]
target/arm: Convert Neon 3-reg-diff VABAL, VABDL to decodetree
Convert the Neon 3-reg-diff insns VABAL and VABDL to decodetree.
Like almost all the remaining insns in this group, these are
a combination of a two-input operation which returns a double width
result and then a possible accumulation of that double width
result into the destination.
Peter Maydell [Tue, 16 Jun 2020 09:32:25 +0000 (10:32 +0100)]
target/arm: Convert Neon 3-reg-diff prewidening ops to decodetree
Convert the "pre-widening" insns VADDL, VSUBL, VADDW and VSUBW
in the Neon 3-registers-different-lengths group to decodetree.
These insns work by widening one or both inputs to double their
size, performing an add or subtract at the doubled size and
then storing the double-size result.
As usual, rather than copying the loop of the original decoder
(which needs awkward code to avoid problems when source and
destination registers overlap) we just unroll the two passes.
Peter Maydell [Tue, 16 Jun 2020 09:06:57 +0000 (10:06 +0100)]
Merge remote-tracking branch 'remotes/huth-gitlab/tags/pull-request-2020-06-16' into staging
* Latest fuzzer patches from Alexander
* Fixes for the qtest bios-tables-test
* LGPL information cleanup in qtest code
* sh4 acceptance test
* Improved submodule handling for the s390x CI test
s390x/event-facility: Simplify creation of SCLP event devices
init_event_facility() creates the SCLP events bus with two SCLP event
devices (sclpquiesce and sclp-cpu-hotplug). It leaves the devices
unrealized. A comment explains they will be realized "via the bus".
The bus's realize method sclp_events_bus_realize() indeed realizes all
unrealized devices on this bus. It carries a TODO comment claiming
this "has to be done in common code". No other bus realize method
realizes its devices.
The common code in question is bus_set_realized(), which has a TODO
comment asking for recursive realization. It's been asking for years.
The only devices sclp_events_bus_realize() will ever realize are the
two init_event_facility() puts there.
Simplify as follows:
* Make the devices members of the event facility instance struct, just
like the bus. object_initialize_child() is simpler than
object_property_add_child() and object_unref().
* Realize them in the event facility realize method.
This is in line with how such things are done elsewhere.
sysbus: Convert qdev_set_parent_bus() use with Coccinelle, part 4
This is still the same transformation as in the previous commits, but
here the sysbus_init_child_obj() and its matching realize in are in
separate files. Fortunately, there's just one realize left to
convert.
sysbus: Convert qdev_set_parent_bus() use with Coccinelle, part 3
These are init/realize pairs produced by the previous commit's
Coccinelle script where the argument test doesn't quite match. They
need even more careful review.
sysbus: Convert qdev_set_parent_bus() use with Coccinelle, part 2
This is the same transformation as in the previous commit, except
sysbus_init_child_obj() and realize are too separated for the commit's
Coccinelle script to handle, typically because sysbus_init_child_obj()
is in a device's instance_init() method, and the matching realize is
in its realize() method.
Perhaps a Coccinelle wizard could make it transform that pattern, but
I'm just a bungler, and the best I can do is transforming the two
separate parts separately:
@@
expression errp;
expression child;
symbol true;
@@
- object_property_set_bool(OBJECT(child), true, "realized", errp);
+ sysbus_realize(SYS_BUS_DEVICE(child), errp);
// only correct with a matching sysbus_init_child_obj() transformation!
@@
expression errp;
expression child;
symbol true;
@@
- object_property_set_bool(child, true, "realized", errp);
+ sysbus_realize(SYS_BUS_DEVICE(child), errp);
// only correct with a matching sysbus_init_child_obj() transformation!
@@
expression child;
@@
- qdev_init_nofail(DEVICE(child));
+ sysbus_realize(SYS_BUS_DEVICE(child), &error_fatal);
// only correct with a matching sysbus_init_child_obj() transformation!
@@
expression child;
expression dev;
@@
dev = DEVICE(child);
...
- qdev_init_nofail(dev);
+ sysbus_realize(SYS_BUS_DEVICE(dev), &error_fatal);
// only correct with a matching sysbus_init_child_obj() transformation!
@@
expression child;
identifier dev;
@@
DeviceState *dev = DEVICE(child);
...
- qdev_init_nofail(dev);
+ sysbus_realize(SYS_BUS_DEVICE(dev), &error_fatal);
// only correct with a matching sysbus_init_child_obj() transformation!
This script is *unsound*: we need to manually verify init and realize
conversions are properly paired.
This commit has only the pairs where object_initialize_child()'s
@child and sysbus_realize()'s @dev argument text match exactly within
the same source file.
Note that Coccinelle chokes on ARMSSE typedef vs. macro in
hw/arm/armsse.c. Worked around by temporarily renaming the macro for
the spatch run.
sysbus: Convert qdev_set_parent_bus() use with Coccinelle, part 1
I'm converting from qdev_set_parent_bus()/realize to qdev_realize();
recent commit "qdev: Convert uses of qdev_set_parent_bus() with
Coccinelle" explains why.
sysbus_init_child_obj() is a wrapper around
object_initialize_child_with_props() and qdev_set_parent_bus(). It
passes no properties.
Convert sysbus_init_child_obj()/realize to object_initialize_child()/
qdev_realize().
sysbus: New sysbus_realize(), sysbus_realize_and_unref()
Sysbus devices almost always plug into the main system bus.
qdev_create() even has a convenience feature to make that easy: a null
bus argument gets replaced by the main system bus. qdev_realize() and
qdev_realize_and_unref() do the same.
We can do better. Provide convenience wrappers around qdev_realize()
and qdev_realize_and_unref() that don't take a @bus argument. They
always pass the main system bus.
sysbus: Tidy up sysbus_init_child_obj()'s @childsize arg, part 2
The callers of sysbus_init_child_obj() commonly pass either &child,
sizeof(child), or pchild, sizeof(*pchild). Tidy up the few that use
something else instead, mostly to keep future commits simpler.
hw/arm/armsse: Pass correct child size to sysbus_init_child_obj()
armsse_init() initializes s->armv7m[i] for all i. It passes the size
of the entire array instead of the array element to
sysbus_init_child_obj(). Harmless, but fix it anyway.
sysbus: Tidy up sysbus_init_child_obj()'s @childsize arg, part 1
The callers of sysbus_init_child_obj() commonly pass either &child,
sizeof(child), or pchild, sizeof(*pchild). Tidy up the few that use
sizeof(child_type) instead, mostly to keep future commits simpler.
microbit: Tidy up sysbus_init_child_obj() @child argument
The callers of sysbus_init_child_obj() commonly pass either &child,
sizeof(child), or pchild, sizeof(*pchild). Tidy up two that don't,
mostly to keep future commits simpler.
macio_init_child_obj() has become a trivial wrapper around
object_initialize_child_with_props(). Eliminate it, since the general
convenience wrapper object_initialize_child() is just as convenient
already.
All users of object_initialize_child() pass the obvious child size
argument. Almost all pass &error_abort and no properties. Tiresome.
Rename object_initialize_child() to
object_initialize_child_with_props() to free the name. New
convenience wrapper object_initialize_child() automates the size
argument, and passes &error_abort and no properties.
Rename object_initialize_childv() to
object_initialize_child_with_propsv() for consistency.
projects / qemu.git / log