From: Peter Maydell Date: Mon, 27 Jun 2016 14:46:32 +0000 (+0100) Subject: Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20160627' into... X-Git-Url: https://repo.jachan.dev/qemu.git/commitdiff_plain/f12103afaa28b473515ccfcb66c2b42d6d057af0 Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20160627' into staging target-arm queue: * arm_gicv3: add missing 'break' statements * cadence_uart: protect against transmit errors * cadence_gem: avoid infinite loops with misconfigured buffer * cadence_gem: set the 'last' bit when 'wrap' is set * reenable tmp105 test case * palmetto-bmc: add ASPEED system control unit model * m25p80: add new 512Mbit and 1Gbit devices # gpg: Signature made Mon 27 Jun 2016 15:43:42 BST # gpg: using RSA key 0x3C2525ED14360CDE # gpg: Good signature from "Peter Maydell " # gpg: aka "Peter Maydell " # gpg: aka "Peter Maydell " # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * remotes/pmaydell/tags/pull-target-arm-20160627: m25p80: Fix WINBOND fast read command handling m25p80: New flash devices. m25p80: Fast read commands family changes. m25p80: Introduce configuration registers. m25p80: Introduce quad and equad modes. m25p80: Add additional flash commands: m25p80: Introduce COLLECTING_VAR_LEN_DATA state. m25p80: Allow more than four banks. m25p80: Make a table for JEDEC ID. m25p80: Replace JEDEC ID masking with function. palmetto-bmc: Configure the SCU's hardware strapping register ast2400: Integrate the SCU model and set silicon revision hw/misc: Add a model for the ASPEED System Control Unit arm: Re-enable tmp105 test cadence_gem: Set the last bit when wrap is set cadence_gem: Avoid infinite loops with a misconfigured buffer cadence_uart: Protect against transmit errors hw/intc/arm_gicv3: Add missing break Signed-off-by: Peter Maydell --- f12103afaa28b473515ccfcb66c2b42d6d057af0