From: Matt Craighead <mjcraighead@gmail.com>
Date: Thu, 10 May 2012 12:56:08 +0000 (+0000)
Subject: target-arm: When setting FPSCR.QC, don't clear other FPSCR bits
X-Git-Url: https://repo.jachan.dev/qemu.git/commitdiff_plain/7e598de023e4f3f612be7f16acea2ec5dac010ec

target-arm: When setting FPSCR.QC, don't clear other FPSCR bits

This patch fixes a bug affecting a variety of Neon instructions, such as
VQADD.

Signed-off-by: Matt Craighead <mjcraighead@gmail.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---

diff --git a/target-arm/neon_helper.c b/target-arm/neon_helper.c
index 1e02d61bdc..e0b9dbf67e 100644
--- a/target-arm/neon_helper.c
+++ b/target-arm/neon_helper.c
@@ -16,7 +16,7 @@
 #define SIGNBIT (uint32_t)0x80000000
 #define SIGNBIT64 ((uint64_t)1 << 63)
 
-#define SET_QC() env->vfp.xregs[ARM_VFP_FPSCR] = CPSR_Q
+#define SET_QC() env->vfp.xregs[ARM_VFP_FPSCR] |= CPSR_Q
 
 #define NEON_TYPE1(name, type) \
 typedef struct \