Implement the following AMD command-set parallel flash functionality:
- nonuniform sector sizes;
- erase suspend/resume commands; and
- multi-sector erase.
# gpg: Signature made Tue 02 Jul 2019 01:54:33 BST
# gpg: using RSA key
E3E32C2CDEADC0DE
# gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <
[email protected]>" [full]
# Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE
* remotes/philmd-gitlab/tags/pflash-next-
20190701: (27 commits)
hw/block/pflash_cfi02: Reduce I/O accesses to 16-bit
hw/block/pflash_cfi02: Document commands
hw/block/pflash_cfi02: Use chip erase time specified in the CFI table
hw/block/pflash_cfi02: Implement erase suspend/resume
hw/block/pflash_cfi02: Implement multi-sector erase
hw/block/pflash_cfi02: Fix reset command not ignored during erase
hw/block/pflash_cfi02: Fix CFI in autoselect mode
hw/block/pflash_cfi02: Split if() condition
hw/block/pflash_cfi02: Extract pflash_regions_count()
hw/block/pflash_cfi02: Implement nonuniform sector sizes
hw/block/pflash_cfi02: Document 'Page Mode' operations are not supported
hw/block/pflash_cfi02: Hold the PRI table offset in a variable
hw/block/pflash_cfi02: Document the current CFI values
hw/block/pflash_cfi02: Remove pointless local variable
tests/pflash-cfi02: Refactor to support testing multiple configurations
hw/block/pflash_cfi02: Fix command address comparison
hw/block/pflash_cfi02: Unify the MemoryRegionOps
hw/block/pflash_cfi02: Extract the pflash_data_read() function
hw/block/pflash_cfi02: Use the ldst API in pflash_read()
hw/block/pflash_cfi02: Use the ldst API in pflash_write()
...
Signed-off-by: Peter Maydell <[email protected]>