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target-xtensa: implement ATOMCTL SR
authorMax Filippov <[email protected]>
Wed, 5 Dec 2012 03:15:20 +0000 (07:15 +0400)
committerBlue Swirl <[email protected]>
Sat, 8 Dec 2012 18:48:26 +0000 (18:48 +0000)
commitfcc803d119a4c01a9b0ee5bda35fda1eeabffa33
treebbd6697bd198b45b2322e5b43d3ab5159e093d98tree | snapshot
parent536b558f5896ebbd635b57fa393e82faaa32ad52commit | diff
target-xtensa: implement ATOMCTL SR

ATOMCTL SR controls s32c1i opcode behavior depending on targeted memory
type. See ISA, 4.3.12.4 for details.

Signed-off-by: Max Filippov <[email protected]>
Signed-off-by: Blue Swirl <[email protected]>
target-xtensa/cpu.c diff | blob | blame | history
target-xtensa/cpu.h diff | blob | blame | history
target-xtensa/helper.c diff | blob | blame | history
target-xtensa/helper.h diff | blob | blame | history
target-xtensa/op_helper.c diff | blob | blame | history
target-xtensa/overlay_tool.h diff | blob | blame | history
target-xtensa/translate.c diff | blob | blame | history
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