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(parent: e340325) | patch
ppc: fix MSR_ME handling for system reset interrupt
authorNicholas Piggin <[email protected]>
Thu, 20 Oct 2016 06:59:10 +0000 (17:59 +1100)
committerDavid Gibson <[email protected]>
Thu, 27 Oct 2016 22:36:58 +0000 (09:36 +1100)
commitf85bcec31ee578eccf6182be158d6ac6d9b90a4c
tree567e904942415e82c526d49bb4cfffbb30d86cbatree | snapshot
parente3403258a20c61859ca1917bb86bc206e5846784commit | diff
ppc: fix MSR_ME handling for system reset interrupt

Power ISA specifies ME bit handling for system reset interrupt:

    if the interrupt occurred while the thread was in power-saving
    mode, set to 1; otherwise not altered

Power ISA 3.0, section 6.5 "Interrupt Definitions", Figure 64.

Signed-off-by: Nicholas Piggin <[email protected]>
Reviewed-by: Greg Kurz <[email protected]>
Reviewed-by: Cédric Le Goater <[email protected]>
Signed-off-by: David Gibson <[email protected]>
target-ppc/excp_helper.c diff | blob | blame | history
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