]> Git Repo - qemu.git/commit
target/riscv: Add basic vmstate description of CPU
authorYifei Jiang <[email protected]>
Mon, 26 Oct 2020 11:55:26 +0000 (19:55 +0800)
committerAlistair Francis <[email protected]>
Tue, 3 Nov 2020 15:17:23 +0000 (07:17 -0800)
commitf7697f0e629eb75d411bc6f314c6fff68fa4c238
tree51da5a47ea36ea88aa2b44799b6ab2eab912a0a0
parent284d697c74ef3f4210cbccc5cd6b4894740e4ab3
target/riscv: Add basic vmstate description of CPU

Add basic CPU state description to the newly created machine.c

Signed-off-by: Yifei Jiang <[email protected]>
Signed-off-by: Yipeng Yin <[email protected]>
Reviewed-by: Alistair Francis <[email protected]>
Message-id: 20201026115530[email protected]
Signed-off-by: Alistair Francis <[email protected]>
target/riscv/cpu.c
target/riscv/internals.h
target/riscv/machine.c [new file with mode: 0644]
target/riscv/meson.build
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