]> Git Repo - qemu.git/commit
sabre: increase number of PCI bus IRQs from 32 to 64
authorMark Cave-Ayland <[email protected]>
Sun, 11 Oct 2020 08:13:47 +0000 (09:13 +0100)
committerMark Cave-Ayland <[email protected]>
Wed, 28 Oct 2020 07:59:26 +0000 (07:59 +0000)
commitef905eff421c5a06a01714e11ed67a92e4e7a9f1
tree76f94ac6d611556b66592cb779a2ed0a117eb27b
parentae5643ecc672ca2f3716359e1bb9b5ce52c1518c
sabre: increase number of PCI bus IRQs from 32 to 64

The rework of the sabre IRQs in commit 6864fa3897 "sun4u: update PCI topology to
include simba PCI bridges" changed the IRQ routing so that both PCI and legacy
OBIO IRQs are routed through the sabre PCI host bridge to the CPU.

Unfortunately this commit failed to increase the number of PCI bus IRQs
accordingly meaning that access to the legacy IRQs OBIO (irqnum >= 0x20) would
overflow the PCI bus IRQ array causing strange failures running qemu-system-sparc64
in NetBSD.

Cc: [email protected]
Reported-by: Harold Gutch <[email protected]>
Fixes: https://bugs.launchpad.net/qemu/+bug/1838658
Fixes: 6864fa3897 ("sun4u: update PCI topology to include simba PCI bridges")
Signed-off-by: Mark Cave-Ayland <[email protected]>
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Message-Id: <20201011081347[email protected]>
Signed-off-by: Mark Cave-Ayland <[email protected]>
hw/pci-host/sabre.c
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