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hw/openrisc: Fix masking in openrisc_pic_cpu_handler()
authorJia Liu <[email protected]>
Wed, 21 Aug 2013 01:23:10 +0000 (09:23 +0800)
committerJia Liu <[email protected]>
Wed, 21 Aug 2013 01:23:10 +0000 (09:23 +0800)
commited396e2b2d256c1628de7c11841b509455a76c03
tree02910fd93a6b2ceb9d688a70375578c9bf7ae9ebtree | snapshot
parentb6d9766ddf5453e79e0c66c9348728ba44ba115fcommit | diff
hw/openrisc: Fix masking in openrisc_pic_cpu_handler()

Consider the masking of PICSR and PICMR:

    ((cpu->env.picsr && (1 << i)) && (cpu->env.picmr && (1 << i)))

To correctly mask bits, we should use the bitwise AND "&" rather than
the logical AND "&&".  Also, the loop is not necessary for masking.
Simply use (cpu->env.picsr & cpu->env.picmr).

Signed-off-by: Xi Wang <[email protected]>
Acked-by: Jia Liu <[email protected]>
hw/openrisc/pic_cpu.c diff | blob | blame | history
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