target-mips: simplify LWL/LDL mask generation

target-mips: simplify LWL/LDL mask generation

The LWL/LDL instructions mask the GPR with a mask depending on the
address alignement. It is currently computed by doing:

    mask = 0x7fffffffffffffffull >> (t1 ^ 63)

It's simpler to generate it by doing:

    mask = ~(-1 << t1)

It uses one TCG instruction less, and it avoids a 32/64-bit constant
loading which can take a few instructions on RISC hosts.

Cc: Leon Alrae <[email protected]>
Signed-off-by: Aurelien Jarno <[email protected]>
Reviewed-by: Richard Henderson <[email protected]>
Reviewed-by: Leon Alrae <[email protected]>
Signed-off-by: Leon Alrae <[email protected]>