Git Repo - qemu.git/commit - target-xtensa/translate.c

]> Git Repo - qemu.git/commit - target-xtensa/translate.c

author	Max Filippov <[email protected]>
	Fri, 7 Feb 2014 11:57:22 +0000 (15:57 +0400)
committer	Max Filippov <[email protected]>
	Mon, 24 Feb 2014 00:47:01 +0000 (04:47 +0400)
commit	e848dd4248230c0463841a16d1fa9eb054a2d211
tree	73d214173bd6e72b4e9c9e9237a18e0c19f91d28	tree \| snapshot
parent	7c84259019a945e4ff275994b96c0de4496d2a5e	commit \| diff

target-xtensa: add basic checks to icache opcodes

Check privilege level for privileged instructions (IHU, III, IIU and IPFL
are privileged), memory accessibility for instructions that reference memory
(IH* and IPFL) and windowed register validity for all instruction cache
instructions.

Signed-off-by: Max Filippov <[email protected]>

target-xtensa/helper.h		diff \| blob \| blame \| history
target-xtensa/op_helper.c		diff \| blob \| blame \| history
target-xtensa/translate.c		diff \| blob \| blame \| history

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