mips: Set the CP0.Config3.DSP and CP0.Config3.DSP2P bits

mips: Set the CP0.Config3.DSP and CP0.Config3.DSP2P bits

Set the CP0.Config3.DSP2P bit for the 74kf processor and both that bit
and the CP0.Config3.DSP bit for the artificial mips32r5-generic and
mips64dspr2 processors.  They have the DSPr2 ASE enabled in `insn_flags'
and CPUs that implement that ASE need to have both CP0.Config3.DSP and
CP0.Config3.DSP2P set or software won't detect its presence.

Signed-off-by: Maciej W. Rozycki <[email protected]>
Reviewed-by: Leon Alrae <[email protected]>
[[email protected]: remove DSP flags from mips32r5-generic]
Signed-off-by: Leon Alrae <[email protected]>