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target-arm: implement IRQ/FIQ routing to Monitor mode
authorFabian Aggeler <[email protected]>
Thu, 11 Dec 2014 12:07:49 +0000 (12:07 +0000)
committerPeter Maydell <[email protected]>
Thu, 11 Dec 2014 12:07:49 +0000 (12:07 +0000)
commitde38d23b542efca54108ef28bcc0efe96f378d2e
tree0200b535c25b5684cc7a8cddccfdaff1cc574f99tree | snapshot
parent0f1a3b2470d798ad5335eb9d6236f02ff64e31a8commit | diff
target-arm: implement IRQ/FIQ routing to Monitor mode

SCR.{IRQ/FIQ} bits allow to route IRQ/FIQ exceptions to monitor CPU
mode. When taking IRQ exception to monitor mode FIQ exception is
additionally masked.

Signed-off-by: Sergey Fedorov <[email protected]>
Signed-off-by: Fabian Aggeler <[email protected]>
Signed-off-by: Greg Bellows <[email protected]>
Reviewed-by: Peter Maydell <[email protected]>
Message-id: 1416242878[email protected]
Signed-off-by: Peter Maydell <[email protected]>
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