]> Git Repo - qemu.git/commit - target/arm/translate-a64.c
target-arm: Eliminate unnecessary zero-extend in disas_bitfield
authorRichard Henderson <[email protected]>
Mon, 14 Sep 2015 13:39:48 +0000 (14:39 +0100)
committerPeter Maydell <[email protected]>
Mon, 14 Sep 2015 13:39:48 +0000 (14:39 +0100)
commitd3a77b42decd0cbfa62a5526e67d1d6d380c83a9
tree8843bb7b57d6377659e9426aeebee10cc6ce94dd
parent9924e85829fe21b5f38a5d267c9aea44c5d478ac
target-arm: Eliminate unnecessary zero-extend in disas_bitfield

For !SF, this initial ext32u can't be optimized away by the
current TCG code generator.  (It would require backward bit
liveness propagation.)

But since the range of bits for !SF are already constrained by
unallocated_encoding, we'll never reference the high bits anyway.

Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Richard Henderson <[email protected]>
Message-id: 1441909103[email protected]
Signed-off-by: Peter Maydell <[email protected]>
target-arm/translate-a64.c
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