Git Repo - qemu.git/commit - hw/i386/intel

]> Git Repo - qemu.git/commit - hw/i386/intel_iommu.c

author	Qi, Yadong <[email protected]>
	Mon, 25 Nov 2019 00:33:20 +0000 (08:33 +0800)
committer	Michael S. Tsirkin <[email protected]>
	Mon, 25 Nov 2019 08:42:58 +0000 (03:42 -0500)
commit	ce586f3b8d2105657981a1a43107fe7c5374b280
tree	fe585c9b7a827185a8f427f82375cd9e21c5e561	tree \| snapshot
parent	509ec36c1e4c559e90115a16403dea8d92dff335	commit \| diff

intel_iommu: refine SL-PEs reserved fields checking

1. split the resevred fields arrays into two ones,
2. large page only effect for L2(2M) and L3(1G), so
remove checking of L1 and L4 for large page.

Signed-off-by: Zhang, Qi <[email protected]>
Signed-off-by: Qi, Yadong <[email protected]>
Message-Id: <20191125003321 [email protected]>
Reviewed-by: Peter Xu <[email protected]>
Reviewed-by: Michael S. Tsirkin <[email protected]>
Signed-off-by: Michael S. Tsirkin <[email protected]>

hw/i386/intel_iommu.c		diff \| blob \| blame \| history
hw/i386/intel_iommu_internal.h		diff \| blob \| blame \| history

Empty description

RSS Atom

This page took 0.024491 seconds and 4 git commands to generate.