]> Git Repo - qemu.git/commit
hw/riscv: Replace global smp variables with machine smp properties
authorLike Xu <[email protected]>
Sat, 18 May 2019 20:54:23 +0000 (04:54 +0800)
committerEduardo Habkost <[email protected]>
Fri, 5 Jul 2019 20:07:42 +0000 (17:07 -0300)
commitc447312747aae02298333e61e1ede0793cda47d8
treee09a9406334254a9cb75506c8eb2da4fe30e3c2a
parentfe6b6346e997ff2ecef1e69a0ab9b1e521b68003
hw/riscv: Replace global smp variables with machine smp properties

The global smp variables in riscv are replaced with smp machine properties.

A local variable of the same name would be introduced in the declaration
phase if it's used widely in the context OR replace it on the spot if it's
only used once. No semantic changes.

Signed-off-by: Like Xu <[email protected]>
Message-Id: <20190518205428[email protected]>
Reviewed-by: Alistair Francis <[email protected]>
[ehabkost: fix spike_board_init()]
[ehabkost: fix riscv_sifive_e_soc_init()]
Signed-off-by: Eduardo Habkost <[email protected]>
hw/riscv/sifive_e.c
hw/riscv/sifive_plic.c
hw/riscv/sifive_u.c
hw/riscv/spike.c
hw/riscv/virt.c
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