]> Git Repo - qemu.git/commit - target/i386/translate.c
target-i386: Fix SMSW for 64-bit mode
authorRichard Henderson <[email protected]>
Tue, 1 Mar 2016 16:59:32 +0000 (08:59 -0800)
committerRichard Henderson <[email protected]>
Mon, 14 Mar 2016 17:52:42 +0000 (10:52 -0700)
commita657f79e32422634415c09f3f15c73d610297af5
tree4faccbb8e9f3433bb5dbd750fbfcb8c1e268280e
parent880f8486503b32a29b653a3c0b3cfc5432012f38
target-i386: Fix SMSW for 64-bit mode

In non-64-bit modes, the instruction always stores 16 bits.
But in 64-bit mode, when the destination is a register, the
instruction can write 32 or 64 bits.

Tested-by: HervĂ© Poussineau <[email protected]>
Signed-off-by: Richard Henderson <[email protected]>
target-i386/translate.c
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