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(parent: d50997f) | patch
Shuffle contents of tcg_target_reg_alloc_order
authormalc <malc@c046a42c-6fe2-441c-8c8c-71466251a162>
Mon, 23 Jun 2008 05:47:03 +0000 (05:47 +0000)
committermalc <malc@c046a42c-6fe2-441c-8c8c-71466251a162>
Mon, 23 Jun 2008 05:47:03 +0000 (05:47 +0000)
commita35e86c55fa2858c7828058f2e59956597aaa7af
treeb43436ee06f9d90168fe0afcf7e263721761ecc5tree | snapshot
parentd50997f9144ec103db7f5f804337979211ddf5e6commit | diff
Shuffle contents of tcg_target_reg_alloc_order

Move reserved/volatile registers down. Currently qemu_ld/stXX are
marked with TCG_OPF_CALL_CLOBBER and since memory accesses are
frequent and R3 through R12 are volatile moving this down results in
less spills and tighter generated code.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4778 c046a42c-6fe2-441c-8c8c-71466251a162
tcg/ppc/tcg-target.c diff | blob | blame | history
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