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PPC: e500: Map PIO space into core memory region
authorAlexander Graf <[email protected]>
Mon, 8 Oct 2012 10:21:30 +0000 (12:21 +0200)
committerAlexander Graf <[email protected]>
Mon, 29 Oct 2012 10:45:56 +0000 (11:45 +0100)
commita1bc20dfbb012ea2a5fb1228cb77abd04490fd79
tree9ef704599b65f54a1e7e9703b2dab16f08f470c0tree | snapshot
parent626c7a171e644fbe1579516b8b794d611c295d2fcommit | diff
PPC: e500: Map PIO space into core memory region

On PPC, we don't have PIO. So usually PIO space behind a PCI bridge is
accessible via MMIO. Do this mapping explicitly by mapping the PIO space
of our PCI bus into a memory region that lives in memory space.

Signed-off-by: Alexander Graf <[email protected]>
hw/ppc/e500.c diff | blob | blame | history
hw/ppce500_pci.c diff | blob | blame | history
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