Git Repo - qemu.git/commit - target-xtensa/cpu.c

]> Git Repo - qemu.git/commit - target-xtensa/cpu.c

author	Andreas Färber <[email protected]>
	Fri, 28 Jun 2013 21:18:47 +0000 (23:18 +0200)
committer	Andreas Färber <[email protected]>
	Fri, 26 Jul 2013 21:23:54 +0000 (23:23 +0200)
commit	a0e372f0c49ac01faeaeb73a6e8f50e8ac615f34
tree	0a87f5f9ab3ff51ef996c69ded7cfa8f97768e92	tree \| snapshot
parent	19a77215f1ba966c4d37dadec45f38be789b8529	commit \| diff

cpu: Introduce CPUState::gdb_num_regs and CPUClass::gdb_num_core_regs

CPUState::gdb_num_regs replaces num_g_regs.
CPUClass::gdb_num_core_regs replaces NUM_CORE_REGS.

Allows building gdb_register_coprocessor() for xtensa, too.

As a side effect this should fix coprocessor register numbering for SMP.

Acked-by: Michael Walle <[email protected]> (for lm32)
Acked-by: Max Filippov <[email protected]> (for xtensa)
Signed-off-by: Andreas Färber <[email protected]>

18 files changed:

gdbstub.c		diff \| blob \| blame \| history
include/qom/cpu.h		diff \| blob \| blame \| history
qom/cpu.c		diff \| blob \| blame \| history
target-alpha/cpu.c		diff \| blob \| blame \| history
target-arm/cpu.c		diff \| blob \| blame \| history
target-cris/cpu.c		diff \| blob \| blame \| history
target-i386/cpu.c		diff \| blob \| blame \| history
target-lm32/cpu.c		diff \| blob \| blame \| history
target-m68k/cpu.c		diff \| blob \| blame \| history
target-microblaze/cpu.c		diff \| blob \| blame \| history
target-mips/cpu.c		diff \| blob \| blame \| history
target-openrisc/cpu.c		diff \| blob \| blame \| history
target-ppc/translate_init.c		diff \| blob \| blame \| history
target-s390x/cpu.c		diff \| blob \| blame \| history
target-sh4/cpu.c		diff \| blob \| blame \| history
target-sparc/cpu.c		diff \| blob \| blame \| history
target-xtensa/cpu.c		diff \| blob \| blame \| history
target-xtensa/helper.c		diff \| blob \| blame \| history

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