target/arm: Honor HCR_EL2.TID1 trapping requirements

target/arm: Honor HCR_EL2.TID1 trapping requirements

HCR_EL2.TID1 mandates that access from EL1 to REVIDR_EL1, AIDR_EL1
(and their 32bit equivalents) as well as TCMTR, TLBTR are trapped
to EL2. QEMU ignores it, making it harder for a hypervisor to
virtualize the HW (though to be fair, no known hypervisor actually
cares).

Do the right thing by trapping to EL2 if HCR_EL2.TID1 is set.

Reviewed-by: Edgar E. Iglesias <[email protected]>
Signed-off-by: Marc Zyngier <[email protected]>
Reviewed-by: Richard Henderson <[email protected]>
Message-id: 20191201122018[email protected]
Signed-off-by: Peter Maydell <[email protected]>