]> Git Repo - qemu.git/commit - target/riscv/trace-events
RISC-V: Convert trap debugging to trace events
authorMichael Clark <[email protected]>
Sat, 16 Mar 2019 01:21:12 +0000 (01:21 +0000)
committerPalmer Dabbelt <[email protected]>
Tue, 19 Mar 2019 12:14:40 +0000 (05:14 -0700)
commit929f0a7fc40d7123ddda4c9dbd78a1806999b4f7
tree3befad4f4f5aebdc43c661520c5b330b67bc9533
parentacbbb94e5730c9808830938e869d243014e2923a
RISC-V: Convert trap debugging to trace events

Cc: Palmer Dabbelt <[email protected]>
Cc: Alistair Francis <[email protected]>
Signed-off-by: Michael Clark <[email protected]>
Signed-off-by: Alistair Francis <[email protected]>
Signed-off-by: Palmer Dabbelt <[email protected]>
Makefile.objs
target/riscv/cpu_helper.c
target/riscv/trace-events [new file with mode: 0644]
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