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target/riscv: Allow generating hlv/hlvx/hsv instructions
authorAlistair Francis <[email protected]>
Wed, 12 Aug 2020 19:13:19 +0000 (12:13 -0700)
committerAlistair Francis <[email protected]>
Tue, 25 Aug 2020 16:11:35 +0000 (09:11 -0700)
commit8c5362acb573b8b1913238a5ddefdeef12f513a8
tree60ea64b5e11dcd847a60ca41e7a1cb19cc9ccea0tree | snapshot
parent5a894dd7709f3b6a9f3e861dec71f78098bb3373commit | diff
target/riscv: Allow generating hlv/hlvx/hsv instructions

Signed-off-by: Alistair Francis <[email protected]>
Message-id: 477c864312280ea55a98dc84cb01d826751b6c14.1597259519[email protected]
Message-Id: <477c864312280ea55a98dc84cb01d826751b6c14.1597259519[email protected]>
target/riscv/cpu_bits.h diff | blob | blame | history
target/riscv/helper.h diff | blob | blame | history
target/riscv/insn32-64.decode diff | blob | blame | history
target/riscv/insn32.decode diff | blob | blame | history
target/riscv/insn_trans/trans_rvh.c.inc diff | blob | blame | history
target/riscv/op_helper.c diff | blob | blame | history
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