target/avr: Add instruction translation - Arithmetic and Logic Instructions

target/avr: Add instruction translation - Arithmetic and Logic Instructions

This includes:
- ADD, ADC, ADIW
- SBIW, SUB, SUBI, SBC, SBCI
- AND, ANDI
- OR, ORI, EOR
- COM, NEG
- INC, DEC
- MUL, MULS, MULSU
- FMUL, FMULS, FMULSU
- DES

Signed-off-by: Michael Rolnik <[email protected]>
Signed-off-by: Richard Henderson <[email protected]>
Signed-off-by: Aleksandar Markovic <[email protected]>
Tested-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Aleksandar Markovic <[email protected]>
Signed-off-by: Thomas Huth <[email protected]>
Message-Id: <20200705140315[email protected]>
[PMD: Added qemu_log_mask(LOG_UNIMP) in trans_DES()]
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>