]> Git Repo - qemu.git/commit - target/mips/helper.h
projects / qemu.git / commit
? search:
summary | shortlog | log | commit | commitdiff | tree
(parent: 2fb58b7) | patch
target-mips: update PageGrain and m{t,f}c0 EntryLo{0,1}
authorLeon Alrae <[email protected]>
Mon, 7 Jul 2014 10:23:59 +0000 (11:23 +0100)
committerLeon Alrae <[email protected]>
Mon, 3 Nov 2014 11:48:34 +0000 (11:48 +0000)
commit7207c7f9d74816c32783a394d8072d1f978157ac
tree05c22755fc89eceee9d23533de96bc06d9abdd97tree | snapshot
parent2fb58b73746e2f99ac85e82160277b18b18279becommit | diff
target-mips: update PageGrain and m{t,f}c0 EntryLo{0,1}

PageGrain needs rw bitmask which differs between MIPS architectures.
In pre-R6 if RIXI is supported, PageGrain.XIE and PageGrain.RIE are writeable,
whereas in R6 they are read-only 1.

On MIPS64 mtc0 instruction left shifts bits 31:30 for MIPS32 backward
compatiblity, therefore there are separate mtc0 and dmtc0 helpers.

Signed-off-by: Leon Alrae <[email protected]>
Reviewed-by: Yongbok Kim <[email protected]>
target-mips/cpu.h diff | blob | blame | history
target-mips/helper.h diff | blob | blame | history
target-mips/op_helper.c diff | blob | blame | history
target-mips/translate.c diff | blob | blame | history
target-mips/translate_init.c diff | blob | blame | history
Empty description
This page took 0.028185 seconds and 4 git commands to generate.