]> Git Repo - qemu.git/commit
pci: fix bridge IO/BASE
authorMichael S. Tsirkin <[email protected]>
Sun, 4 Mar 2012 09:36:35 +0000 (11:36 +0200)
committerMichael S. Tsirkin <[email protected]>
Thu, 15 Mar 2012 22:41:39 +0000 (00:41 +0200)
commit68917102740d9aa96c8f3ed4b95eab9917e8c61b
tree42a40c2c1915b4a74615d3b2e16fcd39800f33fc
parent633442ff56909214576549d34f5be1f50a67c5a6
pci: fix bridge IO/BASE

commit 5caef97a16010f818ea8b950e2ee24ba876643ad introduced
a regression: we do not make IO base/limit upper 16
bit registers writeable, so we should report a 16 bit
IO range type, not a 32 bit one.
Note that PCI_PREF_RANGE_TYPE_32 is 0x0, but PCI_IO_RANGE_TYPE_32 is 0x1.

In particular, this broke sparc64.

Note: this just reverts to behaviour prior to the commit above.
Making PCI_IO_BASE_UPPER16 and PCI_IO_LIMIT_UPPER16
registers writeable should, and seems to, work just as well, but
as no system seems to actually be interested in 32 bit IO,
let's not make unnecessary changes.

Signed-off-by: Michael S. Tsirkin <[email protected]>
hw/pci.c
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