target/avr: Add instruction translation - Bit and Bit-test Instructions
This includes:
- LSR, ROR
- ASR
- SWAP
- SBI, CBI
- BST, BLD
- BSET, BCLR
Signed-off-by: Michael Rolnik <[email protected]>
Signed-off-by: Richard Henderson <[email protected]>
Signed-off-by: Aleksandar Markovic <[email protected]>
Tested-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Aleksandar Markovic <[email protected]>
Signed-off-by: Thomas Huth <[email protected]>
Message-Id: <
20200705140315[email protected]>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>