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(parent: 621c100) | patch
hw/riscv: sifive_u: Add reset functionality
authorBin Meng <[email protected]>
Mon, 8 Jun 2020 14:17:38 +0000 (07:17 -0700)
committerAlistair Francis <[email protected]>
Fri, 19 Jun 2020 15:25:27 +0000 (08:25 -0700)
commit5133ed17906d1116c7ce47fd49ae77373cd41e29
tree4830dcf0ab92afdeeb8f91874ef543dee4485e0ftree | snapshot
parent621c1006d2d82da9f266f21ad8e887c38769a11bcommit | diff
hw/riscv: sifive_u: Add reset functionality

The HiFive Unleashed board wires GPIO pin#10 to the input of the
system reset signal. Let's set up the GPIO pin#10 and insert a
"gpio-restart" device tree node so that reboot is now functional
with QEMU 'sifive_u' machine.

Signed-off-by: Bin Meng <[email protected]>
Reviewed-by: Alistair Francis <[email protected]>
Message-id: 1591625864[email protected]
Message-Id: <1591625864[email protected]>
Signed-off-by: Alistair Francis <[email protected]>
hw/riscv/sifive_u.c diff | blob | blame | history
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