]> Git Repo - qemu.git/commit
hw/arm/armsse.c: Correct modelling of SSE-300 internal SRAMs
authorPeter Maydell <[email protected]>
Mon, 10 May 2021 19:08:41 +0000 (20:08 +0100)
committerPeter Maydell <[email protected]>
Tue, 25 May 2021 15:01:43 +0000 (16:01 +0100)
commit4eb1770988397354ed95dec2bd63c09348ebf707
tree88667f3b61b8f6f70681537dab7a7a7f2f16ee57
parent902b28ae4eba6df303cba57016945426865a6d59
hw/arm/armsse.c: Correct modelling of SSE-300 internal SRAMs

The SSE-300 was not correctly modelling its internal SRAMs:
 * the SRAM address width default is 18
 * the SRAM is mapped at 0x2100_0000, not 0x2000_0000 like
   the SSE-200 and IoTKit

The default address width is no longer guest-visible since
our only SSE-300 board sets it explicitly to a non-default
value, but following the hardware's default will help for
any future boards we need to model.

Reported-by: Devaraj Ranganna <[email protected]>
Signed-off-by: Peter Maydell <[email protected]>
Reviewed-by: Richard Henderson <[email protected]>
Message-id: 20210510190844[email protected]
hw/arm/armsse.c
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