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target-ppc: Model SPE floating-point instructions more accurately
authoraurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162>
Mon, 9 Feb 2009 16:49:50 +0000 (16:49 +0000)
committeraurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162>
Mon, 9 Feb 2009 16:49:50 +0000 (16:49 +0000)
commit40569b7edc2959c7460211de0b30bbdbb87626e4
treec19948daf6614dda235e1c4b7fc21ada42859432tree | snapshot
parent071fc3b1cda1ad6f8d4b83cdf3f8cf8c395f9404commit | diff
target-ppc: Model SPE floating-point instructions more accurately

Single-precision and double-precision floating-point instructions should
be separated into their own categories, since some chips only support
single-precision instructions.

Signed-off-by: Nathan Froyd <[email protected]>
Signed-off-by: Aurelien Jarno <[email protected]>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6575 c046a42c-6fe2-441c-8c8c-71466251a162
target-ppc/translate.c diff | blob | blame | history
target-ppc/translate_init.c diff | blob | blame | history
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