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e1000: Implementing various counters
authorLeonid Bloch <[email protected]>
Wed, 11 Nov 2015 13:52:46 +0000 (15:52 +0200)
committerJason Wang <[email protected]>
Thu, 12 Nov 2015 07:26:54 +0000 (15:26 +0800)
commit3b27430177498a1728b6765c70b455900f93d73a
treec5a9e14dbf91d90b0d27f6540deb89a92ec2f8ectree | snapshot
parent4aeea330f022f45d0dabff6090ecbb98755c2116commit | diff
e1000: Implementing various counters

This implements the following Statistic registers (various counters)
according to Intel's specs:

TSCTC  GOTCL  GOTCH  GORCL  GORCH  MPRC   BPRC   RUC    ROC
BPTC   MPTC   PTC... PRC...

PLEASE NOTE: these registers will not be active, nor will migrate, until
a compatibility flag will be set (in the next patch in this series).

Signed-off-by: Leonid Bloch <[email protected]>
Signed-off-by: Dmitry Fleytman <[email protected]>
Signed-off-by: Jason Wang <[email protected]>
hw/net/e1000.c diff | blob | blame | history
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